From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Nirmoy Das <nirmoy.das@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Jonathan Cavitt <jonathan.cavitt@intel.com>,
dri-devel@lists.freedesktop.org, stable@vger.kernel.org,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Flush WC GGTT only on required platforms
Date: Fri, 13 Oct 2023 13:50:11 +0300 [thread overview]
Message-ID: <ZSkg47slZ25rSQK4@intel.com> (raw)
In-Reply-To: <20231013103140.12192-1-nirmoy.das@intel.com>
On Fri, Oct 13, 2023 at 12:31:40PM +0200, Nirmoy Das wrote:
> gen8_ggtt_invalidate() is only needed for limitted set of platforms
> where GGTT is mapped as WC
I know there is supposed to be some kind hw snooping of the ggtt
pte writes to invalidate the tlb, but are we sure GFX_FLSH_CNTL
has no other side effects we depend on?
> otherwise this can cause unwanted
> side-effects on XE_HP platforms where GFX_FLSH_CNTL_GEN6 is not
> valid.
>
> Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v6.2+
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 4d7d88b92632..c2858d434bce 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -197,13 +197,17 @@ void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
>
> static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
> {
> + struct drm_i915_private *i915 = ggtt->vm.i915;
> struct intel_uncore *uncore = ggtt->vm.gt->uncore;
>
> /*
> * Note that as an uncached mmio write, this will flush the
> * WCB of the writes into the GGTT before it triggers the invalidate.
> + *
> + * Only perform this when GGTT is mapped as WC, see ggtt_probe_common().
> */
> - intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
> + intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> }
>
> static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> --
> 2.41.0
--
Ville Syrjälä
Intel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Nirmoy Das <nirmoy.das@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
Jonathan Cavitt <jonathan.cavitt@intel.com>,
dri-devel@lists.freedesktop.org,
Andi Shyti <andi.shyti@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
stable@vger.kernel.org, Matt Roper <matthew.d.roper@intel.com>,
John Harrison <john.c.harrison@intel.com>
Subject: Re: [PATCH] drm/i915: Flush WC GGTT only on required platforms
Date: Fri, 13 Oct 2023 13:50:11 +0300 [thread overview]
Message-ID: <ZSkg47slZ25rSQK4@intel.com> (raw)
In-Reply-To: <20231013103140.12192-1-nirmoy.das@intel.com>
On Fri, Oct 13, 2023 at 12:31:40PM +0200, Nirmoy Das wrote:
> gen8_ggtt_invalidate() is only needed for limitted set of platforms
> where GGTT is mapped as WC
I know there is supposed to be some kind hw snooping of the ggtt
pte writes to invalidate the tlb, but are we sure GFX_FLSH_CNTL
has no other side effects we depend on?
> otherwise this can cause unwanted
> side-effects on XE_HP platforms where GFX_FLSH_CNTL_GEN6 is not
> valid.
>
> Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v6.2+
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 4d7d88b92632..c2858d434bce 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -197,13 +197,17 @@ void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
>
> static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
> {
> + struct drm_i915_private *i915 = ggtt->vm.i915;
> struct intel_uncore *uncore = ggtt->vm.gt->uncore;
>
> /*
> * Note that as an uncached mmio write, this will flush the
> * WCB of the writes into the GGTT before it triggers the invalidate.
> + *
> + * Only perform this when GGTT is mapped as WC, see ggtt_probe_common().
> */
> - intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
> + intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> }
>
> static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> --
> 2.41.0
--
Ville Syrjälä
Intel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Nirmoy Das <nirmoy.das@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
intel-gfx@lists.freedesktop.org,
Jonathan Cavitt <jonathan.cavitt@intel.com>,
dri-devel@lists.freedesktop.org, stable@vger.kernel.org,
Andi Shyti <andi.shyti@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Matt Roper <matthew.d.roper@intel.com>,
John Harrison <john.c.harrison@intel.com>
Subject: Re: [PATCH] drm/i915: Flush WC GGTT only on required platforms
Date: Fri, 13 Oct 2023 13:50:11 +0300 [thread overview]
Message-ID: <ZSkg47slZ25rSQK4@intel.com> (raw)
In-Reply-To: <20231013103140.12192-1-nirmoy.das@intel.com>
On Fri, Oct 13, 2023 at 12:31:40PM +0200, Nirmoy Das wrote:
> gen8_ggtt_invalidate() is only needed for limitted set of platforms
> where GGTT is mapped as WC
I know there is supposed to be some kind hw snooping of the ggtt
pte writes to invalidate the tlb, but are we sure GFX_FLSH_CNTL
has no other side effects we depend on?
> otherwise this can cause unwanted
> side-effects on XE_HP platforms where GFX_FLSH_CNTL_GEN6 is not
> valid.
>
> Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v6.2+
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 4d7d88b92632..c2858d434bce 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -197,13 +197,17 @@ void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
>
> static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
> {
> + struct drm_i915_private *i915 = ggtt->vm.i915;
> struct intel_uncore *uncore = ggtt->vm.gt->uncore;
>
> /*
> * Note that as an uncached mmio write, this will flush the
> * WCB of the writes into the GGTT before it triggers the invalidate.
> + *
> + * Only perform this when GGTT is mapped as WC, see ggtt_probe_common().
> */
> - intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
> + intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> }
>
> static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> --
> 2.41.0
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-10-13 10:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 10:31 [Intel-gfx] [PATCH] drm/i915: Flush WC GGTT only on required platforms Nirmoy Das
2023-10-13 10:31 ` Nirmoy Das
2023-10-13 10:31 ` Nirmoy Das
2023-10-13 10:35 ` [Intel-gfx] " Andi Shyti
2023-10-13 10:35 ` Andi Shyti
2023-10-13 10:35 ` Andi Shyti
2023-10-13 10:38 ` [Intel-gfx] " Nirmoy Das
2023-10-13 10:38 ` Nirmoy Das
2023-10-13 10:38 ` Nirmoy Das
2023-10-13 10:50 ` Ville Syrjälä [this message]
2023-10-13 10:50 ` Ville Syrjälä
2023-10-13 10:50 ` Ville Syrjälä
2023-10-13 12:28 ` [Intel-gfx] " Nirmoy Das
2023-10-13 12:28 ` Nirmoy Das
2023-10-13 12:28 ` Nirmoy Das
2023-10-13 12:55 ` [Intel-gfx] " Ville Syrjälä
2023-10-13 12:55 ` Ville Syrjälä
2023-10-13 12:55 ` Ville Syrjälä
2023-10-13 13:13 ` [Intel-gfx] " Nirmoy Das
2023-10-13 13:13 ` Nirmoy Das
2023-10-13 13:13 ` Nirmoy Das
2023-10-13 16:15 ` [Intel-gfx] " Daniel Vetter
2023-10-13 16:15 ` Daniel Vetter
2023-10-13 16:15 ` Daniel Vetter
2023-10-16 7:12 ` [Intel-gfx] " Nirmoy Das
2023-10-16 7:12 ` Nirmoy Das
2023-10-16 7:12 ` Nirmoy Das
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZSkg47slZ25rSQK4@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jonathan.cavitt@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=nirmoy.das@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.