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* [PATCH for-4.18 v2] iommu/vt-d: fix SAGAW capability parsing
@ 2023-10-18 16:07 Roger Pau Monne
  2023-10-18 17:04 ` Andrew Cooper
  2023-10-19  7:41 ` Jan Beulich
  0 siblings, 2 replies; 8+ messages in thread
From: Roger Pau Monne @ 2023-10-18 16:07 UTC (permalink / raw)
  To: xen-devel
  Cc: Henry Wang, Jan Beulich, Andrew Cooper, Roger Pau Monne,
	Kevin Tian

SAGAW is a bitmap field, with bits 1, 2 and 3 signaling support for 3, 4 and 5
level page tables respectively.  According to the Intel VT-d specification, an
IOMMU can report multiple SAGAW bits being set.

Commit 859d11b27912 claims to replace the open-coded find_first_set_bit(), but
it's actually replacing an open coded implementation to find the last set bit.
The change forces the used AGAW to the lowest supported by the IOMMU instead of
the highest one between 1 and 2.

Restore the previous SAGAW parsing by using fls() instead of
find_first_set_bit(), in order to get the highest (supported) AGAW to be used.

However there's a caveat related to the value the AW context entry field must
be set to when using passthrough mode:

"When the Translation-type (TT) field indicates pass-through processing (10b),
this field must be programmed to indicate the largest AGAW value supported by
hardware." [0]

Newer Intel IOMMU implementations support 5 level page tables for the IOMMU,
and signal such support in SAGAW bit 3.

Enabling 5 level paging support (AGAW 3) at this point in the release is too
risky, so instead put a bodge to unconditionally disable passthough mode if
SAGAW has any bits greater than 2 set.  Ignore bit 0, it's reserved in the
specification but unlikely to have any meaning in the future.

Note the message about unhandled SAGAW bits being set is printed
unconditionally, regardless of whether passthrough mode is enabled.  This is
done in order to easily notice IOMMU implementations with not yet supported
SAGAW values.

[0] Intel VT Directed Spec Rev 4.1

Fixes: 859d11b27912 ('VT-d: prune SAGAW recognition')
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Changes since v1:
 - Reword commit message
 - Put a bodge for SAGAW bit 3.
---
 xen/drivers/passthrough/vtd/iommu.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index ceef7359e553..d2211ecc0b1b 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1327,15 +1327,24 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     /* Calculate number of pagetable levels: 3 or 4. */
     sagaw = cap_sagaw(iommu->cap);
-    if ( sagaw & 6 )
-        agaw = find_first_set_bit(sagaw & 6);
-    if ( !agaw )
+    agaw = fls(sagaw & 6) - 1;
+    if ( agaw == -1 )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported sagaw %x\n", sagaw);
         print_iommu_regs(drhd);
         rc = -ENODEV;
         goto free;
     }
+    if ( sagaw >> 3 )
+    {
+        printk_once(XENLOG_WARNING VTDPREFIX
+                    "IOMMU: unhandled bits set in sagaw (%#x)%s\n",
+                    sagaw,
+                    iommu_hwdom_passthrough ? " disabling passthrough" : "" );
+        if ( iommu_hwdom_passthrough )
+            iommu_hwdom_passthrough = false;
+    }
+
     iommu->nr_pt_levels = agaw_to_level(agaw);
     if ( min_pt_levels > iommu->nr_pt_levels )
         min_pt_levels = iommu->nr_pt_levels;
-- 
2.42.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2023-10-19 10:22 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-18 16:07 [PATCH for-4.18 v2] iommu/vt-d: fix SAGAW capability parsing Roger Pau Monne
2023-10-18 17:04 ` Andrew Cooper
2023-10-19  7:17   ` Roger Pau Monné
2023-10-19  7:41 ` Jan Beulich
2023-10-19  8:15   ` Roger Pau Monné
2023-10-19  8:49     ` Jan Beulich
2023-10-19  9:46       ` Roger Pau Monné
2023-10-19 10:21   ` Henry Wang

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