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From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: <geert+renesas@glider.be>, <magnus.damm@gmail.com>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<linux-renesas-soc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<prabhakar.mahadev-lad.rj@bp.renesas.com>, <tim609@andestech.com>,
	<dylan@andestech.com>, <locus84@andestech.com>,
	<dminus@andestech.com>
Subject: Re: [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
Date: Fri, 20 Oct 2023 16:17:43 +0800	[thread overview]
Message-ID: <ZTI3p82DLgKEo65D@APC323> (raw)
In-Reply-To: <CAMuHMdX+8RUpmhbcBjohZ5oF+wtakfNpwrxGFbZJvTN8_aJv9g@mail.gmail.com>

Hi Geert,

On Fri, Oct 20, 2023 at 09:26:31AM +0200, Geert Uytterhoeven wrote:
> Hi Yu,
> 
> On Thu, Oct 19, 2023 at 4:01 PM Yu Chien Peter Lin
> <peterlin@andestech.com> wrote:
> > The Andes INTC allows AX45MP cores to handle custom local
> > interrupts, such as the performance monitor overflow interrupt.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> > ---
> > Changes v1 -> v2:
> >   - New patch
> 
> Thanks for your patch!
> 
> > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > @@ -37,7 +37,7 @@ cpu0: cpu@0 {
> >
> >                         cpu0_intc: interrupt-controller {
> >                                 #interrupt-cells = <1>;
> > -                               compatible = "riscv,cpu-intc";
> > +                               compatible = "andestech,cpu-intc";
> 
> This compatible value is not documented.  Perhaps it was introduced
> in an earlier patch in the series, to which I was not CCed?
> 
> Threading is broken, so I can't easily find the whole series in lore:
> https://lore.kernel.org/all/20231019135810.3657665-1-peterlin@andestech.com/

Sorry, I'll send PATCH v3 with some fixes.
Thanks for reminding me of this.

Best regards,
Peter Lin

> >                                 interrupt-controller;
> >                         };
> >                 };
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

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WARNING: multiple messages have this Message-ID (diff)
From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: <geert+renesas@glider.be>, <magnus.damm@gmail.com>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<linux-renesas-soc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<prabhakar.mahadev-lad.rj@bp.renesas.com>, <tim609@andestech.com>,
	<dylan@andestech.com>, <locus84@andestech.com>,
	<dminus@andestech.com>
Subject: Re: [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
Date: Fri, 20 Oct 2023 16:17:43 +0800	[thread overview]
Message-ID: <ZTI3p82DLgKEo65D@APC323> (raw)
In-Reply-To: <CAMuHMdX+8RUpmhbcBjohZ5oF+wtakfNpwrxGFbZJvTN8_aJv9g@mail.gmail.com>

Hi Geert,

On Fri, Oct 20, 2023 at 09:26:31AM +0200, Geert Uytterhoeven wrote:
> Hi Yu,
> 
> On Thu, Oct 19, 2023 at 4:01 PM Yu Chien Peter Lin
> <peterlin@andestech.com> wrote:
> > The Andes INTC allows AX45MP cores to handle custom local
> > interrupts, such as the performance monitor overflow interrupt.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> > ---
> > Changes v1 -> v2:
> >   - New patch
> 
> Thanks for your patch!
> 
> > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > @@ -37,7 +37,7 @@ cpu0: cpu@0 {
> >
> >                         cpu0_intc: interrupt-controller {
> >                                 #interrupt-cells = <1>;
> > -                               compatible = "riscv,cpu-intc";
> > +                               compatible = "andestech,cpu-intc";
> 
> This compatible value is not documented.  Perhaps it was introduced
> in an earlier patch in the series, to which I was not CCed?
> 
> Threading is broken, so I can't easily find the whole series in lore:
> https://lore.kernel.org/all/20231019135810.3657665-1-peterlin@andestech.com/

Sorry, I'll send PATCH v3 with some fixes.
Thanks for reminding me of this.

Best regards,
Peter Lin

> >                                 interrupt-controller;
> >                         };
> >                 };
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

  reply	other threads:[~2023-10-20  8:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-19 13:58 [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Yu Chien Peter Lin
2023-10-19 13:58 ` Yu Chien Peter Lin
2023-10-20  7:26 ` Geert Uytterhoeven
2023-10-20  7:26   ` Geert Uytterhoeven
2023-10-20  8:17   ` Yu-Chien Peter Lin [this message]
2023-10-20  8:17     ` Yu-Chien Peter Lin

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