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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>
Subject: Re: [PATCH 4/7] x86: detect PIC aliasing on ports other than 0x[2A][01]
Date: Mon, 30 Oct 2023 16:23:24 +0100	[thread overview]
Message-ID: <ZT_KbM0tzrn5cWR6@macbook> (raw)
In-Reply-To: <e4929b28-5608-bba8-9953-270f408e32eb@suse.com>

On Mon, Oct 30, 2023 at 04:19:22PM +0100, Jan Beulich wrote:
> On 30.10.2023 16:14, Roger Pau Monné wrote:
> > On Mon, Oct 30, 2023 at 01:24:52PM +0100, Jan Beulich wrote:
> >> On 26.10.2023 17:19, Roger Pau Monné wrote:
> >>> Maybe the issue is that PV_SHIM_EXCLUSIVE shouldn't have been a
> >>> Kconfig option in the first place, and instead a specific Kconfig
> >>> config file?
> >>>
> >>> Maybe it's not possible to achieve the same using just a Kconfig
> >>> config file.
> >>
> >> I'm afraid I don't understand what you mean by "Kconfig config file". It
> >> can't really be just another .../Kconfig file somewhere in the tree, as
> >> it doesn't really matter where an option like this would be defined.
> > 
> > No, I was thinking of splitting what PV_SHIM_EXCLUSIVE actually
> > implies, for example by adding CONFIG_DOMCTL_HYPERCALLL or
> > CONFIG_PLATFORM_HYPERCALL and re-work the pvshim_defconfig config file
> > based on those, so that we don't end up with negative relations.
> > 
> > Note sure all usages of PV_SHIM_EXCLUSIVE can be split in such a way,
> > maybe we would need some compromise.
> 
> Wouldn't such a CONFIG_DOMCTL_HYPERCALL then still want to depend on
> !PV_SHIM_EXCLUSIVE, which is the kind of dependency we want to avoid?
> Aiui the two (splitting and inverting) are largely orthogonal aspects.

No, CONFIG_DOMCTL_HYPERCALL could be promptless option enabled by
default and disabled by the pvshim_defconfig.

Thanks, Roger.


  reply	other threads:[~2023-10-30 15:23 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-11 12:03 [PATCH 0/7] x86: Dom0 I/O port access permissions Jan Beulich
2023-05-11 12:05 ` [PATCH 1/7] x86: don't allow Dom0 access to port CF9 Jan Beulich
2023-10-25 12:36   ` Roger Pau Monné
2023-10-25 13:59     ` Jan Beulich
2023-05-11 12:05 ` [PATCH 2/7] x86: don't allow Dom0 access to port 92 Jan Beulich
2023-10-25 12:49   ` Roger Pau Monné
2023-10-25 14:11     ` Jan Beulich
2023-05-11 12:06 ` [PATCH 3/7] x86/PVH: deny Dom0 access to the ISA DMA controller Jan Beulich
2023-10-25 13:22   ` Roger Pau Monné
2023-05-11 12:06 ` [PATCH 4/7] x86: detect PIC aliasing on ports other than 0x[2A][01] Jan Beulich
2023-10-26  8:34   ` Roger Pau Monné
2023-10-26  9:03     ` Jan Beulich
2023-10-26 13:24       ` Roger Pau Monné
2023-10-26 15:07         ` Jan Beulich
2023-10-26 15:19           ` Roger Pau Monné
2023-10-30 12:24             ` Jan Beulich
2023-10-30 15:14               ` Roger Pau Monné
2023-10-30 15:19                 ` Jan Beulich
2023-10-30 15:23                   ` Roger Pau Monné [this message]
2023-10-30 15:35                     ` Jan Beulich
2023-10-30 16:25                       ` Roger Pau Monné
2023-05-11 12:07 ` [PATCH 5/7] x86: detect PIT aliasing on ports other than 0x4[0-3] Jan Beulich
2023-10-26 10:25   ` Roger Pau Monné
2023-10-26 12:31     ` Jan Beulich
2023-10-26 13:57       ` Roger Pau Monné
2023-10-26 15:10         ` Jan Beulich
2023-10-26 15:13           ` Roger Pau Monné
2023-10-30 12:50             ` Jan Beulich
2023-05-11 12:07 ` [PATCH 6/7] x86: don't allow Dom0 (direct) access to port F0 Jan Beulich
2023-10-26 10:48   ` Roger Pau Monné
2023-05-11 12:08 ` [PATCH 7/7] x86: don't allow Dom0 access to ELCR ports Jan Beulich
2023-10-26 11:02   ` Roger Pau Monné
2023-10-26 12:51     ` Jan Beulich

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