Re: [PATCH v6] scripts/gdb: add lx_current support for riscv

[Deepak Gupta <debug@rivosinc.com>]

Ping

+ CC: akpm@linux-foundation.org

Who should I ping to make sure that it lands up in mainline?
It's quite a trivial change to support lx_current riscv arch.

-Deepak

On Thu, Oct 26, 2023 at 04:38:23PM -0700, Deepak Gupta wrote:
>csr_sscratch CSR holds current task_struct address when hart is in
>user space. Trap handler on entry spills csr_sscratch into "tp" (x2)
>register and zeroes out csr_sscratch CSR. Trap handler on exit reloads
>"tp" with expected user mode value and place current task_struct address
>again in csr_sscratch CSR.
>
>This patch assumes "tp" is pointing to task_struct. If value in
>csr_sscratch is numerically greater than "tp" then it assumes csr_sscratch
>is correct address of current task_struct. This logic holds when
>   - hart is in user space, "tp" will be less than csr_sscratch.
>   - hart is in kernel space but not in trap handler, "tp" will be more
>     than csr_sscratch (csr_sscratch being equal to 0).
>   - hart is executing trap handler
>       - "tp" is still pointing to user mode but csr_sscratch contains
>          ptr to task_struct. Thus numerically higher.
>       - "tp" is  pointing to task_struct but csr_sscratch now contains
>          either 0 or numerically smaller value (transiently holds
>          user mode tp)
>
>Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
>Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
>Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
>Tested-by: Hsieh-Tseng Shen <woodrow.shen@sifive.com>
>
>---
>Since patch has changed a little bit from v1 and I didn't include
>changelog earlier, here it is.
>
>v1 --> v2:
> - added logic to locate task_struct irrespective of priv
> - made locating task_struct agnostic to bitness(32 vs 64).
> - added caching of ulong type in scripts/gdb/linux/utils.py
> - added more descriptive commit message
>
>v2 --> v3:
> - amended commit message and source line to fit column width
>
>v3 --> v4:
> - amended commit message and remove whitespace in source
> - added Reviewed-by for reviewers
>
>v4 --> v5:
> - changing the order of changelog and sign off/review tags in commit
>
>v5 --> v6:
> - rebased on 6.6-rc5. dropped changes in utils.py as they're upstream
>---
> scripts/gdb/linux/cpus.py | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
>diff --git a/scripts/gdb/linux/cpus.py b/scripts/gdb/linux/cpus.py
>index 255dc18cb9da..cba589e5b57d 100644
>--- a/scripts/gdb/linux/cpus.py
>+++ b/scripts/gdb/linux/cpus.py
>@@ -179,6 +179,21 @@ def get_current_task(cpu):
>         else:
>             raise gdb.GdbError("Sorry, obtaining the current task is not allowed "
>                                "while running in userspace(EL0)")
>+    elif utils.is_target_arch("riscv"):
>+        current_tp = gdb.parse_and_eval("$tp")
>+        scratch_reg = gdb.parse_and_eval("$sscratch")
>+
>+        # by default tp points to current task
>+        current_task = current_tp.cast(task_ptr_type)
>+
>+        # scratch register is set 0 in trap handler after entering kernel.
>+        # When hart is in user mode, scratch register is pointing to task_struct.
>+        # and tp is used by user mode. So when scratch register holds larger value
>+        # (negative address as ulong is larger value) than tp, then use scratch register.
>+        if (scratch_reg.cast(utils.get_ulong_type()) > current_tp.cast(utils.get_ulong_type())):
>+            current_task = scratch_reg.cast(task_ptr_type)
>+
>+        return current_task.dereference()
>     else:
>         raise gdb.GdbError("Sorry, obtaining the current task is not yet "
>                            "supported with this arch")
>-- 
>2.42.0
>

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