From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "Dugast, Francois" <francois.dugast@intel.com>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Add Tile ID information to the GT info query
Date: Thu, 16 Nov 2023 15:52:45 -0500 [thread overview]
Message-ID: <ZVaBHT55caDmX2Mp@intel.com> (raw)
In-Reply-To: <e15046e7999170bb0012b519ef994487d1823f5d.camel@intel.com>
On Thu, Nov 16, 2023 at 08:44:29PM +0000, Souza, Jose wrote:
> On Thu, 2023-11-16 at 14:43 +0000, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > As an information only. So Userspace can use this information
> > and be able to correlate different GTs.
> >
> > Make API symmetric between Engine and GT info.
> >
> > There's no need right now to include a tile_query entry
> > since there's no other information that we need from tile
> > that is not already exposed through different queries.
> >
> > However, this could be added later if we have different Tile
> > information that could matter to userspace. But let's keep
> > the API ready for a direct reference to Tile ID based on
> > the GT entry.
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_query.c | 1 +
> > include/uapi/drm/xe_drm.h | 2 ++
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > index 87345ed99151..838f03795841 100644
> > --- a/drivers/gpu/drm/xe/xe_query.c
> > +++ b/drivers/gpu/drm/xe/xe_query.c
> > @@ -382,6 +382,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
> > else
> > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > + gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id;
> > gt_list->gt_list[id].gt_id = gt->info.id;
> > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > if (!IS_DGFX(xe))
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index b6d3d4d52da9..8610ac461619 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -380,6 +380,8 @@ struct drm_xe_gt {
> > #define DRM_XE_QUERY_GT_TYPE_MEDIA 1
> > /** @type: GT type: Main or Media */
> > __u16 type;
> > + /** @tile_id: Tile ID where this GT lives (Information only) */
> > + __u16 tile_id;
>
> ack on adding it but just adding it breaks the struct alignment for 32/64bits user-space.
The padding was broken even without this pad. I had noticed this yesterday, so I
reviewed that aspect and found many more incorrect paddings. We will need to send
a separated patch to fix them all instead of hunting which patch was the culprit now :(
>
> > /** @gt_id: Unique ID of this GT within the PCI Device */
> > __u16 gt_id;
> > /** @clock_freq: A clock frequency for timestamp */
>
next prev parent reply other threads:[~2023-11-16 20:52 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-16 14:43 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Cleanup and future proof Francois Dugast
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 1/8] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
2023-11-16 20:57 ` Rodrigo Vivi
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 3/8] drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Reject bo creation of unaligned size Francois Dugast
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Align on a common way to return arrays (memory regions) Francois Dugast
2023-11-16 20:39 ` Souza, Jose
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 6/8] drm/xe/uapi: Align on a common way to return arrays (gt) Francois Dugast
2023-11-16 20:40 ` Souza, Jose
2023-11-16 20:56 ` Rodrigo Vivi
2023-11-16 21:28 ` Matt Roper
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Align on a common way to return arrays (engines) Francois Dugast
2023-11-16 20:42 ` Souza, Jose
2023-11-16 14:43 ` [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Add Tile ID information to the GT info query Francois Dugast
2023-11-16 20:44 ` Souza, Jose
2023-11-16 20:52 ` Rodrigo Vivi [this message]
2023-11-16 20:54 ` Souza, Jose
2023-11-17 4:06 ` [Intel-xe] [PATCH] drm/xe/uapi: Fix various struct padding for 64b alignment Rodrigo Vivi
2023-11-17 14:25 ` Souza, Jose
2023-11-17 20:48 ` [Intel-gfx] " Rodrigo Vivi
2023-11-17 20:57 ` Souza, Jose
2023-11-17 16:24 ` [Intel-xe] " Matt Roper
2023-11-16 14:46 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Cleanup and future proof Patchwork
2023-11-17 23:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/xe/uapi: Fix various struct padding for 64b alignment Patchwork
2023-11-18 3:14 ` [Intel-xe] ✓ CI.Patch_applied: success for uAPI Alignment - Cleanup and future proof Patchwork
2023-11-18 3:14 ` [Intel-xe] ✓ CI.checkpatch: " Patchwork
2023-11-18 3:15 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-11-18 3:23 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-11-18 3:23 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-11-18 3:24 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
2023-11-18 3:59 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
2023-11-20 12:44 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Cleanup and future proof (rev3) Patchwork
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