[Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Luca Coelho]

The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.

To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock.  In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.

This keeps the ifdefs contained in these new functions and all such
logic inside the display code.

Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---


In v2:

   * Renamed uncore_spin_*() to intel_spin_*()
   * Corrected the order: save, lock, unlock, restore

In v3:

   * Undid the change to pass drm_i915_private instead of the lock
     itself, since we would have to include i915_drv.h and that pulls
     in a truckload of other includes.

In v4:

   * After a brief attempt to replace this with a different patch,
     we're back to this one;
   * Pass drm_i195_private again, and move the functions to
     intel_vblank.c, so we don't need to include i915_drv.h in a
     header file and it's already included in intel_vblank.c;

In v5:

   * Remove stray include in intel_display.h;
   * Remove unnecessary inline modifiers in the new functions.

In v6:

   * Just removed the umlauts from Ville's name, because patchwork
     didn't catch my patch and I suspect it was some UTF-8 confusion.

 drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
 1 file changed, 39 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..221fcd6bf77b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
 	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
 }
 
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not.  This is only
+ * needed in i915, not in Xe.
+ *
+ * This lock in i915 is needed because some old platforms (at least
+ * IVB and possibly HSW as well), which are not supported in Xe, need
+ * all register accesses to the same cacheline to be serialized,
+ * otherwise they may hang.
+ */
+static void intel_vblank_section_enter(struct drm_i915_private *i915)
+{
+#ifdef I915
+	spin_lock(&i915->uncore.lock);
+#endif
+}
+
+static void intel_vblank_section_exit(struct drm_i915_private *i915)
+{
+#ifdef I915
+	spin_unlock(&i915->uncore.lock);
+#endif
+}
+
 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 				     bool in_vblank_irq,
 				     int *vpos, int *hpos,
@@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	}
 
 	/*
-	 * Lock uncore.lock, as we will do multiple timing critical raw
-	 * register reads, potentially with preemption disabled, so the
-	 * following code must not block on uncore.lock.
+	 * Enter vblank critical section, as we will do multiple
+	 * timing critical raw register reads, potentially with
+	 * preemption disabled, so the following code must not block.
 	 */
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+	local_irq_save(irqflags);
+	intel_vblank_section_enter(dev_priv);
 
 	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
 
@@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 
 	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
 
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+	intel_vblank_section_exit(dev_priv);
+	local_irq_restore(irqflags);
 
 	/*
 	 * While in vblank, position will be negative
@@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
 	unsigned long irqflags;
 	int position;
 
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+	local_irq_save(irqflags);
+	intel_vblank_section_enter(dev_priv);
+
 	position = __intel_get_crtc_scanline(crtc);
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+
+	intel_vblank_section_exit(dev_priv);
+	local_irq_restore(irqflags);
 
 	return position;
 }
@@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
 	 * Need to audit everything to make sure it's safe.
 	 */
 	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
-	spin_lock(&i915->uncore.lock);
+	intel_vblank_section_enter(i915);
 
 	drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);
 
@@ -546,7 +576,6 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
 	crtc->mode_flags = mode_flags;
 
 	crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
-
-	spin_unlock(&i915->uncore.lock);
+	intel_vblank_section_exit(i915);
 	spin_unlock_irqrestore(&i915->drm.vblank_time_lock, irqflags);
 }
-- 
2.39.2

[Intel-xe] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Luca Coelho]

The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.

To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock.  In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.

This keeps the ifdefs contained in these new functions and all such
logic inside the display code.

Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---


In v2:

   * Renamed uncore_spin_*() to intel_spin_*()
   * Corrected the order: save, lock, unlock, restore

In v3:

   * Undid the change to pass drm_i915_private instead of the lock
     itself, since we would have to include i915_drv.h and that pulls
     in a truckload of other includes.

In v4:

   * After a brief attempt to replace this with a different patch,
     we're back to this one;
   * Pass drm_i195_private again, and move the functions to
     intel_vblank.c, so we don't need to include i915_drv.h in a
     header file and it's already included in intel_vblank.c;

In v5:

   * Remove stray include in intel_display.h;
   * Remove unnecessary inline modifiers in the new functions.

In v6:

   * Just removed the umlauts from Ville's name, because patchwork
     didn't catch my patch and I suspect it was some UTF-8 confusion.

 drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
 1 file changed, 39 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..221fcd6bf77b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
 	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
 }
 
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not.  This is only
+ * needed in i915, not in Xe.
+ *
+ * This lock in i915 is needed because some old platforms (at least
+ * IVB and possibly HSW as well), which are not supported in Xe, need
+ * all register accesses to the same cacheline to be serialized,
+ * otherwise they may hang.
+ */
+static void intel_vblank_section_enter(struct drm_i915_private *i915)
+{
+#ifdef I915
+	spin_lock(&i915->uncore.lock);
+#endif
+}
+
+static void intel_vblank_section_exit(struct drm_i915_private *i915)
+{
+#ifdef I915
+	spin_unlock(&i915->uncore.lock);
+#endif
+}
+
 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 				     bool in_vblank_irq,
 				     int *vpos, int *hpos,
@@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	}
 
 	/*
-	 * Lock uncore.lock, as we will do multiple timing critical raw
-	 * register reads, potentially with preemption disabled, so the
-	 * following code must not block on uncore.lock.
+	 * Enter vblank critical section, as we will do multiple
+	 * timing critical raw register reads, potentially with
+	 * preemption disabled, so the following code must not block.
 	 */
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+	local_irq_save(irqflags);
+	intel_vblank_section_enter(dev_priv);
 
 	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
 
@@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 
 	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
 
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+	intel_vblank_section_exit(dev_priv);
+	local_irq_restore(irqflags);
 
 	/*
 	 * While in vblank, position will be negative
@@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
 	unsigned long irqflags;
 	int position;
 
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+	local_irq_save(irqflags);
+	intel_vblank_section_enter(dev_priv);
+
 	position = __intel_get_crtc_scanline(crtc);
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+
+	intel_vblank_section_exit(dev_priv);
+	local_irq_restore(irqflags);
 
 	return position;
 }
@@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
 	 * Need to audit everything to make sure it's safe.
 	 */
 	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
-	spin_lock(&i915->uncore.lock);
+	intel_vblank_section_enter(i915);
 
 	drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);
 
@@ -546,7 +576,6 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
 	crtc->mode_flags = mode_flags;
 
 	crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
-
-	spin_unlock(&i915->uncore.lock);
+	intel_vblank_section_exit(i915);
 	spin_unlock_irqrestore(&i915->drm.vblank_time_lock, irqflags);
 }
-- 
2.39.2

Re: [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Tvrtko Ursulin]

On 30/11/2023 11:35, Luca Coelho wrote:
> The uncore code may not always be available (e.g. when we build the
> display code with Xe), so we can't always rely on having the uncore's
> spinlock.
> 
> To handle this, split the spin_lock/unlock_irqsave/restore() into
> spin_lock/unlock() followed by a call to local_irq_save/restore() and
> create wrapper functions for locking and unlocking the uncore's
> spinlock.  In these functions, we have a condition check and only
> actually try to lock/unlock the spinlock when I915 is defined, and
> thus uncore is available.
> 
> This keeps the ifdefs contained in these new functions and all such
> logic inside the display code.
> 
> Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
> 
> 
> In v2:
> 
>     * Renamed uncore_spin_*() to intel_spin_*()
>     * Corrected the order: save, lock, unlock, restore
> 
> In v3:
> 
>     * Undid the change to pass drm_i915_private instead of the lock
>       itself, since we would have to include i915_drv.h and that pulls
>       in a truckload of other includes.
> 
> In v4:
> 
>     * After a brief attempt to replace this with a different patch,
>       we're back to this one;
>     * Pass drm_i195_private again, and move the functions to
>       intel_vblank.c, so we don't need to include i915_drv.h in a
>       header file and it's already included in intel_vblank.c;
> 
> In v5:
> 
>     * Remove stray include in intel_display.h;
>     * Remove unnecessary inline modifiers in the new functions.
> 
> In v6:
> 
>     * Just removed the umlauts from Ville's name, because patchwork
>       didn't catch my patch and I suspect it was some UTF-8 confusion.
> 
>   drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
>   1 file changed, 39 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 2cec2abf9746..221fcd6bf77b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
>   	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
>   }
>   
> +/*
> + * The uncore version of the spin lock functions is used to decide
> + * whether we need to lock the uncore lock or not.  This is only
> + * needed in i915, not in Xe.
> + *
> + * This lock in i915 is needed because some old platforms (at least
> + * IVB and possibly HSW as well), which are not supported in Xe, need
> + * all register accesses to the same cacheline to be serialized,
> + * otherwise they may hang.
> + */
> +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> +{
> +#ifdef I915
> +	spin_lock(&i915->uncore.lock);
> +#endif
> +}
> +
> +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> +{
> +#ifdef I915
> +	spin_unlock(&i915->uncore.lock);
> +#endif
> +}
> +
>   static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   				     bool in_vblank_irq,
>   				     int *vpos, int *hpos,
> @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   	}
>   
>   	/*
> -	 * Lock uncore.lock, as we will do multiple timing critical raw
> -	 * register reads, potentially with preemption disabled, so the
> -	 * following code must not block on uncore.lock.
> +	 * Enter vblank critical section, as we will do multiple
> +	 * timing critical raw register reads, potentially with
> +	 * preemption disabled, so the following code must not block.
>   	 */
> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +	local_irq_save(irqflags);
> +	intel_vblank_section_enter(dev_priv);

Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems 
all callers from both i915 and xe end up doing that anyway and naming 
"vblank_start" was presumed there would be more to the section than 
cacheline mmio bug. I mean that there is some benefit from keeping the 
readout timings tight.

Regards,

Tvrtko

>   
>   	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
>   
> @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   
>   	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
>   
> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +	intel_vblank_section_exit(dev_priv);
> +	local_irq_restore(irqflags);
>   
>   	/*
>   	 * While in vblank, position will be negative
> @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
>   	unsigned long irqflags;
>   	int position;
>   
> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +	local_irq_save(irqflags);
> +	intel_vblank_section_enter(dev_priv);
> +
>   	position = __intel_get_crtc_scanline(crtc);
> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +
> +	intel_vblank_section_exit(dev_priv);
> +	local_irq_restore(irqflags);
>   
>   	return position;
>   }
> @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>   	 * Need to audit everything to make sure it's safe.
>   	 */
>   	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
> -	spin_lock(&i915->uncore.lock);
> +	intel_vblank_section_enter(i915);
>   
>   	drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);
>   
> @@ -546,7 +576,6 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>   	crtc->mode_flags = mode_flags;
>   
>   	crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
> -
> -	spin_unlock(&i915->uncore.lock);
> +	intel_vblank_section_exit(i915);
>   	spin_unlock_irqrestore(&i915->drm.vblank_time_lock, irqflags);
>   }

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Tvrtko Ursulin]

On 30/11/2023 11:35, Luca Coelho wrote:
> The uncore code may not always be available (e.g. when we build the
> display code with Xe), so we can't always rely on having the uncore's
> spinlock.
> 
> To handle this, split the spin_lock/unlock_irqsave/restore() into
> spin_lock/unlock() followed by a call to local_irq_save/restore() and
> create wrapper functions for locking and unlocking the uncore's
> spinlock.  In these functions, we have a condition check and only
> actually try to lock/unlock the spinlock when I915 is defined, and
> thus uncore is available.
> 
> This keeps the ifdefs contained in these new functions and all such
> logic inside the display code.
> 
> Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
> 
> 
> In v2:
> 
>     * Renamed uncore_spin_*() to intel_spin_*()
>     * Corrected the order: save, lock, unlock, restore
> 
> In v3:
> 
>     * Undid the change to pass drm_i915_private instead of the lock
>       itself, since we would have to include i915_drv.h and that pulls
>       in a truckload of other includes.
> 
> In v4:
> 
>     * After a brief attempt to replace this with a different patch,
>       we're back to this one;
>     * Pass drm_i195_private again, and move the functions to
>       intel_vblank.c, so we don't need to include i915_drv.h in a
>       header file and it's already included in intel_vblank.c;
> 
> In v5:
> 
>     * Remove stray include in intel_display.h;
>     * Remove unnecessary inline modifiers in the new functions.
> 
> In v6:
> 
>     * Just removed the umlauts from Ville's name, because patchwork
>       didn't catch my patch and I suspect it was some UTF-8 confusion.
> 
>   drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
>   1 file changed, 39 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 2cec2abf9746..221fcd6bf77b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
>   	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
>   }
>   
> +/*
> + * The uncore version of the spin lock functions is used to decide
> + * whether we need to lock the uncore lock or not.  This is only
> + * needed in i915, not in Xe.
> + *
> + * This lock in i915 is needed because some old platforms (at least
> + * IVB and possibly HSW as well), which are not supported in Xe, need
> + * all register accesses to the same cacheline to be serialized,
> + * otherwise they may hang.
> + */
> +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> +{
> +#ifdef I915
> +	spin_lock(&i915->uncore.lock);
> +#endif
> +}
> +
> +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> +{
> +#ifdef I915
> +	spin_unlock(&i915->uncore.lock);
> +#endif
> +}
> +
>   static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   				     bool in_vblank_irq,
>   				     int *vpos, int *hpos,
> @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   	}
>   
>   	/*
> -	 * Lock uncore.lock, as we will do multiple timing critical raw
> -	 * register reads, potentially with preemption disabled, so the
> -	 * following code must not block on uncore.lock.
> +	 * Enter vblank critical section, as we will do multiple
> +	 * timing critical raw register reads, potentially with
> +	 * preemption disabled, so the following code must not block.
>   	 */
> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +	local_irq_save(irqflags);
> +	intel_vblank_section_enter(dev_priv);

Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems 
all callers from both i915 and xe end up doing that anyway and naming 
"vblank_start" was presumed there would be more to the section than 
cacheline mmio bug. I mean that there is some benefit from keeping the 
readout timings tight.

Regards,

Tvrtko

>   
>   	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
>   
> @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>   
>   	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
>   
> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +	intel_vblank_section_exit(dev_priv);
> +	local_irq_restore(irqflags);
>   
>   	/*
>   	 * While in vblank, position will be negative
> @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
>   	unsigned long irqflags;
>   	int position;
>   
> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +	local_irq_save(irqflags);
> +	intel_vblank_section_enter(dev_priv);
> +
>   	position = __intel_get_crtc_scanline(crtc);
> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +
> +	intel_vblank_section_exit(dev_priv);
> +	local_irq_restore(irqflags);
>   
>   	return position;
>   }
> @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>   	 * Need to audit everything to make sure it's safe.
>   	 */
>   	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
> -	spin_lock(&i915->uncore.lock);
> +	intel_vblank_section_enter(i915);
>   
>   	drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);
>   
> @@ -546,7 +576,6 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>   	crtc->mode_flags = mode_flags;
>   
>   	crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
> -
> -	spin_unlock(&i915->uncore.lock);
> +	intel_vblank_section_exit(i915);
>   	spin_unlock_irqrestore(&i915->drm.vblank_time_lock, irqflags);
>   }

Re: [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> On 30/11/2023 11:35, Luca Coelho wrote:
> > The uncore code may not always be available (e.g. when we build the
> > display code with Xe), so we can't always rely on having the uncore's
> > spinlock.
> > 
> > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > create wrapper functions for locking and unlocking the uncore's
> > spinlock.  In these functions, we have a condition check and only
> > actually try to lock/unlock the spinlock when I915 is defined, and
> > thus uncore is available.
> > 
> > This keeps the ifdefs contained in these new functions and all such
> > logic inside the display code.
> > 
> > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > ---
> > 
> > 
> > In v2:
> > 
> >     * Renamed uncore_spin_*() to intel_spin_*()
> >     * Corrected the order: save, lock, unlock, restore
> > 
> > In v3:
> > 
> >     * Undid the change to pass drm_i915_private instead of the lock
> >       itself, since we would have to include i915_drv.h and that pulls
> >       in a truckload of other includes.
> > 
> > In v4:
> > 
> >     * After a brief attempt to replace this with a different patch,
> >       we're back to this one;
> >     * Pass drm_i195_private again, and move the functions to
> >       intel_vblank.c, so we don't need to include i915_drv.h in a
> >       header file and it's already included in intel_vblank.c;
> > 
> > In v5:
> > 
> >     * Remove stray include in intel_display.h;
> >     * Remove unnecessary inline modifiers in the new functions.
> > 
> > In v6:
> > 
> >     * Just removed the umlauts from Ville's name, because patchwork
> >       didn't catch my patch and I suspect it was some UTF-8 confusion.
> > 
> >   drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> >   1 file changed, 39 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 2cec2abf9746..221fcd6bf77b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> >   	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> >   }
> >   
> > +/*
> > + * The uncore version of the spin lock functions is used to decide
> > + * whether we need to lock the uncore lock or not.  This is only
> > + * needed in i915, not in Xe.
> > + *
> > + * This lock in i915 is needed because some old platforms (at least
> > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > + * all register accesses to the same cacheline to be serialized,
> > + * otherwise they may hang.
> > + */
> > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > +{
> > +#ifdef I915
> > +	spin_lock(&i915->uncore.lock);
> > +#endif
> > +}
> > +
> > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > +{
> > +#ifdef I915
> > +	spin_unlock(&i915->uncore.lock);
> > +#endif
> > +}
> > +
> >   static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   				     bool in_vblank_irq,
> >   				     int *vpos, int *hpos,
> > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   	}
> >   
> >   	/*
> > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > -	 * register reads, potentially with preemption disabled, so the
> > -	 * following code must not block on uncore.lock.
> > +	 * Enter vblank critical section, as we will do multiple
> > +	 * timing critical raw register reads, potentially with
> > +	 * preemption disabled, so the following code must not block.
> >   	 */
> > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > +	local_irq_save(irqflags);
> > +	intel_vblank_section_enter(dev_priv);
> 
> Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems 
> all callers from both i915 and xe end up doing that anyway and naming 
> "vblank_start" was presumed there would be more to the section than 
> cacheline mmio bug. I mean that there is some benefit from keeping the 
> readout timings tight.
> 

The reason is that there is one caller that has already disabled
interrupts when this function is called (see below), so we shouldn't do
it again. 


> >   
> >   	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
> >   
> > @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   
> >   	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
> >   
> > -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> > +	intel_vblank_section_exit(dev_priv);
> > +	local_irq_restore(irqflags);
> >   
> >   	/*
> >   	 * While in vblank, position will be negative
> > @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
> >   	unsigned long irqflags;
> >   	int position;
> >   
> > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > +	local_irq_save(irqflags);
> > +	intel_vblank_section_enter(dev_priv);
> > +
> >   	position = __intel_get_crtc_scanline(crtc);
> > -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> > +
> > +	intel_vblank_section_exit(dev_priv);
> > +	local_irq_restore(irqflags);
> >   
> >   	return position;
> >   }
> > @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
> >   	 * Need to audit everything to make sure it's safe.
> >   	 */
> >   	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
> > -	spin_lock(&i915->uncore.lock);
> > +	intel_vblank_section_enter(i915);

Here.

--
Cheers,
Luca.

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> On 30/11/2023 11:35, Luca Coelho wrote:
> > The uncore code may not always be available (e.g. when we build the
> > display code with Xe), so we can't always rely on having the uncore's
> > spinlock.
> > 
> > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > create wrapper functions for locking and unlocking the uncore's
> > spinlock.  In these functions, we have a condition check and only
> > actually try to lock/unlock the spinlock when I915 is defined, and
> > thus uncore is available.
> > 
> > This keeps the ifdefs contained in these new functions and all such
> > logic inside the display code.
> > 
> > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > ---
> > 
> > 
> > In v2:
> > 
> >     * Renamed uncore_spin_*() to intel_spin_*()
> >     * Corrected the order: save, lock, unlock, restore
> > 
> > In v3:
> > 
> >     * Undid the change to pass drm_i915_private instead of the lock
> >       itself, since we would have to include i915_drv.h and that pulls
> >       in a truckload of other includes.
> > 
> > In v4:
> > 
> >     * After a brief attempt to replace this with a different patch,
> >       we're back to this one;
> >     * Pass drm_i195_private again, and move the functions to
> >       intel_vblank.c, so we don't need to include i915_drv.h in a
> >       header file and it's already included in intel_vblank.c;
> > 
> > In v5:
> > 
> >     * Remove stray include in intel_display.h;
> >     * Remove unnecessary inline modifiers in the new functions.
> > 
> > In v6:
> > 
> >     * Just removed the umlauts from Ville's name, because patchwork
> >       didn't catch my patch and I suspect it was some UTF-8 confusion.
> > 
> >   drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> >   1 file changed, 39 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 2cec2abf9746..221fcd6bf77b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> >   	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> >   }
> >   
> > +/*
> > + * The uncore version of the spin lock functions is used to decide
> > + * whether we need to lock the uncore lock or not.  This is only
> > + * needed in i915, not in Xe.
> > + *
> > + * This lock in i915 is needed because some old platforms (at least
> > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > + * all register accesses to the same cacheline to be serialized,
> > + * otherwise they may hang.
> > + */
> > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > +{
> > +#ifdef I915
> > +	spin_lock(&i915->uncore.lock);
> > +#endif
> > +}
> > +
> > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > +{
> > +#ifdef I915
> > +	spin_unlock(&i915->uncore.lock);
> > +#endif
> > +}
> > +
> >   static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   				     bool in_vblank_irq,
> >   				     int *vpos, int *hpos,
> > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   	}
> >   
> >   	/*
> > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > -	 * register reads, potentially with preemption disabled, so the
> > -	 * following code must not block on uncore.lock.
> > +	 * Enter vblank critical section, as we will do multiple
> > +	 * timing critical raw register reads, potentially with
> > +	 * preemption disabled, so the following code must not block.
> >   	 */
> > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > +	local_irq_save(irqflags);
> > +	intel_vblank_section_enter(dev_priv);
> 
> Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems 
> all callers from both i915 and xe end up doing that anyway and naming 
> "vblank_start" was presumed there would be more to the section than 
> cacheline mmio bug. I mean that there is some benefit from keeping the 
> readout timings tight.
> 

The reason is that there is one caller that has already disabled
interrupts when this function is called (see below), so we shouldn't do
it again. 


> >   
> >   	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
> >   
> > @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> >   
> >   	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
> >   
> > -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> > +	intel_vblank_section_exit(dev_priv);
> > +	local_irq_restore(irqflags);
> >   
> >   	/*
> >   	 * While in vblank, position will be negative
> > @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
> >   	unsigned long irqflags;
> >   	int position;
> >   
> > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > +	local_irq_save(irqflags);
> > +	intel_vblank_section_enter(dev_priv);
> > +
> >   	position = __intel_get_crtc_scanline(crtc);
> > -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> > +
> > +	intel_vblank_section_exit(dev_priv);
> > +	local_irq_restore(irqflags);
> >   
> >   	return position;
> >   }
> > @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
> >   	 * Need to audit everything to make sure it's safe.
> >   	 */
> >   	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
> > -	spin_lock(&i915->uncore.lock);
> > +	intel_vblank_section_enter(i915);

Here.

--
Cheers,
Luca.

Re: [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Tvrtko Ursulin]

On 30/11/2023 12:26, Coelho, Luciano wrote:
> On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
>> On 30/11/2023 11:35, Luca Coelho wrote:
>>> The uncore code may not always be available (e.g. when we build the
>>> display code with Xe), so we can't always rely on having the uncore's
>>> spinlock.
>>>
>>> To handle this, split the spin_lock/unlock_irqsave/restore() into
>>> spin_lock/unlock() followed by a call to local_irq_save/restore() and
>>> create wrapper functions for locking and unlocking the uncore's
>>> spinlock.  In these functions, we have a condition check and only
>>> actually try to lock/unlock the spinlock when I915 is defined, and
>>> thus uncore is available.
>>>
>>> This keeps the ifdefs contained in these new functions and all such
>>> logic inside the display code.
>>>
>>> Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
>>> ---
>>>
>>>
>>> In v2:
>>>
>>>      * Renamed uncore_spin_*() to intel_spin_*()
>>>      * Corrected the order: save, lock, unlock, restore
>>>
>>> In v3:
>>>
>>>      * Undid the change to pass drm_i915_private instead of the lock
>>>        itself, since we would have to include i915_drv.h and that pulls
>>>        in a truckload of other includes.
>>>
>>> In v4:
>>>
>>>      * After a brief attempt to replace this with a different patch,
>>>        we're back to this one;
>>>      * Pass drm_i195_private again, and move the functions to
>>>        intel_vblank.c, so we don't need to include i915_drv.h in a
>>>        header file and it's already included in intel_vblank.c;
>>>
>>> In v5:
>>>
>>>      * Remove stray include in intel_display.h;
>>>      * Remove unnecessary inline modifiers in the new functions.
>>>
>>> In v6:
>>>
>>>      * Just removed the umlauts from Ville's name, because patchwork
>>>        didn't catch my patch and I suspect it was some UTF-8 confusion.
>>>
>>>    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
>>>    1 file changed, 39 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
>>> index 2cec2abf9746..221fcd6bf77b 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
>>> @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
>>>    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
>>>    }
>>>    
>>> +/*
>>> + * The uncore version of the spin lock functions is used to decide
>>> + * whether we need to lock the uncore lock or not.  This is only
>>> + * needed in i915, not in Xe.
>>> + *
>>> + * This lock in i915 is needed because some old platforms (at least
>>> + * IVB and possibly HSW as well), which are not supported in Xe, need
>>> + * all register accesses to the same cacheline to be serialized,
>>> + * otherwise they may hang.
>>> + */
>>> +static void intel_vblank_section_enter(struct drm_i915_private *i915)
>>> +{
>>> +#ifdef I915
>>> +	spin_lock(&i915->uncore.lock);
>>> +#endif
>>> +}
>>> +
>>> +static void intel_vblank_section_exit(struct drm_i915_private *i915)
>>> +{
>>> +#ifdef I915
>>> +	spin_unlock(&i915->uncore.lock);
>>> +#endif
>>> +}
>>> +
>>>    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    				     bool in_vblank_irq,
>>>    				     int *vpos, int *hpos,
>>> @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    	}
>>>    
>>>    	/*
>>> -	 * Lock uncore.lock, as we will do multiple timing critical raw
>>> -	 * register reads, potentially with preemption disabled, so the
>>> -	 * following code must not block on uncore.lock.
>>> +	 * Enter vblank critical section, as we will do multiple
>>> +	 * timing critical raw register reads, potentially with
>>> +	 * preemption disabled, so the following code must not block.
>>>    	 */
>>> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>>> +	local_irq_save(irqflags);
>>> +	intel_vblank_section_enter(dev_priv);
>>
>> Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
>> all callers from both i915 and xe end up doing that anyway and naming
>> "vblank_start" was presumed there would be more to the section than
>> cacheline mmio bug. I mean that there is some benefit from keeping the
>> readout timings tight.
>>
> 
> The reason is that there is one caller that has already disabled
> interrupts when this function is called (see below), so we shouldn't do
> it again.

Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
it is more a fundamental question which I raise above.

Regards,

Tvrtko

> 
>>>    
>>>    	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
>>>    
>>> @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    
>>>    	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
>>>    
>>> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
>>> +	intel_vblank_section_exit(dev_priv);
>>> +	local_irq_restore(irqflags);
>>>    
>>>    	/*
>>>    	 * While in vblank, position will be negative
>>> @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
>>>    	unsigned long irqflags;
>>>    	int position;
>>>    
>>> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>>> +	local_irq_save(irqflags);
>>> +	intel_vblank_section_enter(dev_priv);
>>> +
>>>    	position = __intel_get_crtc_scanline(crtc);
>>> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
>>> +
>>> +	intel_vblank_section_exit(dev_priv);
>>> +	local_irq_restore(irqflags);
>>>    
>>>    	return position;
>>>    }
>>> @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>>>    	 * Need to audit everything to make sure it's safe.
>>>    	 */
>>>    	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
>>> -	spin_lock(&i915->uncore.lock);
>>> +	intel_vblank_section_enter(i915);
> 
> Here.
> 
> --
> Cheers,
> Luca.

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Tvrtko Ursulin]

On 30/11/2023 12:26, Coelho, Luciano wrote:
> On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
>> On 30/11/2023 11:35, Luca Coelho wrote:
>>> The uncore code may not always be available (e.g. when we build the
>>> display code with Xe), so we can't always rely on having the uncore's
>>> spinlock.
>>>
>>> To handle this, split the spin_lock/unlock_irqsave/restore() into
>>> spin_lock/unlock() followed by a call to local_irq_save/restore() and
>>> create wrapper functions for locking and unlocking the uncore's
>>> spinlock.  In these functions, we have a condition check and only
>>> actually try to lock/unlock the spinlock when I915 is defined, and
>>> thus uncore is available.
>>>
>>> This keeps the ifdefs contained in these new functions and all such
>>> logic inside the display code.
>>>
>>> Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
>>> ---
>>>
>>>
>>> In v2:
>>>
>>>      * Renamed uncore_spin_*() to intel_spin_*()
>>>      * Corrected the order: save, lock, unlock, restore
>>>
>>> In v3:
>>>
>>>      * Undid the change to pass drm_i915_private instead of the lock
>>>        itself, since we would have to include i915_drv.h and that pulls
>>>        in a truckload of other includes.
>>>
>>> In v4:
>>>
>>>      * After a brief attempt to replace this with a different patch,
>>>        we're back to this one;
>>>      * Pass drm_i195_private again, and move the functions to
>>>        intel_vblank.c, so we don't need to include i915_drv.h in a
>>>        header file and it's already included in intel_vblank.c;
>>>
>>> In v5:
>>>
>>>      * Remove stray include in intel_display.h;
>>>      * Remove unnecessary inline modifiers in the new functions.
>>>
>>> In v6:
>>>
>>>      * Just removed the umlauts from Ville's name, because patchwork
>>>        didn't catch my patch and I suspect it was some UTF-8 confusion.
>>>
>>>    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
>>>    1 file changed, 39 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
>>> index 2cec2abf9746..221fcd6bf77b 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
>>> @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
>>>    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
>>>    }
>>>    
>>> +/*
>>> + * The uncore version of the spin lock functions is used to decide
>>> + * whether we need to lock the uncore lock or not.  This is only
>>> + * needed in i915, not in Xe.
>>> + *
>>> + * This lock in i915 is needed because some old platforms (at least
>>> + * IVB and possibly HSW as well), which are not supported in Xe, need
>>> + * all register accesses to the same cacheline to be serialized,
>>> + * otherwise they may hang.
>>> + */
>>> +static void intel_vblank_section_enter(struct drm_i915_private *i915)
>>> +{
>>> +#ifdef I915
>>> +	spin_lock(&i915->uncore.lock);
>>> +#endif
>>> +}
>>> +
>>> +static void intel_vblank_section_exit(struct drm_i915_private *i915)
>>> +{
>>> +#ifdef I915
>>> +	spin_unlock(&i915->uncore.lock);
>>> +#endif
>>> +}
>>> +
>>>    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    				     bool in_vblank_irq,
>>>    				     int *vpos, int *hpos,
>>> @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    	}
>>>    
>>>    	/*
>>> -	 * Lock uncore.lock, as we will do multiple timing critical raw
>>> -	 * register reads, potentially with preemption disabled, so the
>>> -	 * following code must not block on uncore.lock.
>>> +	 * Enter vblank critical section, as we will do multiple
>>> +	 * timing critical raw register reads, potentially with
>>> +	 * preemption disabled, so the following code must not block.
>>>    	 */
>>> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>>> +	local_irq_save(irqflags);
>>> +	intel_vblank_section_enter(dev_priv);
>>
>> Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
>> all callers from both i915 and xe end up doing that anyway and naming
>> "vblank_start" was presumed there would be more to the section than
>> cacheline mmio bug. I mean that there is some benefit from keeping the
>> readout timings tight.
>>
> 
> The reason is that there is one caller that has already disabled
> interrupts when this function is called (see below), so we shouldn't do
> it again.

Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
it is more a fundamental question which I raise above.

Regards,

Tvrtko

> 
>>>    
>>>    	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
>>>    
>>> @@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>>>    
>>>    	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
>>>    
>>> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
>>> +	intel_vblank_section_exit(dev_priv);
>>> +	local_irq_restore(irqflags);
>>>    
>>>    	/*
>>>    	 * While in vblank, position will be negative
>>> @@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
>>>    	unsigned long irqflags;
>>>    	int position;
>>>    
>>> -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>>> +	local_irq_save(irqflags);
>>> +	intel_vblank_section_enter(dev_priv);
>>> +
>>>    	position = __intel_get_crtc_scanline(crtc);
>>> -	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
>>> +
>>> +	intel_vblank_section_exit(dev_priv);
>>> +	local_irq_restore(irqflags);
>>>    
>>>    	return position;
>>>    }
>>> @@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
>>>    	 * Need to audit everything to make sure it's safe.
>>>    	 */
>>>    	spin_lock_irqsave(&i915->drm.vblank_time_lock, irqflags);
>>> -	spin_lock(&i915->uncore.lock);
>>> +	intel_vblank_section_enter(i915);
> 
> Here.
> 
> --
> Cheers,
> Luca.

Re: [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> On 30/11/2023 12:26, Coelho, Luciano wrote:
> > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > The uncore code may not always be available (e.g. when we build the
> > > > display code with Xe), so we can't always rely on having the uncore's
> > > > spinlock.
> > > > 
> > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > create wrapper functions for locking and unlocking the uncore's
> > > > spinlock.  In these functions, we have a condition check and only
> > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > thus uncore is available.
> > > > 
> > > > This keeps the ifdefs contained in these new functions and all such
> > > > logic inside the display code.
> > > > 
> > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > ---
> > > > 
> > > > 
> > > > In v2:
> > > > 
> > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > >      * Corrected the order: save, lock, unlock, restore
> > > > 
> > > > In v3:
> > > > 
> > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > >        itself, since we would have to include i915_drv.h and that pulls
> > > >        in a truckload of other includes.
> > > > 
> > > > In v4:
> > > > 
> > > >      * After a brief attempt to replace this with a different patch,
> > > >        we're back to this one;
> > > >      * Pass drm_i195_private again, and move the functions to
> > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > >        header file and it's already included in intel_vblank.c;
> > > > 
> > > > In v5:
> > > > 
> > > >      * Remove stray include in intel_display.h;
> > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > 
> > > > In v6:
> > > > 
> > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > 
> > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > >    }
> > > >    
> > > > +/*
> > > > + * The uncore version of the spin lock functions is used to decide
> > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > + * needed in i915, not in Xe.
> > > > + *
> > > > + * This lock in i915 is needed because some old platforms (at least
> > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > + * all register accesses to the same cacheline to be serialized,
> > > > + * otherwise they may hang.
> > > > + */
> > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > +{
> > > > +#ifdef I915
> > > > +	spin_lock(&i915->uncore.lock);
> > > > +#endif
> > > > +}
> > > > +
> > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > +{
> > > > +#ifdef I915
> > > > +	spin_unlock(&i915->uncore.lock);
> > > > +#endif
> > > > +}
> > > > +
> > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > >    				     bool in_vblank_irq,
> > > >    				     int *vpos, int *hpos,
> > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > >    	}
> > > >    
> > > >    	/*
> > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > -	 * register reads, potentially with preemption disabled, so the
> > > > -	 * following code must not block on uncore.lock.
> > > > +	 * Enter vblank critical section, as we will do multiple
> > > > +	 * timing critical raw register reads, potentially with
> > > > +	 * preemption disabled, so the following code must not block.
> > > >    	 */
> > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > +	local_irq_save(irqflags);
> > > > +	intel_vblank_section_enter(dev_priv);
> > > 
> > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > all callers from both i915 and xe end up doing that anyway and naming
> > > "vblank_start" was presumed there would be more to the section than
> > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > readout timings tight.
> > > 
> > 
> > The reason is that there is one caller that has already disabled
> > interrupts when this function is called (see below), so we shouldn't do
> > it again.
> 
> Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> it is more a fundamental question which I raise above.

Sure, it should be safe to nest, but it seemed a bit ugly to me.

I can change it, if you prefer, as your point seems valid, but I will
wait to see what Rodrigo says, since he had already given his r-b, lest
we start ping-ponging on this too much.

--
Cheers,
Luca.

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> On 30/11/2023 12:26, Coelho, Luciano wrote:
> > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > The uncore code may not always be available (e.g. when we build the
> > > > display code with Xe), so we can't always rely on having the uncore's
> > > > spinlock.
> > > > 
> > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > create wrapper functions for locking and unlocking the uncore's
> > > > spinlock.  In these functions, we have a condition check and only
> > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > thus uncore is available.
> > > > 
> > > > This keeps the ifdefs contained in these new functions and all such
> > > > logic inside the display code.
> > > > 
> > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > ---
> > > > 
> > > > 
> > > > In v2:
> > > > 
> > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > >      * Corrected the order: save, lock, unlock, restore
> > > > 
> > > > In v3:
> > > > 
> > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > >        itself, since we would have to include i915_drv.h and that pulls
> > > >        in a truckload of other includes.
> > > > 
> > > > In v4:
> > > > 
> > > >      * After a brief attempt to replace this with a different patch,
> > > >        we're back to this one;
> > > >      * Pass drm_i195_private again, and move the functions to
> > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > >        header file and it's already included in intel_vblank.c;
> > > > 
> > > > In v5:
> > > > 
> > > >      * Remove stray include in intel_display.h;
> > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > 
> > > > In v6:
> > > > 
> > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > 
> > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > >    }
> > > >    
> > > > +/*
> > > > + * The uncore version of the spin lock functions is used to decide
> > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > + * needed in i915, not in Xe.
> > > > + *
> > > > + * This lock in i915 is needed because some old platforms (at least
> > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > + * all register accesses to the same cacheline to be serialized,
> > > > + * otherwise they may hang.
> > > > + */
> > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > +{
> > > > +#ifdef I915
> > > > +	spin_lock(&i915->uncore.lock);
> > > > +#endif
> > > > +}
> > > > +
> > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > +{
> > > > +#ifdef I915
> > > > +	spin_unlock(&i915->uncore.lock);
> > > > +#endif
> > > > +}
> > > > +
> > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > >    				     bool in_vblank_irq,
> > > >    				     int *vpos, int *hpos,
> > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > >    	}
> > > >    
> > > >    	/*
> > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > -	 * register reads, potentially with preemption disabled, so the
> > > > -	 * following code must not block on uncore.lock.
> > > > +	 * Enter vblank critical section, as we will do multiple
> > > > +	 * timing critical raw register reads, potentially with
> > > > +	 * preemption disabled, so the following code must not block.
> > > >    	 */
> > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > +	local_irq_save(irqflags);
> > > > +	intel_vblank_section_enter(dev_priv);
> > > 
> > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > all callers from both i915 and xe end up doing that anyway and naming
> > > "vblank_start" was presumed there would be more to the section than
> > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > readout timings tight.
> > > 
> > 
> > The reason is that there is one caller that has already disabled
> > interrupts when this function is called (see below), so we shouldn't do
> > it again.
> 
> Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> it is more a fundamental question which I raise above.

Sure, it should be safe to nest, but it seemed a bit ugly to me.

I can change it, if you prefer, as your point seems valid, but I will
wait to see what Rodrigo says, since he had already given his r-b, lest
we start ping-ponging on this too much.

--
Cheers,
Luca.

Re: [Intel-gfx] [Intel-xe] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Rodrigo Vivi]

On Thu, Nov 30, 2023 at 01:54:13PM +0000, Coelho, Luciano wrote:
> On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> > On 30/11/2023 12:26, Coelho, Luciano wrote:
> > > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > > The uncore code may not always be available (e.g. when we build the
> > > > > display code with Xe), so we can't always rely on having the uncore's
> > > > > spinlock.
> > > > > 
> > > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > > create wrapper functions for locking and unlocking the uncore's
> > > > > spinlock.  In these functions, we have a condition check and only
> > > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > > thus uncore is available.
> > > > > 
> > > > > This keeps the ifdefs contained in these new functions and all such
> > > > > logic inside the display code.
> > > > > 
> > > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > > ---
> > > > > 
> > > > > 
> > > > > In v2:
> > > > > 
> > > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > > >      * Corrected the order: save, lock, unlock, restore
> > > > > 
> > > > > In v3:
> > > > > 
> > > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > > >        itself, since we would have to include i915_drv.h and that pulls
> > > > >        in a truckload of other includes.
> > > > > 
> > > > > In v4:
> > > > > 
> > > > >      * After a brief attempt to replace this with a different patch,
> > > > >        we're back to this one;
> > > > >      * Pass drm_i195_private again, and move the functions to
> > > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > > >        header file and it's already included in intel_vblank.c;
> > > > > 
> > > > > In v5:
> > > > > 
> > > > >      * Remove stray include in intel_display.h;
> > > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > > 
> > > > > In v6:
> > > > > 
> > > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > > 
> > > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > > >    }
> > > > >    
> > > > > +/*
> > > > > + * The uncore version of the spin lock functions is used to decide
> > > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > > + * needed in i915, not in Xe.
> > > > > + *
> > > > > + * This lock in i915 is needed because some old platforms (at least
> > > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > > + * all register accesses to the same cacheline to be serialized,
> > > > > + * otherwise they may hang.
> > > > > + */
> > > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > > +{
> > > > > +#ifdef I915
> > > > > +	spin_lock(&i915->uncore.lock);
> > > > > +#endif
> > > > > +}
> > > > > +
> > > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > > +{
> > > > > +#ifdef I915
> > > > > +	spin_unlock(&i915->uncore.lock);
> > > > > +#endif
> > > > > +}
> > > > > +
> > > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > >    				     bool in_vblank_irq,
> > > > >    				     int *vpos, int *hpos,
> > > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > >    	}
> > > > >    
> > > > >    	/*
> > > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > > -	 * register reads, potentially with preemption disabled, so the
> > > > > -	 * following code must not block on uncore.lock.
> > > > > +	 * Enter vblank critical section, as we will do multiple
> > > > > +	 * timing critical raw register reads, potentially with
> > > > > +	 * preemption disabled, so the following code must not block.
> > > > >    	 */
> > > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > > +	local_irq_save(irqflags);
> > > > > +	intel_vblank_section_enter(dev_priv);
> > > > 
> > > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > > all callers from both i915 and xe end up doing that anyway and naming
> > > > "vblank_start" was presumed there would be more to the section than
> > > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > > readout timings tight.
> > > > 
> > > 
> > > The reason is that there is one caller that has already disabled
> > > interrupts when this function is called (see below), so we shouldn't do
> > > it again.
> > 
> > Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> > it is more a fundamental question which I raise above.
> 
> Sure, it should be safe to nest, but it seemed a bit ugly to me.
> 
> I can change it, if you prefer, as your point seems valid, but I will
> wait to see what Rodrigo says, since he had already given his r-b, lest
> we start ping-ponging on this too much.

I believe we should go with this patch as is, because this brings absolutely
no code change. Even though we believe the irqsave is a safe thing on that
side it would be a change in behavior.

So, probably a follow-up patch to also convert the other case and moving
everything inside the new vblank_start/end functions?

> 
> --
> Cheers,
> Luca.

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Rodrigo Vivi]

On Thu, Nov 30, 2023 at 01:54:13PM +0000, Coelho, Luciano wrote:
> On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> > On 30/11/2023 12:26, Coelho, Luciano wrote:
> > > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > > The uncore code may not always be available (e.g. when we build the
> > > > > display code with Xe), so we can't always rely on having the uncore's
> > > > > spinlock.
> > > > > 
> > > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > > create wrapper functions for locking and unlocking the uncore's
> > > > > spinlock.  In these functions, we have a condition check and only
> > > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > > thus uncore is available.
> > > > > 
> > > > > This keeps the ifdefs contained in these new functions and all such
> > > > > logic inside the display code.
> > > > > 
> > > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > > ---
> > > > > 
> > > > > 
> > > > > In v2:
> > > > > 
> > > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > > >      * Corrected the order: save, lock, unlock, restore
> > > > > 
> > > > > In v3:
> > > > > 
> > > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > > >        itself, since we would have to include i915_drv.h and that pulls
> > > > >        in a truckload of other includes.
> > > > > 
> > > > > In v4:
> > > > > 
> > > > >      * After a brief attempt to replace this with a different patch,
> > > > >        we're back to this one;
> > > > >      * Pass drm_i195_private again, and move the functions to
> > > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > > >        header file and it's already included in intel_vblank.c;
> > > > > 
> > > > > In v5:
> > > > > 
> > > > >      * Remove stray include in intel_display.h;
> > > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > > 
> > > > > In v6:
> > > > > 
> > > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > > 
> > > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > > >    }
> > > > >    
> > > > > +/*
> > > > > + * The uncore version of the spin lock functions is used to decide
> > > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > > + * needed in i915, not in Xe.
> > > > > + *
> > > > > + * This lock in i915 is needed because some old platforms (at least
> > > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > > + * all register accesses to the same cacheline to be serialized,
> > > > > + * otherwise they may hang.
> > > > > + */
> > > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > > +{
> > > > > +#ifdef I915
> > > > > +	spin_lock(&i915->uncore.lock);
> > > > > +#endif
> > > > > +}
> > > > > +
> > > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > > +{
> > > > > +#ifdef I915
> > > > > +	spin_unlock(&i915->uncore.lock);
> > > > > +#endif
> > > > > +}
> > > > > +
> > > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > >    				     bool in_vblank_irq,
> > > > >    				     int *vpos, int *hpos,
> > > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > >    	}
> > > > >    
> > > > >    	/*
> > > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > > -	 * register reads, potentially with preemption disabled, so the
> > > > > -	 * following code must not block on uncore.lock.
> > > > > +	 * Enter vblank critical section, as we will do multiple
> > > > > +	 * timing critical raw register reads, potentially with
> > > > > +	 * preemption disabled, so the following code must not block.
> > > > >    	 */
> > > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > > +	local_irq_save(irqflags);
> > > > > +	intel_vblank_section_enter(dev_priv);
> > > > 
> > > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > > all callers from both i915 and xe end up doing that anyway and naming
> > > > "vblank_start" was presumed there would be more to the section than
> > > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > > readout timings tight.
> > > > 
> > > 
> > > The reason is that there is one caller that has already disabled
> > > interrupts when this function is called (see below), so we shouldn't do
> > > it again.
> > 
> > Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> > it is more a fundamental question which I raise above.
> 
> Sure, it should be safe to nest, but it seemed a bit ugly to me.
> 
> I can change it, if you prefer, as your point seems valid, but I will
> wait to see what Rodrigo says, since he had already given his r-b, lest
> we start ping-ponging on this too much.

I believe we should go with this patch as is, because this brings absolutely
no code change. Even though we believe the irqsave is a safe thing on that
side it would be a change in behavior.

So, probably a follow-up patch to also convert the other case and moving
everything inside the new vblank_start/end functions?

> 
> --
> Cheers,
> Luca.

Re: [Intel-gfx] [Intel-xe] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 09:31 -0500, Rodrigo Vivi wrote:
> On Thu, Nov 30, 2023 at 01:54:13PM +0000, Coelho, Luciano wrote:
> > On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> > > On 30/11/2023 12:26, Coelho, Luciano wrote:
> > > > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > > > The uncore code may not always be available (e.g. when we build the
> > > > > > display code with Xe), so we can't always rely on having the uncore's
> > > > > > spinlock.
> > > > > > 
> > > > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > > > create wrapper functions for locking and unlocking the uncore's
> > > > > > spinlock.  In these functions, we have a condition check and only
> > > > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > > > thus uncore is available.
> > > > > > 
> > > > > > This keeps the ifdefs contained in these new functions and all such
> > > > > > logic inside the display code.
> > > > > > 
> > > > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > > > ---
> > > > > > 
> > > > > > 
> > > > > > In v2:
> > > > > > 
> > > > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > > > >      * Corrected the order: save, lock, unlock, restore
> > > > > > 
> > > > > > In v3:
> > > > > > 
> > > > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > > > >        itself, since we would have to include i915_drv.h and that pulls
> > > > > >        in a truckload of other includes.
> > > > > > 
> > > > > > In v4:
> > > > > > 
> > > > > >      * After a brief attempt to replace this with a different patch,
> > > > > >        we're back to this one;
> > > > > >      * Pass drm_i195_private again, and move the functions to
> > > > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > > > >        header file and it's already included in intel_vblank.c;
> > > > > > 
> > > > > > In v5:
> > > > > > 
> > > > > >      * Remove stray include in intel_display.h;
> > > > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > > > 
> > > > > > In v6:
> > > > > > 
> > > > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > > > 
> > > > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > > > >    }
> > > > > >    
> > > > > > +/*
> > > > > > + * The uncore version of the spin lock functions is used to decide
> > > > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > > > + * needed in i915, not in Xe.
> > > > > > + *
> > > > > > + * This lock in i915 is needed because some old platforms (at least
> > > > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > > > + * all register accesses to the same cacheline to be serialized,
> > > > > > + * otherwise they may hang.
> > > > > > + */
> > > > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > > > +{
> > > > > > +#ifdef I915
> > > > > > +	spin_lock(&i915->uncore.lock);
> > > > > > +#endif
> > > > > > +}
> > > > > > +
> > > > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > > > +{
> > > > > > +#ifdef I915
> > > > > > +	spin_unlock(&i915->uncore.lock);
> > > > > > +#endif
> > > > > > +}
> > > > > > +
> > > > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > > >    				     bool in_vblank_irq,
> > > > > >    				     int *vpos, int *hpos,
> > > > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > > >    	}
> > > > > >    
> > > > > >    	/*
> > > > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > > > -	 * register reads, potentially with preemption disabled, so the
> > > > > > -	 * following code must not block on uncore.lock.
> > > > > > +	 * Enter vblank critical section, as we will do multiple
> > > > > > +	 * timing critical raw register reads, potentially with
> > > > > > +	 * preemption disabled, so the following code must not block.
> > > > > >    	 */
> > > > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > > > +	local_irq_save(irqflags);
> > > > > > +	intel_vblank_section_enter(dev_priv);
> > > > > 
> > > > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > > > all callers from both i915 and xe end up doing that anyway and naming
> > > > > "vblank_start" was presumed there would be more to the section than
> > > > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > > > readout timings tight.
> > > > > 
> > > > 
> > > > The reason is that there is one caller that has already disabled
> > > > interrupts when this function is called (see below), so we shouldn't do
> > > > it again.
> > > 
> > > Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> > > it is more a fundamental question which I raise above.
> > 
> > Sure, it should be safe to nest, but it seemed a bit ugly to me.
> > 
> > I can change it, if you prefer, as your point seems valid, but I will
> > wait to see what Rodrigo says, since he had already given his r-b, lest
> > we start ping-ponging on this too much.
> 
> I believe we should go with this patch as is, because this brings absolutely
> no code change. Even though we believe the irqsave is a safe thing on that
> side it would be a change in behavior.
> 
> So, probably a follow-up patch to also convert the other case and moving
> everything inside the new vblank_start/end functions?

Okay, cool.  So, if someone can merge this patch once it passes CI,
I'll send a follow up patch doing as Tvrtko suggested.

--
Cheers,
Luca.

Re: [Intel-xe] [Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-11-30 at 09:31 -0500, Rodrigo Vivi wrote:
> On Thu, Nov 30, 2023 at 01:54:13PM +0000, Coelho, Luciano wrote:
> > On Thu, 2023-11-30 at 13:24 +0000, Tvrtko Ursulin wrote:
> > > On 30/11/2023 12:26, Coelho, Luciano wrote:
> > > > On Thu, 2023-11-30 at 12:21 +0000, Tvrtko Ursulin wrote:
> > > > > On 30/11/2023 11:35, Luca Coelho wrote:
> > > > > > The uncore code may not always be available (e.g. when we build the
> > > > > > display code with Xe), so we can't always rely on having the uncore's
> > > > > > spinlock.
> > > > > > 
> > > > > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > > > > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > > > > > create wrapper functions for locking and unlocking the uncore's
> > > > > > spinlock.  In these functions, we have a condition check and only
> > > > > > actually try to lock/unlock the spinlock when I915 is defined, and
> > > > > > thus uncore is available.
> > > > > > 
> > > > > > This keeps the ifdefs contained in these new functions and all such
> > > > > > logic inside the display code.
> > > > > > 
> > > > > > Cc: Tvrtko Ursulin <tvrto.ursulin@intel.com>
> > > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > > > > ---
> > > > > > 
> > > > > > 
> > > > > > In v2:
> > > > > > 
> > > > > >      * Renamed uncore_spin_*() to intel_spin_*()
> > > > > >      * Corrected the order: save, lock, unlock, restore
> > > > > > 
> > > > > > In v3:
> > > > > > 
> > > > > >      * Undid the change to pass drm_i915_private instead of the lock
> > > > > >        itself, since we would have to include i915_drv.h and that pulls
> > > > > >        in a truckload of other includes.
> > > > > > 
> > > > > > In v4:
> > > > > > 
> > > > > >      * After a brief attempt to replace this with a different patch,
> > > > > >        we're back to this one;
> > > > > >      * Pass drm_i195_private again, and move the functions to
> > > > > >        intel_vblank.c, so we don't need to include i915_drv.h in a
> > > > > >        header file and it's already included in intel_vblank.c;
> > > > > > 
> > > > > > In v5:
> > > > > > 
> > > > > >      * Remove stray include in intel_display.h;
> > > > > >      * Remove unnecessary inline modifiers in the new functions.
> > > > > > 
> > > > > > In v6:
> > > > > > 
> > > > > >      * Just removed the umlauts from Ville's name, because patchwork
> > > > > >        didn't catch my patch and I suspect it was some UTF-8 confusion.
> > > > > > 
> > > > > >    drivers/gpu/drm/i915/display/intel_vblank.c | 49 ++++++++++++++++-----
> > > > > >    1 file changed, 39 insertions(+), 10 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > index 2cec2abf9746..221fcd6bf77b 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > > > > @@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int scanline)
> > > > > >    	return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> > > > > >    }
> > > > > >    
> > > > > > +/*
> > > > > > + * The uncore version of the spin lock functions is used to decide
> > > > > > + * whether we need to lock the uncore lock or not.  This is only
> > > > > > + * needed in i915, not in Xe.
> > > > > > + *
> > > > > > + * This lock in i915 is needed because some old platforms (at least
> > > > > > + * IVB and possibly HSW as well), which are not supported in Xe, need
> > > > > > + * all register accesses to the same cacheline to be serialized,
> > > > > > + * otherwise they may hang.
> > > > > > + */
> > > > > > +static void intel_vblank_section_enter(struct drm_i915_private *i915)
> > > > > > +{
> > > > > > +#ifdef I915
> > > > > > +	spin_lock(&i915->uncore.lock);
> > > > > > +#endif
> > > > > > +}
> > > > > > +
> > > > > > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > > > > > +{
> > > > > > +#ifdef I915
> > > > > > +	spin_unlock(&i915->uncore.lock);
> > > > > > +#endif
> > > > > > +}
> > > > > > +
> > > > > >    static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > > >    				     bool in_vblank_irq,
> > > > > >    				     int *vpos, int *hpos,
> > > > > > @@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> > > > > >    	}
> > > > > >    
> > > > > >    	/*
> > > > > > -	 * Lock uncore.lock, as we will do multiple timing critical raw
> > > > > > -	 * register reads, potentially with preemption disabled, so the
> > > > > > -	 * following code must not block on uncore.lock.
> > > > > > +	 * Enter vblank critical section, as we will do multiple
> > > > > > +	 * timing critical raw register reads, potentially with
> > > > > > +	 * preemption disabled, so the following code must not block.
> > > > > >    	 */
> > > > > > -	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> > > > > > +	local_irq_save(irqflags);
> > > > > > +	intel_vblank_section_enter(dev_priv);
> > > > > 
> > > > > Shouldn't local_irq_save go into intel_vblank_section_enter()? It seems
> > > > > all callers from both i915 and xe end up doing that anyway and naming
> > > > > "vblank_start" was presumed there would be more to the section than
> > > > > cacheline mmio bug. I mean that there is some benefit from keeping the
> > > > > readout timings tight.
> > > > > 
> > > > 
> > > > The reason is that there is one caller that has already disabled
> > > > interrupts when this function is called (see below), so we shouldn't do
> > > > it again.
> > > 
> > > Yeah I saw that but with irqsave/restore it is safe to nest. So for me 
> > > it is more a fundamental question which I raise above.
> > 
> > Sure, it should be safe to nest, but it seemed a bit ugly to me.
> > 
> > I can change it, if you prefer, as your point seems valid, but I will
> > wait to see what Rodrigo says, since he had already given his r-b, lest
> > we start ping-ponging on this too much.
> 
> I believe we should go with this patch as is, because this brings absolutely
> no code change. Even though we believe the irqsave is a safe thing on that
> side it would be a change in behavior.
> 
> So, probably a follow-up patch to also convert the other case and moving
> everything inside the new vblank_start/end functions?

Okay, cool.  So, if someone can merge this patch once it passes CI,
I'll send a follow up patch doing as Tvrtko suggested.

--
Cheers,
Luca.

[Intel-xe] ✗ CI.Patch_applied: failure for drm/i915: handle uncore spinlock when not available (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: handle uncore spinlock when not available (rev4)
URL   : https://patchwork.freedesktop.org/series/125299/
State : failure

== Summary ==

=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: afdc64535 drm/xe/mocs: update MOCS table for xe2
=== git am output follows ===
error: patch failed: drivers/gpu/drm/i915/display/intel_vblank.c:302
error: drivers/gpu/drm/i915/display/intel_vblank.c: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: drm/i915: handle uncore spinlock when not available
Patch failed at 0001 drm/i915: handle uncore spinlock when not available
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: handle uncore spinlock when not available (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: handle uncore spinlock when not available (rev3)
URL   : https://patchwork.freedesktop.org/series/125442/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_vblank.c:278:13: warning: context imbalance in 'intel_vblank_section_enter' - wrong count at exit
+drivers/gpu/drm/i915/display/intel_vblank.c:285:13: warning: context imbalance in 'intel_vblank_section_exit' - unexpected unlock

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: handle uncore spinlock when not available (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10620 bytes --]

== Series Details ==

Series: drm/i915: handle uncore spinlock when not available (rev3)
URL   : https://patchwork.freedesktop.org/series/125442/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13955 -> Patchwork_125442v3
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/index.html

Participating hosts (36 -> 37)
------------------------------

  Additional (2): bat-rpls-1 fi-pnv-d510 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_125442v3 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-rpls-1:         NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@debugfs_test@basic-hwmon.html

  * igt@fbdev@info:
    - bat-rpls-1:         NOTRUN -> [SKIP][2] ([i915#1849] / [i915#2582])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@fbdev@info.html

  * igt@fbdev@write:
    - bat-rpls-1:         NOTRUN -> [SKIP][3] ([i915#2582]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@fbdev@write.html

  * igt@gem_lmem_swapping@basic:
    - fi-pnv-d510:        NOTRUN -> [SKIP][4] ([fdo#109271]) +25 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/fi-pnv-d510/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@random-engines:
    - bat-rpls-1:         NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_tiled_pread_basic:
    - bat-rpls-1:         NOTRUN -> [SKIP][6] ([i915#3282])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@gem_tiled_pread_basic.html

  * igt@i915_module_load@reload:
    - fi-apl-guc:         [PASS][7] -> [DMESG-WARN][8] ([i915#180] / [i915#1982] / [i915#8585]) +1 other test dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/fi-apl-guc/igt@i915_module_load@reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/fi-apl-guc/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - fi-apl-guc:         [PASS][9] -> [DMESG-WARN][10] ([i915#180] / [i915#8585])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/fi-apl-guc/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/fi-apl-guc/igt@i915_pm_rpm@module-reload.html

  * igt@i915_pm_rps@basic-api:
    - bat-rpls-1:         NOTRUN -> [SKIP][11] ([i915#6621])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-n3050:       [PASS][12] -> [ABORT][13] ([i915#7911])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/fi-bsw-n3050/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@reset:
    - fi-apl-guc:         [PASS][14] -> [DMESG-WARN][15] ([i915#9730]) +36 other tests dmesg-warn
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/fi-apl-guc/igt@i915_selftest@live@reset.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/fi-apl-guc/igt@i915_selftest@live@reset.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-rpls-1:         NOTRUN -> [SKIP][16] ([i915#1845]) +17 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
    - bat-adlp-11:        [PASS][17] -> [DMESG-WARN][18] ([i915#6868])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-adlp-11/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-adlp-11/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - bat-rpls-1:         NOTRUN -> [SKIP][19] ([i915#3637]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-rpls-1:         NOTRUN -> [SKIP][20] ([fdo#109285])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-rpls-1:         NOTRUN -> [SKIP][21] ([i915#1849] / [i915#5354])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence:
    - bat-dg2-11:         NOTRUN -> [SKIP][22] ([i915#1845] / [i915#9197])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-6:
    - bat-adlp-11:        [PASS][23] -> [DMESG-FAIL][24] ([i915#6868])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-6.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-6.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5:
    - bat-adlp-11:        [PASS][25] -> [FAIL][26] ([i915#9747]) +1 other test fail
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
    - bat-rplp-1:         [PASS][27] -> [ABORT][28] ([i915#8668])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-rpls-1:         NOTRUN -> [SKIP][29] ([i915#3555])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-rpls-1:         NOTRUN -> [SKIP][30] ([fdo#109295] / [i915#1845] / [i915#3708])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-write:
    - bat-rpls-1:         NOTRUN -> [SKIP][31] ([fdo#109295] / [i915#3708]) +2 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-rpls-1/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-modeset@b-dp6:
    - bat-adlp-11:        [FAIL][32] ([i915#6121]) -> [PASS][33] +2 other tests pass
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@b-dp6.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@b-dp6.html

  
#### Warnings ####

  * igt@kms_flip@basic-flip-vs-modeset@d-dp6:
    - bat-adlp-11:        [FAIL][34] ([i915#6121]) -> [DMESG-WARN][35] ([i915#6868])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@d-dp6.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@d-dp6.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#8585]: https://gitlab.freedesktop.org/drm/intel/issues/8585
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
  [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
  [i915#9730]: https://gitlab.freedesktop.org/drm/intel/issues/9730
  [i915#9736]: https://gitlab.freedesktop.org/drm/intel/issues/9736
  [i915#9747]: https://gitlab.freedesktop.org/drm/intel/issues/9747


Build changes
-------------

  * Linux: CI_DRM_13955 -> Patchwork_125442v3

  CI-20190529: 20190529
  CI_DRM_13955: d835c627d25ba8775624ff3e854d034708044ac3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7612: b5c47966901ee1060bcb9d4bccdd3ccec9651ef4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_125442v3: d835c627d25ba8775624ff3e854d034708044ac3 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

285ecfd2de55 drm/i915: handle uncore spinlock when not available

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/index.html

[-- Attachment #2: Type: text/html, Size: 12441 bytes --]

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: handle uncore spinlock when not available (rev3)

[Patchwork]

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== Series Details ==

Series: drm/i915: handle uncore spinlock when not available (rev3)
URL   : https://patchwork.freedesktop.org/series/125442/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13955_full -> Patchwork_125442v3_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_125442v3_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_125442v3_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 12)
------------------------------

  Additional (1): shard-tglu0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_125442v3_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_ctx_isolation@nonpriv-switch@rcs0:
    - shard-dg2:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-11/igt@gem_ctx_isolation@nonpriv-switch@rcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_ctx_isolation@nonpriv-switch@rcs0.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_psr@pr_sprite_blt}:
    - shard-dg2:          [SKIP][3] ([i915#9673] / [i915#9736]) -> [TIMEOUT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-11/igt@kms_psr@pr_sprite_blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_psr@pr_sprite_blt.html

  
Known issues
------------

  Here are the changes found in Patchwork_125442v3_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@drm_fdinfo@busy-idle-check-all@vcs0:
    - shard-dg2:          NOTRUN -> [SKIP][5] ([i915#8414]) +10 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@drm_fdinfo@busy-idle-check-all@vcs0.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][6] ([i915#7742])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
    - shard-rkl:          [PASS][7] -> [FAIL][8] ([i915#7742])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html

  * igt@drm_fdinfo@virtual-busy-all:
    - shard-dg1:          NOTRUN -> [SKIP][9] ([i915#8414])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@drm_fdinfo@virtual-busy-all.html

  * igt@fbdev@info:
    - shard-rkl:          [PASS][10] -> [SKIP][11] ([i915#1849] / [i915#2582])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-7/igt@fbdev@info.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@fbdev@info.html

  * igt@gem_bad_reloc@negative-reloc-lut:
    - shard-dg1:          NOTRUN -> [SKIP][12] ([i915#3281]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_bad_reloc@negative-reloc-lut.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-rkl:          NOTRUN -> [SKIP][14] ([i915#6335])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg1:          NOTRUN -> [SKIP][15] ([i915#8562])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-rkl:          NOTRUN -> [FAIL][16] ([i915#6268])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_ctx_persistence@heartbeat-close:
    - shard-dg1:          NOTRUN -> [SKIP][17] ([i915#8555])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_ctx_persistence@heartbeat-close.html

  * igt@gem_ctx_sseu@engines:
    - shard-rkl:          NOTRUN -> [SKIP][18] ([i915#280])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_ctx_sseu@engines.html

  * igt@gem_eio@hibernate:
    - shard-rkl:          NOTRUN -> [ABORT][19] ([i915#7975] / [i915#8213])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@bonded-dual:
    - shard-dg1:          NOTRUN -> [SKIP][20] ([i915#4771])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_exec_balancer@bonded-dual.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-dg2:          NOTRUN -> [SKIP][21] ([i915#4771])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@noheartbeat:
    - shard-dg2:          NOTRUN -> [SKIP][22] ([i915#8555]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@gem_exec_balancer@noheartbeat.html
    - shard-mtlp:         NOTRUN -> [SKIP][23] ([i915#8555]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_exec_balancer@noheartbeat.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-rkl:          NOTRUN -> [SKIP][24] ([i915#4525])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_capture@many-4k-incremental:
    - shard-glk:          NOTRUN -> [FAIL][25] ([i915#9606])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk6/igt@gem_exec_capture@many-4k-incremental.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-dg1:          NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_exec_fair@basic-deadline.html
    - shard-tglu:         [PASS][27] -> [FAIL][28] ([i915#2846])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-2/igt@gem_exec_fair@basic-deadline.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-2/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         [PASS][29] -> [FAIL][30] ([i915#2842]) +1 other test fail
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-6/igt@gem_exec_fair@basic-none-share@rcs0.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-5/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][31] ([i915#2842])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_exec_fair@basic-none-vip@rcs0.html
    - shard-glk:          NOTRUN -> [FAIL][32] ([i915#2842])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk9/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-pace-share:
    - shard-dg2:          NOTRUN -> [SKIP][33] ([i915#3539] / [i915#4852])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_exec_fair@basic-pace-share.html

  * igt@gem_exec_fair@basic-pace-solo:
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#3539])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_exec_fair@basic-pace-solo.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [PASS][35] -> [FAIL][36] ([i915#2842]) +2 other tests fail
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fence@submit67:
    - shard-dg2:          NOTRUN -> [SKIP][37] ([i915#4812]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_params@secure-non-root:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([fdo#112283])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gem_exec_params@secure-non-root.html

  * igt@gem_exec_reloc@basic-cpu-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#3281]) +6 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gem_exec_reloc@basic-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-gtt-read:
    - shard-rkl:          NOTRUN -> [SKIP][40] ([i915#3281]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_exec_reloc@basic-gtt-read.html

  * igt@gem_exec_reloc@basic-range-active:
    - shard-mtlp:         NOTRUN -> [SKIP][41] ([i915#3281])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_exec_reloc@basic-range-active.html

  * igt@gem_exec_schedule@preempt-queue:
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#4537] / [i915#4812])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gem_exec_schedule@preempt-queue.html

  * igt@gem_exec_schedule@preempt-queue-contexts:
    - shard-dg1:          NOTRUN -> [SKIP][43] ([i915#4812])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_exec_schedule@preempt-queue-contexts.html

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - shard-dg2:          [PASS][44] -> [INCOMPLETE][45] ([i915#9275])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-2/igt@gem_exec_suspend@basic-s0@lmem0.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-6/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@gem_exec_suspend@basic-s4-devices@lmem0:
    - shard-dg2:          [PASS][46] -> [ABORT][47] ([i915#7975] / [i915#8213])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-11/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_exec_suspend@basic-s4-devices@lmem0.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy:
    - shard-dg1:          NOTRUN -> [SKIP][48] ([i915#4860])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][49] ([i915#4860])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][50] ([i915#4613])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#4613])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify:
    - shard-rkl:          NOTRUN -> [SKIP][52] ([i915#4613]) +2 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_lmem_swapping@verify.html

  * igt@gem_media_fill@media-fill:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#8289])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_media_fill@media-fill.html

  * igt@gem_mmap_gtt@basic-small-bo-tiledx:
    - shard-mtlp:         NOTRUN -> [SKIP][54] ([i915#4077])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_mmap_gtt@basic-small-bo-tiledx.html

  * igt@gem_mmap_gtt@basic-wc:
    - shard-dg1:          NOTRUN -> [SKIP][55] ([i915#4077]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_mmap_gtt@basic-wc.html

  * igt@gem_mmap_gtt@medium-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4077]) +6 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gem_mmap_gtt@medium-copy-xy.html

  * igt@gem_mmap_wc@bad-object:
    - shard-mtlp:         NOTRUN -> [SKIP][57] ([i915#4083])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_mmap_wc@bad-object.html

  * igt@gem_mmap_wc@close:
    - shard-dg2:          NOTRUN -> [SKIP][58] ([i915#4083]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gem_mmap_wc@close.html

  * igt@gem_partial_pwrite_pread@write-display:
    - shard-dg2:          NOTRUN -> [SKIP][59] ([i915#3282]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_partial_pwrite_pread@write-display.html

  * igt@gem_pread@display:
    - shard-rkl:          NOTRUN -> [SKIP][60] ([i915#3282]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_pread@display.html
    - shard-dg1:          NOTRUN -> [SKIP][61] ([i915#3282]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_pread@display.html

  * igt@gem_pwrite_snooped:
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#3282]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_pwrite_snooped.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#4270]) +2 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@verify-pxp-stale-buf-execution:
    - shard-dg2:          NOTRUN -> [SKIP][64] ([i915#4270])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_pxp@verify-pxp-stale-buf-execution.html

  * igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][65] ([i915#8428]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-tiled:
    - shard-rkl:          NOTRUN -> [SKIP][66] ([i915#8411])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#4079])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][68] ([i915#4079])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#4885])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_softpin@evict-snoop-interruptible.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-glk:          NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#3323])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk9/igt@gem_userptr_blits@dmabuf-sync.html
    - shard-rkl:          NOTRUN -> [SKIP][71] ([i915#3323])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][72] ([i915#3297]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#3297] / [i915#4880])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gen3_render_linear_blits:
    - shard-rkl:          NOTRUN -> [SKIP][74] ([fdo#109289]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gen3_render_linear_blits.html

  * igt@gen7_exec_parse@basic-allocation:
    - shard-mtlp:         NOTRUN -> [SKIP][75] ([fdo#109289]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@gen7_exec_parse@basic-allocation.html

  * igt@gen7_exec_parse@batch-without-end:
    - shard-dg2:          NOTRUN -> [SKIP][76] ([fdo#109289]) +4 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@gen7_exec_parse@batch-without-end.html

  * igt@gen9_exec_parse@batch-without-end:
    - shard-dg1:          NOTRUN -> [SKIP][77] ([i915#2527])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@gen9_exec_parse@batch-without-end.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          NOTRUN -> [SKIP][78] ([i915#2527]) +2 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#2856]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@gen9_exec_parse@bb-start-param.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [PASS][80] -> [ABORT][81] ([i915#9697])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pipe_stress@stress-xrgb8888-ytiled:
    - shard-dg2:          NOTRUN -> [SKIP][82] ([i915#7091])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-rkl:          NOTRUN -> [SKIP][83] ([fdo#109293] / [fdo#109506])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_pm_rps@thresholds-idle@gt0:
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#8925])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@i915_pm_rps@thresholds-idle@gt0.html

  * igt@i915_pm_rps@thresholds-park@gt0:
    - shard-dg2:          NOTRUN -> [SKIP][85] ([i915#8925])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@i915_pm_rps@thresholds-park@gt0.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-dg2:          NOTRUN -> [SKIP][86] ([i915#6188])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_query@query-topology-unsupported:
    - shard-dg2:          NOTRUN -> [SKIP][87] ([fdo#109302])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@i915_query@query-topology-unsupported.html

  * igt@i915_selftest@live@requests:
    - shard-mtlp:         [PASS][88] -> [DMESG-FAIL][89] ([i915#9694])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-mtlp-3/igt@i915_selftest@live@requests.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-7/igt@i915_selftest@live@requests.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2:
    - shard-glk:          [PASS][90] -> [FAIL][91] ([i915#2521])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-glk6/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk4/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-vga-1-linear:
    - shard-snb:          NOTRUN -> [SKIP][92] ([fdo#109271]) +5 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-snb6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-vga-1-linear.html

  * igt@kms_async_flips@test-cursor:
    - shard-mtlp:         NOTRUN -> [SKIP][93] ([i915#6229])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_async_flips@test-cursor.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-dg2:          NOTRUN -> [SKIP][94] ([i915#1769] / [i915#3555])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing:
    - shard-rkl:          NOTRUN -> [SKIP][95] ([fdo#112022] / [i915#1845] / [i915#4098])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][96] ([i915#4538] / [i915#5286]) +1 other test skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][97] ([fdo#111614]) +4 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][98] ([i915#5286]) +2 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-mtlp:         NOTRUN -> [SKIP][99] ([fdo#111614])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][100] ([fdo#111614] / [i915#3638])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#5190]) +13 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-tglu:         [PASS][102] -> [FAIL][103] ([i915#3743]) +1 other test fail
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][104] ([fdo#110723])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][105] ([fdo#111615]) +2 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][106] ([i915#4538] / [i915#5190]) +4 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#4087]) +3 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-mtlp:         NOTRUN -> [SKIP][108] ([i915#7828]) +1 other test skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-dg2:          NOTRUN -> [SKIP][109] ([fdo#111827]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][110] ([fdo#111827])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-mtlp:         NOTRUN -> [SKIP][111] ([fdo#111827])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#7828]) +7 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-glk:          NOTRUN -> [SKIP][113] ([fdo#109271]) +48 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk6/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-rkl:          NOTRUN -> [SKIP][114] ([i915#7828]) +6 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][115] ([i915#7828]) +2 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_color@legacy-gamma-reset@pipe-b:
    - shard-rkl:          [PASS][116] -> [SKIP][117] ([i915#4098]) +5 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-7/igt@kms_color@legacy-gamma-reset@pipe-b.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_color@legacy-gamma-reset@pipe-b.html

  * igt@kms_content_protection@legacy:
    - shard-dg2:          NOTRUN -> [SKIP][118] ([i915#7118])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_content_protection@legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][119] ([i915#6944])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#7118])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][121] ([i915#1339])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_content_protection@uevent@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][122] ([fdo#109279] / [i915#3359])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#3359])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html
    - shard-dg1:          NOTRUN -> [SKIP][124] ([i915#3359])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][125] ([i915#3555]) +2 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#3555]) +3 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_cursor_crc@cursor-sliding-max-size.html
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([i915#3555] / [i915#8814])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][128] ([fdo#109274] / [i915#5354]) +4 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][129] ([i915#3546]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#4103] / [i915#4213] / [i915#5608])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][131] ([fdo#111825]) +6 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][132] -> [FAIL][133] ([i915#2346])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#4103])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-dg1:          NOTRUN -> [SKIP][135] ([i915#8588])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][136] ([i915#3804])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_draw_crc@draw-method-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][137] ([i915#8812])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_draw_crc@draw-method-mmap-wc.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#3555] / [i915#3840] / [i915#4098])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_dsc@dsc-with-bpc-formats.html
    - shard-mtlp:         NOTRUN -> [SKIP][139] ([i915#3555] / [i915#3840] / [i915#4098])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#3555] / [i915#3840])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-snb:          NOTRUN -> [SKIP][141] ([fdo#109271] / [fdo#111767])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-snb2/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-flip-vs-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][142] ([i915#8381]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_flip@2x-flip-vs-fences-interruptible.html
    - shard-mtlp:         NOTRUN -> [SKIP][143] ([i915#8381]) +1 other test skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_flip@2x-flip-vs-fences-interruptible.html

  * igt@kms_flip@2x-flip-vs-wf_vblank:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([fdo#109274]) +4 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_flip@2x-flip-vs-wf_vblank.html

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - shard-rkl:          NOTRUN -> [SKIP][145] ([i915#3637] / [i915#4098]) +11 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][146] ([i915#2672]) +4 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][147] ([i915#2587] / [i915#2672]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([i915#2672])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][149] ([i915#2672]) +2 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#3555]) +14 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
    - shard-dg2:          NOTRUN -> [SKIP][151] ([i915#5354]) +27 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([i915#8708]) +22 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-mtlp:         NOTRUN -> [SKIP][153] ([i915#1825]) +9 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][154] ([fdo#111825] / [i915#1825]) +24 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
    - shard-rkl:          [PASS][155] -> [SKIP][156] ([i915#1849] / [i915#4098] / [i915#5354]) +15 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][157] ([i915#8708])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][158] ([i915#3458]) +15 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][159] ([i915#3458]) +3 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][160] ([fdo#111825]) +7 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#3023]) +12 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][162] ([i915#8708]) +3 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#3555] / [i915#8228]) +1 other test skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_invalid_mode@int-max-clock:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#3555] / [i915#4098])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_invalid_mode@int-max-clock.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-mtlp:         NOTRUN -> [SKIP][165] ([i915#4816])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#4816])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#6301])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_crc_basic@bad-source:
    - shard-rkl:          [PASS][168] -> [SKIP][169] ([i915#1845] / [i915#4098]) +32 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_pipe_crc_basic@bad-source.html
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_pipe_crc_basic@bad-source.html

  * igt@kms_plane@plane-position-hole-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#4098] / [i915#8825]) +3 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane@plane-position-hole-dpms.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][171] ([i915#4573]) +1 other test fail
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-glk6/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-rkl:          NOTRUN -> [SKIP][172] ([i915#1845] / [i915#4098]) +20 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][173] ([i915#8292])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][174] ([i915#8292])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][175] ([i915#5176] / [i915#9423]) +1 other test skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#4098] / [i915#6953] / [i915#8152]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][177] ([i915#5235]) +11 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-13/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][178] ([i915#6953] / [i915#8152]) +1 other test skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][179] ([i915#5235]) +11 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d-dp-4.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][180] ([i915#5235]) +3 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][181] ([i915#5235]) +6 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][182] ([i915#3555] / [i915#5235])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][183] ([i915#3555] / [i915#4098] / [i915#6953] / [i915#8152])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html

  * igt@kms_prime@basic-crc-vgem:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#6524])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_prime@basic-crc-vgem.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#9683])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
    - shard-dg1:          NOTRUN -> [SKIP][186] ([i915#9683])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][187] ([fdo#111068] / [i915#9683])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
    - shard-dg1:          NOTRUN -> [SKIP][188] ([fdo#111068] / [i915#9683])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_psr2_sf@plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][189] ([i915#9683]) +1 other test skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@psr2_dpms:
    - shard-dg2:          NOTRUN -> [SKIP][190] ([i915#9673] / [i915#9732]) +3 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_psr@psr2_dpms.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-rkl:          NOTRUN -> [SKIP][191] ([i915#9685])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][192] ([i915#4235]) +1 other test skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_rotation_crc@sprite-rotation-90.html
    - shard-mtlp:         NOTRUN -> [SKIP][193] ([i915#4235])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-dg2:          NOTRUN -> [SKIP][194] ([i915#3555] / [i915#4098])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_setmode@basic-clone-single-crtc.html
    - shard-mtlp:         NOTRUN -> [SKIP][195] ([i915#3555] / [i915#8809])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg1:          NOTRUN -> [FAIL][196] ([IGT#2] / [i915#6493])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@kms_sysfs_edid_timing.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-mtlp:         NOTRUN -> [SKIP][197] ([i915#8623])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_tiled_display@basic-test-pattern.html
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#8623])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_universal_plane@universal-plane-sanity:
    - shard-rkl:          NOTRUN -> [SKIP][199] ([i915#4098]) +13 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_universal_plane@universal-plane-sanity.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([i915#2437]) +1 other test skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-mtlp:         NOTRUN -> [SKIP][201] ([i915#2437])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@kms_writeback@writeback-invalid-parameters.html
    - shard-dg2:          NOTRUN -> [SKIP][202] ([i915#2437])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#2436])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@global-sseu-config-invalid:
    - shard-mtlp:         NOTRUN -> [SKIP][204] ([i915#7387])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@perf@global-sseu-config-invalid.html
    - shard-dg2:          NOTRUN -> [SKIP][205] ([i915#7387])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@perf@global-sseu-config-invalid.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [PASS][206] -> [FAIL][207] ([i915#7484])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-5/igt@perf@non-zero-reason@0-rcs0.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-5/igt@perf@non-zero-reason@0-rcs0.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-rkl:          NOTRUN -> [SKIP][208] ([i915#8850])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@perf_pmu@cpu-hotplug.html

  * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][209] ([i915#5493])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html

  * igt@prime_udl:
    - shard-dg2:          NOTRUN -> [SKIP][210] ([fdo#109291])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-7/igt@prime_udl.html
    - shard-mtlp:         NOTRUN -> [SKIP][211] ([fdo#109291])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@prime_udl.html

  * igt@prime_vgem@coherency-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][212] ([i915#3708] / [i915#4077])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@prime_vgem@coherency-gtt.html

  * igt@prime_vgem@fence-read-hang:
    - shard-rkl:          NOTRUN -> [SKIP][213] ([fdo#109295] / [i915#3708])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@prime_vgem@fence-read-hang.html
    - shard-dg1:          NOTRUN -> [SKIP][214] ([i915#3708])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@prime_vgem@fence-read-hang.html

  * igt@v3d/v3d_submit_cl@multi-and-single-sync:
    - shard-dg1:          NOTRUN -> [SKIP][215] ([i915#2575]) +2 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@v3d/v3d_submit_cl@multi-and-single-sync.html

  * igt@v3d/v3d_submit_cl@simple-flush-cache:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([fdo#109315]) +7 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@v3d/v3d_submit_cl@simple-flush-cache.html

  * igt@v3d/v3d_submit_csd@bad-bo:
    - shard-mtlp:         NOTRUN -> [SKIP][217] ([i915#2575]) +1 other test skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@v3d/v3d_submit_csd@bad-bo.html

  * igt@v3d/v3d_submit_csd@job-perfmon:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#2575]) +10 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-2/igt@v3d/v3d_submit_csd@job-perfmon.html

  * igt@vc4/vc4_tiling@get-bad-flags:
    - shard-mtlp:         NOTRUN -> [SKIP][219] ([i915#7711]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@vc4/vc4_tiling@get-bad-flags.html

  * igt@vc4/vc4_tiling@set-get:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#7711]) +7 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-11/igt@vc4/vc4_tiling@set-get.html

  * igt@vc4/vc4_wait_seqno@bad-seqno-1ns:
    - shard-rkl:          NOTRUN -> [SKIP][221] ([i915#7711]) +4 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@vc4/vc4_wait_seqno@bad-seqno-1ns.html
    - shard-dg1:          NOTRUN -> [SKIP][222] ([i915#7711]) +1 other test skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-16/igt@vc4/vc4_wait_seqno@bad-seqno-1ns.html

  
#### Possible fixes ####

  * igt@fbdev@nullptr:
    - shard-rkl:          [SKIP][223] ([i915#2582]) -> [PASS][224]
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@fbdev@nullptr.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@fbdev@nullptr.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-rkl:          [FAIL][225] ([i915#2842]) -> [PASS][226]
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@gem_exec_fair@basic-pace@vecs0.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][227] ([i915#5493]) -> [PASS][228]
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-19/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-rkl:          [SKIP][229] ([i915#1850]) -> [PASS][230]
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@gem_mmap_wc@set-cache-level.html
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@gem_mmap_wc@set-cache-level.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [WARN][231] ([i915#7356]) -> [PASS][232]
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-7/igt@i915_module_load@reload-with-fault-injection.html
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@i915_module_load@reload-with-fault-injection.html

  * {igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0}:
    - shard-dg1:          [FAIL][233] ([i915#3591]) -> [PASS][234]
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html

  * igt@i915_selftest@live@gem_contexts:
    - shard-mtlp:         [DMESG-FAIL][235] -> [PASS][236]
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-mtlp-3/igt@i915_selftest@live@gem_contexts.html
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-7/igt@i915_selftest@live@gem_contexts.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-rkl:          [FAIL][237] ([fdo#103375]) -> [PASS][238]
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@i915_suspend@basic-s3-without-i915.html
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-tglu:         [FAIL][239] ([i915#3743]) -> [PASS][240] +2 other tests pass
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * {igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-gen12-rc-ccs-cc}:
    - shard-rkl:          [SKIP][241] ([i915#4098]) -> [PASS][242] +7 other tests pass
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-rkl:          [SKIP][243] ([i915#1845] / [i915#4098]) -> [PASS][244] +16 other tests pass
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@single-move@all-pipes:
    - shard-mtlp:         [DMESG-WARN][245] ([i915#2017]) -> [PASS][246]
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-mtlp-4/igt@kms_cursor_legacy@single-move@all-pipes.html
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-8/igt@kms_cursor_legacy@single-move@all-pipes.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-dg2:          [FAIL][247] ([i915#6880]) -> [PASS][248]
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-rkl:          [SKIP][249] ([i915#1849] / [i915#4098] / [i915#5354]) -> [PASS][250] +8 other tests pass
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * {igt@kms_plane@planar-pixel-format-settings}:
    - shard-rkl:          [SKIP][251] ([i915#9581]) -> [PASS][252]
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_plane@planar-pixel-format-settings.html
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_plane@planar-pixel-format-settings.html

  * {igt@kms_pm_rpm@fences}:
    - shard-rkl:          [SKIP][253] ([i915#1849]) -> [PASS][254]
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_pm_rpm@fences.html
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_pm_rpm@fences.html

  * {igt@kms_pm_rpm@modeset-lpsp-stress-no-wait}:
    - shard-rkl:          [SKIP][255] ([i915#9519]) -> [PASS][256]
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_properties@plane-properties-atomic:
    - shard-rkl:          [SKIP][257] ([i915#1849] / [i915#4098]) -> [PASS][258] +1 other test pass
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_properties@plane-properties-atomic.html
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_properties@plane-properties-atomic.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-tglu:         [FAIL][259] ([i915#9196]) -> [PASS][260]
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-3/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1:
    - shard-snb:          [FAIL][261] ([i915#9196]) -> [PASS][262]
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-snb6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1.html
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-snb5/igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1.html

  * igt@perf_pmu@multi-client@vcs0:
    - shard-mtlp:         [FAIL][263] ([i915#4349]) -> [PASS][264]
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-mtlp-5/igt@perf_pmu@multi-client@vcs0.html
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-mtlp-2/igt@perf_pmu@multi-client@vcs0.html

  
#### Warnings ####

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglu:         [FAIL][265] ([i915#2842]) -> [FAIL][266] ([i915#2876])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-tglu-9/igt@gem_exec_fair@basic-pace@rcs0.html
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-tglu-7/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-rkl:          [SKIP][267] ([i915#1769] / [i915#3555]) -> [SKIP][268] ([i915#1845] / [i915#4098])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-0:
    - shard-rkl:          [SKIP][269] ([i915#5286]) -> [SKIP][270] ([i915#1845] / [i915#4098]) +7 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-rkl:          [SKIP][271] ([i915#1845] / [i915#4098]) -> [SKIP][272] ([i915#5286]) +4 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_big_fb@4-tiled-addfb.html
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-rkl:          [SKIP][273] ([fdo#111614] / [i915#3638]) -> [SKIP][274] ([i915#1845] / [i915#4098]) +3 other tests skip
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-rkl:          [SKIP][275] ([i915#1845] / [i915#4098]) -> [SKIP][276] ([fdo#110723]) +4 other tests skip
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-rkl:          [SKIP][277] ([fdo#110723]) -> [SKIP][278] ([i915#1845] / [i915#4098]) +8 other tests skip
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_color@deep-color:
    - shard-rkl:          [SKIP][279] ([i915#3555]) -> [SKIP][280] ([i915#3546] / [i915#4098])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_color@deep-color.html
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_color@deep-color.html

  * igt@kms_content_protection@atomic:
    - shard-rkl:          [SKIP][281] ([i915#1845] / [i915#4098]) -> [SKIP][282] ([i915#7118])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_content_protection@atomic.html
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-rkl:          [SKIP][283] ([i915#3116]) -> [SKIP][284] ([i915#1845] / [i915#4098])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_content_protection@dp-mst-lic-type-0.html
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-rkl:          [SKIP][285] ([i915#1845] / [i915#4098]) -> [SKIP][286] ([i915#3116])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_content_protection@dp-mst-type-1.html
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@uevent:
    - shard-rkl:          [SKIP][287] ([i915#7118]) -> [SKIP][288] ([i915#1845] / [i915#4098])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_content_protection@uevent.html
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-rkl:          [SKIP][289] ([i915#1845] / [i915#4098]) -> [SKIP][290] ([fdo#109279] / [i915#3359])
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_cursor_crc@cursor-offscreen-512x170.html
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          [SKIP][291] ([i915#3359]) -> [SKIP][292] ([i915#1845] / [i915#4098]) +3 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_cursor_crc@cursor-offscreen-512x512.html
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-rkl:          [SKIP][293] ([i915#1845] / [i915#4098]) -> [SKIP][294] ([i915#3359])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_cursor_crc@cursor-random-512x170.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][295] ([i915#3555]) -> [SKIP][296] ([i915#1845] / [i915#4098]) +6 other tests skip
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          [SKIP][297] ([i915#4103]) -> [SKIP][298] ([i915#1845] / [i915#4098])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          [SKIP][299] ([fdo#111825]) -> [SKIP][300] ([i915#1845] / [i915#4098]) +4 other tests skip
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-7/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-rkl:          [SKIP][301] ([i915#1845] / [i915#4098]) -> [SKIP][302] ([fdo#111825]) +3 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-rkl:          [SKIP][303] ([i915#1845] / [i915#4098]) -> [SKIP][304] ([i915#4103])
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dsc@dsc-basic:
    - shard-rkl:          [SKIP][305] ([i915#3555] / [i915#3840]) -> [SKIP][306] ([i915#4098])
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_dsc@dsc-basic.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-rkl:          [SKIP][307] ([i915#4098]) -> [SKIP][308] ([i915#3840])
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_dsc@dsc-fractional-bpp.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          [SKIP][309] ([fdo#110189] / [i915#3955]) -> [SKIP][310] ([i915#3955])
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_fbcon_fbt@psr-suspend.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt:
    - shard-rkl:          [SKIP][311] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][312] ([fdo#111825]) +1 other test skip
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][313] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][314] ([fdo#111825] / [i915#1825]) +25 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-rkl:          [SKIP][315] ([fdo#111825] / [i915#1825]) -> [SKIP][316] ([i915#1849] / [i915#4098] / [i915#5354]) +55 other tests skip
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
    - shard-rkl:          [SKIP][317] ([fdo#111825]) -> [SKIP][318] ([i915#1849] / [i915#4098] / [i915#5354])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-rkl:          [SKIP][319] ([i915#5439]) -> [SKIP][320] ([i915#1849] / [i915#4098] / [i915#5354])
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - shard-rkl:          [SKIP][321] ([i915#1849] / [i915#4098] / [i915#5354]) -> [SKIP][322] ([i915#3023]) +12 other tests skip
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
    - shard-rkl:          [SKIP][323] ([i915#3023]) -> [SKIP][324] ([i915#1849] / [i915#4098] / [i915#5354]) +31 other tests skip
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          [SKIP][325] ([i915#4098]) -> [SKIP][326] ([i915#3555] / [i915#8228])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_hdr@invalid-hdr.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-rkl:          [SKIP][327] ([i915#3555] / [i915#8228]) -> [SKIP][328] ([i915#4098])
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_hdr@invalid-metadata-sizes.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-rkl:          [SKIP][329] ([i915#3555] / [i915#8228]) -> [SKIP][330] ([i915#1845] / [i915#4098]) +1 other test skip
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_hdr@static-toggle-suspend.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_panel_fitting@legacy:
    - shard-rkl:          [SKIP][331] ([i915#1845] / [i915#4098]) -> [SKIP][332] ([i915#6301])
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_panel_fitting@legacy.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-2/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-rkl:          [SKIP][333] ([fdo#111825]) -> [SKIP][334] ([fdo#111825] / [i915#8152])
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-4/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-rkl:          [SKIP][335] ([i915#9673] / [i915#9732]) -> [SKIP][336] ([i915#9673]) +3 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_psr@psr2_cursor_plane_onoff.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-rkl:          [SKIP][337] ([i915#9673]) -> [SKIP][338] ([i915#9673] / [i915#9732]) +2 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][339] ([i915#5289]) -> [SKIP][340] ([i915#1845] / [i915#4098])
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][341] ([i915#1845] / [i915#4098]) -> [SKIP][342] ([fdo#111615] / [i915#5289])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-rkl:          [SKIP][343] ([fdo#111615] / [i915#5289]) -> [SKIP][344] ([i915#1845] / [i915#4098]) +1 other test skip
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-rkl:          [SKIP][345] ([i915#1845] / [i915#4098]) -> [SKIP][346] ([i915#3555]) +1 other test skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13955/shard-rkl-1/igt@kms_scaling_modes@scaling-mode-none.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/shard-rkl-4/igt@kms_scaling_modes@scaling-mode-none.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188
  [i915#6229]: https://gitlab.freedesktop.org/drm/intel/issues/6229
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7356]: https://gitlab.freedesktop.org/drm/intel/issues/7356
  [i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
  [i915#7484]: https://gitlab.freedesktop.org/drm/intel/issues/7484
  [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
  [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562
  [i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
  [i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
  [i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
  [i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
  [i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
  [i915#8825]: https://gitlab.freedesktop.org/drm/intel/issues/8825
  [i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
  [i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
  [i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
  [i915#9067]: https://gitlab.freedesktop.org/drm/intel/issues/9067
  [i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
  [i915#9323]: https://gitlab.freedesktop.org/drm/intel/issues/9323
  [i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
  [i915#9581]: https://gitlab.freedesktop.org/drm/intel/issues/9581
  [i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685
  [i915#9694]: https://gitlab.freedesktop.org/drm/intel/issues/9694
  [i915#9697]: https://gitlab.freedesktop.org/drm/intel/issues/9697
  [i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
  [i915#9736]: https://gitlab.freedesktop.org/drm/intel/issues/9736


Build changes
-------------

  * Linux: CI_DRM_13955 -> Patchwork_125442v3

  CI-20190529: 20190529
  CI_DRM_13955: d835c627d25ba8775624ff3e854d034708044ac3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7612: b5c47966901ee1060bcb9d4bccdd3ccec9651ef4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_125442v3: d835c627d25ba8775624ff3e854d034708044ac3 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125442v3/index.html

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