From: Ethan Chen via <qemu-riscv@nongnu.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: <qemu-devel@nongnu.org>, <peter.maydell@linaro.org>,
<edgar.iglesias@gmail.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>, <palmer@dabbelt.com>,
<alistair.francis@wdc.com>, <in.meng@windriver.com>,
<liweiwei@iscas.ac.cn>, <dbarboza@ventanamicro.com>,
<hiwei_liu@linux.alibaba.com>, <qemu-riscv@nongnu.org>,
<peterx@redhat.com>, <david@redhat.com>
Subject: Re: [PATCH v4 0/4] Support RISC-V IOPMP
Date: Thu, 4 Jan 2024 10:38:19 +0800 [thread overview]
Message-ID: <ZZYaGwLs3OS84WUQ@ethan84-VirtualBox> (raw)
In-Reply-To: <CAKmqyKO9nGLo2b0TamakNh4qRr+Bi8NQ973bQ=ch8=CKoH-etg@mail.gmail.com>
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via <qemu-devel@nongnu.org> wrote:
> >
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
> >
> > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt
> > platform. This DMA device is connected to the IOPMP and has the functionalities
>
> I don't think we want to add an Andes DMA device to the virt machine.
>
> I can't even find the spec for the ATCDMAC300, which isn't great
>
AndeShape ATCDMAC110 data sheet is available on Andes website
http://www.andestech.com/en/products-solutions/product-documentation/
ATCDMAC300 is compatible with ATCDMAC110.
Thanks,
Ethan Chen
>
> > required by IOPMP, including:
> > - Support setup the connection to IOPMP
> > - Support asynchronous I/O to handle stall transactions
> > - Send transaction information
> >
> > IOPMP takes a transaction which partially match an entry as a partially hit
> > error. The transaction size is depending on source device, destination device
> > and bus.
> >
> > Source device can send a transaction_info to IOPMP. IOPMP will check partially
> > hit by transaction_info. If source device does not send a transaction_info,
> > IOPMP checks information in IOMMU and dose not check partially hit.
> >
> > Changes for v4:
> >
> > - Add descriptions of IOPMP and ATCDMAC300
> > - Refine coding style and comments
> > - config XILINX_AXI does not include file stream.c but selects config STREAM
> > instead.
> > - ATCDMAC300: INT_STATUS is write 1 clear per bit
> > Rename iopmp_address_sink to transcation_info_sink
> > - IOPMP: Refine error message and remove unused variable
> > - VIRT: Document new options
> > atcdmac300 is only added when iopmp is enabled
> > serial setting should not be changed
> >
> > Ethan Chen (4):
> > hw/core: Add config stream
> > Add RISC-V IOPMP support
> > hw/dma: Add Andes ATCDMAC300 support
> > hw/riscv/virt: Add IOPMP support
> >
> > docs/system/riscv/virt.rst | 11 +
> > hw/Kconfig | 1 +
> > hw/core/Kconfig | 3 +
> > hw/core/meson.build | 2 +-
> > hw/dma/Kconfig | 4 +
> > hw/dma/atcdmac300.c | 566 ++++++++++
> > hw/dma/meson.build | 1 +
> > hw/misc/Kconfig | 4 +
> > hw/misc/meson.build | 1 +
> > hw/misc/riscv_iopmp.c | 966 ++++++++++++++++++
> > hw/riscv/Kconfig | 2 +
> > hw/riscv/virt.c | 65 ++
> > include/hw/dma/atcdmac300.h | 180 ++++
> > include/hw/misc/riscv_iopmp.h | 341 +++++++
> > .../hw/misc/riscv_iopmp_transaction_info.h | 28 +
> > include/hw/riscv/virt.h | 10 +-
> > 16 files changed, 2183 insertions(+), 2 deletions(-)
> > create mode 100644 hw/dma/atcdmac300.c
> > create mode 100644 hw/misc/riscv_iopmp.c
> > create mode 100644 include/hw/dma/atcdmac300.h
> > create mode 100644 include/hw/misc/riscv_iopmp.h
> > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h
> >
> > --
> > 2.34.1
> >
> >
WARNING: multiple messages have this Message-ID (diff)
From: Ethan Chen via <qemu-devel@nongnu.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: <qemu-devel@nongnu.org>, <peter.maydell@linaro.org>,
<edgar.iglesias@gmail.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>, <palmer@dabbelt.com>,
<alistair.francis@wdc.com>, <in.meng@windriver.com>,
<liweiwei@iscas.ac.cn>, <dbarboza@ventanamicro.com>,
<hiwei_liu@linux.alibaba.com>, <qemu-riscv@nongnu.org>,
<peterx@redhat.com>, <david@redhat.com>
Subject: Re: [PATCH v4 0/4] Support RISC-V IOPMP
Date: Thu, 4 Jan 2024 10:38:19 +0800 [thread overview]
Message-ID: <ZZYaGwLs3OS84WUQ@ethan84-VirtualBox> (raw)
In-Reply-To: <CAKmqyKO9nGLo2b0TamakNh4qRr+Bi8NQ973bQ=ch8=CKoH-etg@mail.gmail.com>
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via <qemu-devel@nongnu.org> wrote:
> >
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
> >
> > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt
> > platform. This DMA device is connected to the IOPMP and has the functionalities
>
> I don't think we want to add an Andes DMA device to the virt machine.
>
> I can't even find the spec for the ATCDMAC300, which isn't great
>
AndeShape ATCDMAC110 data sheet is available on Andes website
http://www.andestech.com/en/products-solutions/product-documentation/
ATCDMAC300 is compatible with ATCDMAC110.
Thanks,
Ethan Chen
>
> > required by IOPMP, including:
> > - Support setup the connection to IOPMP
> > - Support asynchronous I/O to handle stall transactions
> > - Send transaction information
> >
> > IOPMP takes a transaction which partially match an entry as a partially hit
> > error. The transaction size is depending on source device, destination device
> > and bus.
> >
> > Source device can send a transaction_info to IOPMP. IOPMP will check partially
> > hit by transaction_info. If source device does not send a transaction_info,
> > IOPMP checks information in IOMMU and dose not check partially hit.
> >
> > Changes for v4:
> >
> > - Add descriptions of IOPMP and ATCDMAC300
> > - Refine coding style and comments
> > - config XILINX_AXI does not include file stream.c but selects config STREAM
> > instead.
> > - ATCDMAC300: INT_STATUS is write 1 clear per bit
> > Rename iopmp_address_sink to transcation_info_sink
> > - IOPMP: Refine error message and remove unused variable
> > - VIRT: Document new options
> > atcdmac300 is only added when iopmp is enabled
> > serial setting should not be changed
> >
> > Ethan Chen (4):
> > hw/core: Add config stream
> > Add RISC-V IOPMP support
> > hw/dma: Add Andes ATCDMAC300 support
> > hw/riscv/virt: Add IOPMP support
> >
> > docs/system/riscv/virt.rst | 11 +
> > hw/Kconfig | 1 +
> > hw/core/Kconfig | 3 +
> > hw/core/meson.build | 2 +-
> > hw/dma/Kconfig | 4 +
> > hw/dma/atcdmac300.c | 566 ++++++++++
> > hw/dma/meson.build | 1 +
> > hw/misc/Kconfig | 4 +
> > hw/misc/meson.build | 1 +
> > hw/misc/riscv_iopmp.c | 966 ++++++++++++++++++
> > hw/riscv/Kconfig | 2 +
> > hw/riscv/virt.c | 65 ++
> > include/hw/dma/atcdmac300.h | 180 ++++
> > include/hw/misc/riscv_iopmp.h | 341 +++++++
> > .../hw/misc/riscv_iopmp_transaction_info.h | 28 +
> > include/hw/riscv/virt.h | 10 +-
> > 16 files changed, 2183 insertions(+), 2 deletions(-)
> > create mode 100644 hw/dma/atcdmac300.c
> > create mode 100644 hw/misc/riscv_iopmp.c
> > create mode 100644 include/hw/dma/atcdmac300.h
> > create mode 100644 include/hw/misc/riscv_iopmp.h
> > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h
> >
> > --
> > 2.34.1
> >
> >
next prev parent reply other threads:[~2024-01-04 2:39 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 5:32 [PATCH v4 0/4] Support RISC-V IOPMP Ethan Chen via
2023-11-22 5:32 ` Ethan Chen via
2023-11-22 5:32 ` [PATCH v4 1/4] hw/core: Add config stream Ethan Chen via
2023-11-22 5:32 ` Ethan Chen via
2023-12-18 4:02 ` Alistair Francis
2023-11-22 5:32 ` [PATCH v4 2/4] Add RISC-V IOPMP support Ethan Chen via
2023-11-22 5:32 ` Ethan Chen via
2023-12-18 4:04 ` Alistair Francis
2023-12-27 2:26 ` Ethan Chen via
2023-12-27 2:26 ` Ethan Chen via
2023-11-22 5:32 ` [PATCH v4 3/4] hw/dma: Add Andes ATCDMAC300 support Ethan Chen via
2023-11-22 5:32 ` Ethan Chen via
2023-12-18 4:14 ` Alistair Francis
2023-11-22 5:32 ` [PATCH v4 4/4] hw/riscv/virt: Add IOPMP support Ethan Chen via
2023-11-22 5:32 ` Ethan Chen via
2023-12-18 4:16 ` Alistair Francis
2023-12-05 7:47 ` [PATCH v4 0/4] Support RISC-V IOPMP Ethan Chen via
2023-12-05 7:47 ` Ethan Chen via
2023-12-13 5:35 ` Ethan Chen via
2023-12-13 5:35 ` Ethan Chen via
2023-12-18 4:18 ` Alistair Francis
2023-12-21 6:38 ` Ethan Chen via
2023-12-21 6:38 ` Ethan Chen via
2024-01-22 6:01 ` Alistair Francis
2024-01-23 3:31 ` Ethan Chen via
2024-01-23 3:31 ` Ethan Chen via
2024-01-04 2:38 ` Ethan Chen via [this message]
2024-01-04 2:38 ` Ethan Chen via
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