From: Leonardo Bras <leobras@redhat.com>
To: guoren@kernel.org
Cc: Guo Ren <guoren@linux.alibaba.com>,
kvm@vger.kernel.org, peterz@infradead.org,
paul.walmsley@sifive.com, bjorn@rivosinc.com,
virtualization@lists.linux-foundation.org,
conor.dooley@microchip.com, jszhang@kernel.org,
panqinglin2020@iscas.ac.cn, linux-riscv@lists.infradead.org,
anup@brainfault.org, unicorn_wang@outlook.com,
xiaoguang.xing@sophgo.com, wuwei2016@iscas.ac.cn,
keescook@chromium.org, atishp@atishpatra.org,
chao.wei@sophgo.com, linux-kernel@vger.kernel.org,
Leonardo Bras <leobras@redhat.com>,
palmer@dabbelt.com, wefu@redhat.com
Subject: Re: [PATCH V12 03/14] riscv: errata: Move errata vendor func-id into vendorid_list.h
Date: Thu, 4 Jan 2024 01:00:14 -0300 [thread overview]
Message-ID: <ZZYtTryGpoMk7Gt8@LeoBras> (raw)
In-Reply-To: <20231225125847.2778638-4-guoren@kernel.org>
On Mon, Dec 25, 2023 at 07:58:36AM -0500, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Move errata vendor func-id definitions from errata_list into
> vendorid_list.h. Unifying these definitions is also for following
> rwonce errata implementation.
>
> Suggested-by: Leonardo Bras <leobras@redhat.com>
> Link: https://lore.kernel.org/linux-riscv/ZQLFJ1cmQ8PAoMHm@redhat.com/
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 18 ------------------
> arch/riscv/include/asm/vendorid_list.h | 18 ++++++++++++++++++
> 2 files changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 83ed25e43553..31bbd9840e97 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -11,24 +11,6 @@
> #include <asm/hwcap.h>
> #include <asm/vendorid_list.h>
>
> -#ifdef CONFIG_ERRATA_ANDES
> -#define ERRATA_ANDESTECH_NO_IOCP 0
> -#define ERRATA_ANDESTECH_NUMBER 1
> -#endif
> -
> -#ifdef CONFIG_ERRATA_SIFIVE
> -#define ERRATA_SIFIVE_CIP_453 0
> -#define ERRATA_SIFIVE_CIP_1200 1
> -#define ERRATA_SIFIVE_NUMBER 2
> -#endif
> -
> -#ifdef CONFIG_ERRATA_THEAD
> -#define ERRATA_THEAD_PBMT 0
> -#define ERRATA_THEAD_CMO 1
> -#define ERRATA_THEAD_PMU 2
> -#define ERRATA_THEAD_NUMBER 3
> -#endif
> -
> #ifdef __ASSEMBLY__
>
> #define ALT_INSN_FAULT(x) \
> diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
> index e55407ace0c3..c503373193d2 100644
> --- a/arch/riscv/include/asm/vendorid_list.h
> +++ b/arch/riscv/include/asm/vendorid_list.h
> @@ -9,4 +9,22 @@
> #define SIFIVE_VENDOR_ID 0x489
> #define THEAD_VENDOR_ID 0x5b7
>
> +#ifdef CONFIG_ERRATA_ANDES
> +#define ERRATA_ANDESTECH_NO_IOCP 0
> +#define ERRATA_ANDESTECH_NUMBER 1
> +#endif
> +
> +#ifdef CONFIG_ERRATA_SIFIVE
> +#define ERRATA_SIFIVE_CIP_453 0
> +#define ERRATA_SIFIVE_CIP_1200 1
> +#define ERRATA_SIFIVE_NUMBER 2
> +#endif
> +
> +#ifdef CONFIG_ERRATA_THEAD
> +#define ERRATA_THEAD_PBMT 0
> +#define ERRATA_THEAD_CMO 1
> +#define ERRATA_THEAD_PMU 2
> +#define ERRATA_THEAD_NUMBER 3
> +#endif
> +
> #endif
> --
> 2.40.1
>
LGTM:
Reviewed-by: Leonardo Bras <leobras@redhat.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Leonardo Bras <leobras@redhat.com>
To: guoren@kernel.org
Cc: Leonardo Bras <leobras@redhat.com>,
paul.walmsley@sifive.com, palmer@dabbelt.com,
panqinglin2020@iscas.ac.cn, bjorn@rivosinc.com,
conor.dooley@microchip.com, peterz@infradead.org,
anup@brainfault.org, keescook@chromium.org,
wuwei2016@iscas.ac.cn, xiaoguang.xing@sophgo.com,
chao.wei@sophgo.com, unicorn_wang@outlook.com, uwu@icenowy.me,
jszhang@kernel.org, wefu@redhat.com, atishp@atishpatra.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, virtualization@lists.linux-foundation.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V12 03/14] riscv: errata: Move errata vendor func-id into vendorid_list.h
Date: Thu, 4 Jan 2024 01:00:14 -0300 [thread overview]
Message-ID: <ZZYtTryGpoMk7Gt8@LeoBras> (raw)
In-Reply-To: <20231225125847.2778638-4-guoren@kernel.org>
On Mon, Dec 25, 2023 at 07:58:36AM -0500, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Move errata vendor func-id definitions from errata_list into
> vendorid_list.h. Unifying these definitions is also for following
> rwonce errata implementation.
>
> Suggested-by: Leonardo Bras <leobras@redhat.com>
> Link: https://lore.kernel.org/linux-riscv/ZQLFJ1cmQ8PAoMHm@redhat.com/
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 18 ------------------
> arch/riscv/include/asm/vendorid_list.h | 18 ++++++++++++++++++
> 2 files changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 83ed25e43553..31bbd9840e97 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -11,24 +11,6 @@
> #include <asm/hwcap.h>
> #include <asm/vendorid_list.h>
>
> -#ifdef CONFIG_ERRATA_ANDES
> -#define ERRATA_ANDESTECH_NO_IOCP 0
> -#define ERRATA_ANDESTECH_NUMBER 1
> -#endif
> -
> -#ifdef CONFIG_ERRATA_SIFIVE
> -#define ERRATA_SIFIVE_CIP_453 0
> -#define ERRATA_SIFIVE_CIP_1200 1
> -#define ERRATA_SIFIVE_NUMBER 2
> -#endif
> -
> -#ifdef CONFIG_ERRATA_THEAD
> -#define ERRATA_THEAD_PBMT 0
> -#define ERRATA_THEAD_CMO 1
> -#define ERRATA_THEAD_PMU 2
> -#define ERRATA_THEAD_NUMBER 3
> -#endif
> -
> #ifdef __ASSEMBLY__
>
> #define ALT_INSN_FAULT(x) \
> diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
> index e55407ace0c3..c503373193d2 100644
> --- a/arch/riscv/include/asm/vendorid_list.h
> +++ b/arch/riscv/include/asm/vendorid_list.h
> @@ -9,4 +9,22 @@
> #define SIFIVE_VENDOR_ID 0x489
> #define THEAD_VENDOR_ID 0x5b7
>
> +#ifdef CONFIG_ERRATA_ANDES
> +#define ERRATA_ANDESTECH_NO_IOCP 0
> +#define ERRATA_ANDESTECH_NUMBER 1
> +#endif
> +
> +#ifdef CONFIG_ERRATA_SIFIVE
> +#define ERRATA_SIFIVE_CIP_453 0
> +#define ERRATA_SIFIVE_CIP_1200 1
> +#define ERRATA_SIFIVE_NUMBER 2
> +#endif
> +
> +#ifdef CONFIG_ERRATA_THEAD
> +#define ERRATA_THEAD_PBMT 0
> +#define ERRATA_THEAD_CMO 1
> +#define ERRATA_THEAD_PMU 2
> +#define ERRATA_THEAD_NUMBER 3
> +#endif
> +
> #endif
> --
> 2.40.1
>
LGTM:
Reviewed-by: Leonardo Bras <leobras@redhat.com>
next prev parent reply other threads:[~2024-01-04 4:00 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-25 12:58 [PATCH V12 00/14] riscv: Add Native/Paravirt qspinlock support guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 01/14] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 02/14] asm-generic: ticket-lock: Add separate ticket-lock.h guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 03/14] riscv: errata: Move errata vendor func-id into vendorid_list.h guoren
2023-12-25 12:58 ` guoren
2024-01-04 4:00 ` Leonardo Bras [this message]
2024-01-04 4:00 ` Leonardo Bras
2023-12-25 12:58 ` [PATCH V12 04/14] riscv: qspinlock: errata: Add ERRATA_THEAD_WRITE_ONCE fixup guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 05/14] riscv: qspinlock: Add basic queued_spinlock support guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 06/14] riscv: qspinlock: Introduce combo spinlock guoren
2023-12-25 12:58 ` guoren
2024-01-04 4:56 ` Leonardo Bras
2024-01-04 4:56 ` Leonardo Bras
2023-12-25 12:58 ` [PATCH V12 07/14] riscv: qspinlock: Add virt_spin_lock() support for VM guest guoren
2023-12-25 12:58 ` guoren
2024-01-04 5:06 ` Leonardo Bras
2024-01-04 5:06 ` Leonardo Bras
2023-12-25 12:58 ` [PATCH V12 08/14] riscv: qspinlock: Force virt_spin_lock for KVM guests guoren
2023-12-25 12:58 ` guoren
2024-01-04 5:11 ` Leonardo Bras
2024-01-04 5:11 ` Leonardo Bras
2023-12-25 12:58 ` [PATCH V12 09/14] RISC-V: paravirt: Add pvqspinlock KVM backend guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 10/14] RISC-V: paravirt: Add pvqspinlock frontend skeleton guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 11/14] RISC-V: paravirt: pvqspinlock: Add SBI implementation guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 12/14] RISC-V: paravirt: pvqspinlock: Add nopvspin kernel parameter guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 13/14] RISC-V: paravirt: pvqspinlock: Add kconfig entry guoren
2023-12-25 12:58 ` guoren
2023-12-25 12:58 ` [PATCH V12 14/14] RISC-V: paravirt: pvqspinlock: Add trace point for pv_kick/wait guoren
2023-12-25 12:58 ` guoren
2023-12-26 0:35 ` [PATCH V12 00/14] riscv: Add Native/Paravirt qspinlock support Guo Ren
2023-12-26 0:35 ` Guo Ren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZZYtTryGpoMk7Gt8@LeoBras \
--to=leobras@redhat.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=bjorn@rivosinc.com \
--cc=chao.wei@sophgo.com \
--cc=conor.dooley@microchip.com \
--cc=guoren@kernel.org \
--cc=guoren@linux.alibaba.com \
--cc=jszhang@kernel.org \
--cc=keescook@chromium.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=panqinglin2020@iscas.ac.cn \
--cc=paul.walmsley@sifive.com \
--cc=peterz@infradead.org \
--cc=unicorn_wang@outlook.com \
--cc=virtualization@lists.linux-foundation.org \
--cc=wefu@redhat.com \
--cc=wuwei2016@iscas.ac.cn \
--cc=xiaoguang.xing@sophgo.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.