* [PATCH] net/intel: using common functions in idpf driver
@ 2025-03-12 15:53 Shaiq Wani
2025-03-12 16:38 ` Bruce Richardson
` (4 more replies)
0 siblings, 5 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-12 15:53 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions and structures
from drivers/net/intel/common.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 21 +++-
drivers/net/intel/cpfl/cpfl_ethdev.c | 1 +
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 +++++------
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 108 ++++++++---------
drivers/net/intel/idpf/idpf_common_rxtx.h | 65 ++--------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 112 +++++-------------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 104 ++++++++--------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 46 +++----
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 17 ++-
drivers/net/intel/idpf/meson.build | 2 +-
17 files changed, 248 insertions(+), 320 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..532adb4fd1 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -36,6 +36,7 @@ struct ci_tx_queue {
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
union {
@@ -51,7 +52,7 @@ struct ci_tx_queue {
uint16_t nb_tx_free;
/* Start freeing TX buffers if there are less free descriptors than
* this value.
- */
+ */
uint16_t tx_free_thresh;
/* Number of TX descriptors to use before RS bit is set. */
uint16_t tx_rs_thresh;
@@ -98,6 +99,24 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ bool q_started;
+ const struct idpf_txq_ops *idpf_ops;
+ /* only valid for split queue mode */
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+ void **txqs;
+ uint32_t tx_start_qid;
+ uint8_t expected_gen_id;
+ struct ci_tx_queue *complq;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c67ccf6b53 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..d7b5a660b5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,11 +585,11 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,11 +868,11 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -974,12 +974,12 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -993,12 +993,12 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..874b5cd5f3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "cpfl_ethdev.h"
#include "cpfl_rxtx.h"
+#include "../common/tx.h"
#define CPFL_SCALAR_PATH 0
#define CPFL_VECTOR_PATH 1
@@ -49,13 +50,13 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..7cf3379ff5 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,9 +208,9 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -233,20 +233,20 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,9 +264,9 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_entry *txe;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -860,12 +860,12 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1302,17 +1302,17 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1349,9 +1349,9 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..3a2e7ab556 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -135,7 +136,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -148,54 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -223,7 +176,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -237,7 +190,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -247,11 +200,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -282,9 +235,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..4fd06cd05b 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -473,78 +473,12 @@ _idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf
* Notice:
* - nb_pkts < IDPF_DESCS_PER_LOOP, just return no packet
*/
+
uint16_t
idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
-{
- struct idpf_tx_entry *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
- */
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
-
- return txq->rs_thresh;
-}
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
@@ -615,36 +549,44 @@ idpf_singleq_vtx(volatile struct idpf_base_tx_desc *txdp,
}
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ if (txq->nb_tx_free < txq->tx_free_thresh)
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -655,24 +597,24 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -687,12 +629,12 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..f6c8e8ba52 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -996,28 +996,28 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1193,7 +1193,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1264,12 +1264,12 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1289,10 +1289,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1321,22 +1321,22 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1496,7 +1496,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1560,7 +1560,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1592,16 +1592,16 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1620,11 +1620,11 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
@@ -709,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..57cc9b2618 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,11 +458,11 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,7 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
+ struct ci_tx_queue *txq =
dev->data->tx_queues[tx_queue_id];
int err = 0;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -698,7 +698,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
@@ -742,7 +742,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +880,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..2446951553 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
@@ -49,13 +50,13 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
@@ -99,11 +100,19 @@ idpf_rx_vec_dev_check_default(struct rte_eth_dev *dev)
return IDPF_VECTOR_PATH;
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
diff --git a/drivers/net/intel/idpf/meson.build b/drivers/net/intel/idpf/meson.build
index 802b13035b..4b8d4a8c08 100644
--- a/drivers/net/intel/idpf/meson.build
+++ b/drivers/net/intel/idpf/meson.build
@@ -37,7 +37,7 @@ if arch_subdir == 'x86' and dpdk_conf.get('RTE_IOVA_IN_MBUF') == 1
endif
idpf_common_avx512_lib = static_library('idpf_common_avx512_lib',
'idpf_common_rxtx_avx512.c',
- dependencies: static_rte_mbuf,
+ dependencies: [static_rte_mbuf,static_rte_ethdev],
include_directories: includes,
c_args: avx512_args)
objs += idpf_common_avx512_lib.extract_objects('idpf_common_rxtx_avx512.c')
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH] net/intel: using common functions in idpf driver
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-03-12 16:38 ` Bruce Richardson
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
` (3 subsequent siblings)
4 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-12 16:38 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Wed, Mar 12, 2025 at 09:23:51PM +0530, Shaiq Wani wrote:
> reworked the drivers to use the common functions and structures
> from drivers/net/intel/common.
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
> drivers/net/intel/common/tx.h | 21 +++-
> drivers/net/intel/cpfl/cpfl_ethdev.c | 1 +
> drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
> drivers/net/intel/cpfl/cpfl_rxtx.c | 66 +++++------
> drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
> drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
> drivers/net/intel/idpf/idpf_common_rxtx.c | 108 ++++++++---------
> drivers/net/intel/idpf/idpf_common_rxtx.h | 65 ++--------
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 112 +++++-------------
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 104 ++++++++--------
> drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
> drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
> drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
> drivers/net/intel/idpf/idpf_rxtx.c | 46 +++----
> drivers/net/intel/idpf/idpf_rxtx.h | 1 +
> drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 17 ++-
> drivers/net/intel/idpf/meson.build | 2 +-
> 17 files changed, 248 insertions(+), 320 deletions(-)
>
Thanks for undertaking this work. Hopefully it can simplify our code and
improve it. Some feedback from an initial review inline below.
Regards,
/Bruce
> diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
> index d9cf4474fc..532adb4fd1 100644
> --- a/drivers/net/intel/common/tx.h
> +++ b/drivers/net/intel/common/tx.h
> @@ -36,6 +36,7 @@ struct ci_tx_queue {
> volatile struct iavf_tx_desc *iavf_tx_ring;
> volatile struct ice_tx_desc *ice_tx_ring;
> volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
> + volatile struct idpf_base_tx_desc *idpf_tx_ring;
> };
Very minor nit: The entries listed in the union are in alphabetical order,
so let's put idpf just one line up.
> volatile uint8_t *qtx_tail; /* register address of tail */
> union {
> @@ -51,7 +52,7 @@ struct ci_tx_queue {
> uint16_t nb_tx_free;
> /* Start freeing TX buffers if there are less free descriptors than
> * this value.
> - */
> + */
> uint16_t tx_free_thresh;
> /* Number of TX descriptors to use before RS bit is set. */
> uint16_t tx_rs_thresh;
> @@ -98,6 +99,24 @@ struct ci_tx_queue {
> uint8_t wthresh; /**< Write-back threshold reg. */
> uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
> };
> + struct { /* idpf specific values */
This struct is quite a bit bigger I think than other structs in the union.
Hopefully there is some way to cut it down a bit. (ixgbe is the next
biggest, at 24 bytes in size. This, by my count, is 3 times that, at 72
bytes)
> + volatile union {
> + struct idpf_flex_tx_sched_desc *desc_ring;
> + struct idpf_splitq_tx_compl_desc *compl_ring;
> + };
> + bool q_started;
Do we really need this value? Other drivers seem to manage fine without a
special queue variable indicating started or not.
> + const struct idpf_txq_ops *idpf_ops;
> + /* only valid for split queue mode */
> + uint16_t sw_nb_desc;
> + uint16_t sw_tail;
We are wasting lots of space in the structure here by having the fields
placed at random within it. If the "q_started" variable is kept as-is, that
is wasting 7 bytes. These two variables waste 4 bytes of padding after
them. There are similarly 3 bytes wasted after "expected_gen_id". Just
reordering the fields alone will bring the size down by 8 bytes (with 6
bytes of padding lost at the end).
For sw_nb_desc field - is this not the same as "nb_tx_desc" field?
For sw_tail - is this not the same as "tx_tail"?
> + void **txqs;
> + uint32_t tx_start_qid;
> + uint8_t expected_gen_id;
> + struct ci_tx_queue *complq;
> +#define IDPF_TX_CTYPE_NUM 8
> + uint16_t ctype[IDPF_TX_CTYPE_NUM];
> +
> + };
If some of these fields are only relevant for splitq model, or when using a
queue with timestamps or scheduling, would there be a large impact to
having them split off into a separate structure, pointed to by the general
tx queue structure? To avoid expanding the struct size by a lot for all
drivers it would be good if we can keep the idpf-specific data to 32-bytes
or smaller (ideally 24-bytes which would involve no change!)
> };
> };
>
> diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
> index 1817221652..c67ccf6b53 100644
> --- a/drivers/net/intel/cpfl/cpfl_ethdev.c
> +++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
> @@ -18,6 +18,7 @@
> #include "cpfl_rxtx.h"
> #include "cpfl_flow.h"
> #include "cpfl_rules.h"
> +#include "../common/tx.h"
>
> #define CPFL_REPRESENTOR "representor"
> #define CPFL_TX_SINGLE_Q "tx_single"
> diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
> index 9a38a69194..d4e1176ab1 100644
> --- a/drivers/net/intel/cpfl/cpfl_ethdev.h
> +++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
> @@ -174,7 +174,7 @@ struct cpfl_vport {
> uint16_t nb_p2p_txq;
>
> struct idpf_rx_queue *p2p_rx_bufq;
> - struct idpf_tx_queue *p2p_tx_complq;
> + struct ci_tx_queue *p2p_tx_complq;
> bool p2p_manual_bind;
> };
>
> diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
> index 47351ca102..d7b5a660b5 100644
> --- a/drivers/net/intel/cpfl/cpfl_rxtx.c
> +++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
> @@ -11,7 +11,7 @@
> #include "cpfl_rxtx_vec_common.h"
>
> static inline void
> -cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
> +cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
> {
> uint32_t i, size;
>
> @@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
> }
>
> static inline void
> -cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
> +cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
> {
> uint32_t i, size;
>
> @@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
> idpf_qc_split_rx_bufq_reset(bufq);
> bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
> queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
> - bufq->ops = &def_rxq_ops;
> + bufq->idpf_ops = &def_rxq_ops;
> bufq->q_set = true;
>
> if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
> @@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
> }
>
> /* Single queue */
> - q->ops->release_mbufs(q);
> + q->idpf_ops->release_mbufs(q);
Looking through the code, the only in the ops structure is the mbuf release
function. Presumably this is to account for AVX512 vector code vs
non-avx512 code with different software ring structures. Based on what we
did using other drivers, we should be ok to just use a flag for this -
something that uses only 1 byte in the txq struct rather than 8 for a
pointer. Having a flag is also multi-process safe - using a pointer will
break in multi-process scenarios.
> rte_free(q->sw_ring);
> rte_memzone_free(q->mz);
> rte_free(cpfl_rxq);
> @@ -320,7 +320,7 @@ static void
> cpfl_tx_queue_release(void *txq)
> {
> struct cpfl_tx_queue *cpfl_txq = txq;
> - struct idpf_tx_queue *q = NULL;
> + struct ci_tx_queue *q = NULL;
>
> if (cpfl_txq == NULL)
> return;
> @@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
> rte_free(q->complq);
> }
>
> - q->ops->release_mbufs(q);
> + q->idpf_ops->release_mbufs(q);
> rte_free(q->sw_ring);
> rte_memzone_free(q->mz);
> rte_free(cpfl_txq);
> @@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> idpf_qc_single_rx_queue_reset(rxq);
> rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
> queue_idx * vport->chunks_info.rx_qtail_spacing);
> - rxq->ops = &def_rxq_ops;
> + rxq->idpf_ops = &def_rxq_ops;
> } else {
> idpf_qc_split_rx_descq_reset(rxq);
>
> @@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> }
>
> static int
> -cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
> +cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
> uint16_t queue_idx, uint16_t nb_desc,
> unsigned int socket_id)
> {
> struct cpfl_vport *cpfl_vport = dev->data->dev_private;
> struct idpf_vport *vport = &cpfl_vport->base;
> const struct rte_memzone *mz;
> - struct idpf_tx_queue *cq;
> + struct ci_tx_queue *cq;
> int ret;
>
> cq = rte_zmalloc_socket("cpfl splitq cq",
> - sizeof(struct idpf_tx_queue),
> + sizeof(struct ci_tx_queue),
> RTE_CACHE_LINE_SIZE,
> socket_id);
> if (cq == NULL) {
> @@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
> ret = -ENOMEM;
> goto err_mz_reserve;
> }
> - cq->tx_ring_phys_addr = mz->iova;
> + cq->tx_ring_dma = mz->iova;
> cq->compl_ring = mz->addr;
> cq->mz = mz;
> idpf_qc_split_tx_complq_reset(cq);
> @@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> struct cpfl_tx_queue *cpfl_txq;
> struct idpf_hw *hw = &base->hw;
> const struct rte_memzone *mz;
> - struct idpf_tx_queue *txq;
> + struct ci_tx_queue *txq;
> uint64_t offloads;
> uint16_t len;
> bool is_splitq;
> @@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
>
> txq->nb_tx_desc = nb_desc;
> - txq->rs_thresh = tx_rs_thresh;
> - txq->free_thresh = tx_free_thresh;
> + txq->tx_rs_thresh = tx_rs_thresh;
> + txq->tx_free_thresh = tx_free_thresh;
Rather than one big patch, as here, the process of changing the code to use
the common functions might be better done in stages across a couple of
patches (as was done for the other drivers).
For example, a good first patch would be to keep the separate txq structure
in idpf, but rename any fields that need it to align with the common
structure names. Then later patches which swap the dedicated structure for
the common one are simpler and only need to worry about the structure
names, not the field names.
> txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
> txq->port_id = dev->data->port_id;
> txq->offloads = cpfl_tx_offload_convert(offloads);
> @@ -585,11 +585,11 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> ret = -ENOMEM;
> goto err_mz_reserve;
> }
> - txq->tx_ring_phys_addr = mz->iova;
> + txq->tx_ring_dma = mz->iova;
> txq->mz = mz;
>
> txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
> - sizeof(struct idpf_tx_entry) * len,
> + sizeof(struct ci_tx_entry) * len,
> RTE_CACHE_LINE_SIZE, socket_id);
> if (txq->sw_ring == NULL) {
> PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
> @@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> }
>
> if (!is_splitq) {
> - txq->tx_ring = mz->addr;
> + txq->idpf_tx_ring = mz->addr;
> idpf_qc_single_tx_queue_reset(txq);
> } else {
> txq->desc_ring = mz->addr;
> @@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
>
> txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
> queue_idx * vport->chunks_info.tx_qtail_spacing);
> - txq->ops = &def_txq_ops;
> + txq->idpf_ops = &def_txq_ops;
> cpfl_vport->nb_data_txq++;
> txq->q_set = true;
> dev->data->tx_queues[queue_idx] = cpfl_txq;
> @@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
> bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
>
> bufq->q_set = true;
> - bufq->ops = &def_rxq_ops;
> + bufq->idpf_ops = &def_rxq_ops;
>
> return 0;
> }
<snip for brevity>
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v2 0/4] Use common structures and fns in IDPF and
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-12 16:38 ` Bruce Richardson
@ 2025-03-24 12:39 ` Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 1/4] net/intel: use common Tx queue structure Shaiq Wani
` (3 more replies)
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (2 subsequent siblings)
4 siblings, 4 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:39 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Using common code from net/intel/common in idpf and cpfl drivers.
Shaiq Wani (4):
net/intel: use common Tx queue structure
net/intel: align Tx queue struct field names
net/intel: use common Tx entry structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 18 +
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 112 +++---
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 115 ++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 323 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 48 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 9 +-
drivers/net/intel/idpf/meson.build | 2 +-
17 files changed, 241 insertions(+), 550 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v2 1/4] net/intel: use common Tx queue structure
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
@ 2025-03-24 12:39 ` Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 2/4] net/intel: align Tx queue struct field names Shaiq Wani
` (2 subsequent siblings)
3 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:39 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 18 ++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 2 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 24 ++++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 56 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 6 +-
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.c | 22 ++++----
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
15 files changed, 82 insertions(+), 108 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..49722026de 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -98,6 +99,23 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ bool q_started;
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ /* only valid for split queue mode */
+ void **txqs;
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+ uint8_t expected_gen_id;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..2f071082e1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -1167,7 +1167,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..cf4320df0c 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..314a233e6d 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -70,7 +70,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..eb730ea377 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -49,7 +49,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..3e8f24ac38 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,7 +208,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,7 +264,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct idpf_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -860,7 +860,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct idpf_tx_entry *sw_ring;
@@ -874,7 +874,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint8_t cmd_dtype;
uint16_t nb_ctx;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
txr = txq->desc_ring;
@@ -1302,7 +1302,7 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
struct idpf_tx_entry *sw_ring = txq->sw_ring;
@@ -1351,7 +1351,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct idpf_tx_entry *txe, *txn;
struct idpf_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
@@ -1368,7 +1368,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
nb_tx = 0;
txq = tx_queue;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
sw_ring = txq->sw_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..ea94acf9f9 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -154,48 +154,6 @@ struct idpf_tx_entry {
uint16_t last_id;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -223,7 +181,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -237,7 +195,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -247,11 +205,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -282,9 +240,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..948b95e79f 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -489,7 +489,7 @@ idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txep;
uint32_t n;
@@ -619,7 +619,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -687,7 +687,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..f215583edf 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -996,7 +996,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1193,7 +1193,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1264,7 +1264,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1289,10 +1289,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1321,7 +1321,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1496,7 +1496,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1560,7 +1560,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1592,7 +1592,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1620,7 +1620,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..11394d28b7 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..e722f4d3e8 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -709,7 +709,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..ed02cf5bcb 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,7 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
+ struct ci_tx_queue *txq =
dev->data->tx_queues[tx_queue_id];
int err = 0;
@@ -653,7 +653,6 @@ idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
tx_queue_id);
} else {
- txq->q_started = true;
dev->data->tx_queue_state[tx_queue_id] =
RTE_ETH_QUEUE_STATE_STARTED;
}
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -713,7 +712,6 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
}
txq = dev->data->tx_queues[tx_queue_id];
- txq->q_started = false;
txq->ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
@@ -742,7 +740,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +878,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..979e7f38bb 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -49,7 +49,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -103,7 +103,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v3 0/4] using common functions in idpf driver
2025-03-24 12:39 ` [PATCH v2 1/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-24 12:49 ` Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 1/4] net/intel: use common Tx queue structure Shaiq Wani
` (3 more replies)
0 siblings, 4 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:49 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the idpf and cpfl drivers to use the common functions and structures
from drivers/net/intel/common.
Shaiq Wani (4):
net/intel: use common Tx queue structure
net/intel: align Tx queue struct field names
net/intel: use common Tx entry structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 18 +
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 112 +++---
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 115 ++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 323 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 48 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 9 +-
drivers/net/intel/idpf/meson.build | 2 +-
17 files changed, 241 insertions(+), 550 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v3 1/4] net/intel: use common Tx queue structure
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
@ 2025-03-24 12:49 ` Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 2/4] net/intel: align Tx queue struct field names Shaiq Wani
` (2 subsequent siblings)
3 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:49 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 18 ++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 2 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 24 ++++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 56 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 6 +-
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.c | 22 ++++----
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
15 files changed, 82 insertions(+), 108 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..49722026de 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -98,6 +99,23 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ bool q_started;
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ /* only valid for split queue mode */
+ void **txqs;
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+ uint8_t expected_gen_id;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..2f071082e1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -1167,7 +1167,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..cf4320df0c 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..314a233e6d 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -70,7 +70,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..eb730ea377 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -49,7 +49,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..3e8f24ac38 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,7 +208,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,7 +264,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct idpf_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -860,7 +860,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct idpf_tx_entry *sw_ring;
@@ -874,7 +874,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint8_t cmd_dtype;
uint16_t nb_ctx;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
txr = txq->desc_ring;
@@ -1302,7 +1302,7 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
struct idpf_tx_entry *sw_ring = txq->sw_ring;
@@ -1351,7 +1351,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct idpf_tx_entry *txe, *txn;
struct idpf_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
@@ -1368,7 +1368,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
nb_tx = 0;
txq = tx_queue;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
sw_ring = txq->sw_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..ea94acf9f9 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -154,48 +154,6 @@ struct idpf_tx_entry {
uint16_t last_id;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -223,7 +181,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -237,7 +195,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -247,11 +205,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -282,9 +240,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..948b95e79f 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -489,7 +489,7 @@ idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txep;
uint32_t n;
@@ -619,7 +619,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -687,7 +687,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..f215583edf 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -996,7 +996,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1193,7 +1193,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1264,7 +1264,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1289,10 +1289,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1321,7 +1321,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1496,7 +1496,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1560,7 +1560,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1592,7 +1592,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1620,7 +1620,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..11394d28b7 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..e722f4d3e8 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -709,7 +709,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..ed02cf5bcb 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,7 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
+ struct ci_tx_queue *txq =
dev->data->tx_queues[tx_queue_id];
int err = 0;
@@ -653,7 +653,6 @@ idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
tx_queue_id);
} else {
- txq->q_started = true;
dev->data->tx_queue_state[tx_queue_id] =
RTE_ETH_QUEUE_STATE_STARTED;
}
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -713,7 +712,6 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
}
txq = dev->data->tx_queues[tx_queue_id];
- txq->q_started = false;
txq->ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
@@ -742,7 +740,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +878,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..979e7f38bb 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -49,7 +49,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -103,7 +103,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v4 0/4] net/intel: using common functions in idpf driver
2025-03-24 12:49 ` [PATCH v3 1/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-27 10:44 ` Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 1/4] net/intel: align Tx queue struct field names Shaiq Wani
` (3 more replies)
0 siblings, 4 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 10:44 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions and structures
from drivers/net/intel/common.
Shaiq Wani (4):
net/intel: align Tx queue struct field names
net/intel: use common Tx queue structure
net/intel: use common Tx entry structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 20 ++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 116 +++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 81 +++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 324 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 47 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 9 +-
16 files changed, 257 insertions(+), 504 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v4 1/4] net/intel: align Tx queue struct field names
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-03-27 10:44 ` Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 2/4] net/intel: use common Tx queue structure Shaiq Wani
` (2 subsequent siblings)
3 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 10:44 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 21 ++---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 150 insertions(+), 149 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..8eed8f16d5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..caf02295a3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..df16aa3f06 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -233,16 +233,16 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1310,9 +1310,9 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..84c05cfaac 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -157,34 +157,35 @@ struct idpf_tx_entry {
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
+ volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
volatile union {
struct idpf_flex_tx_sched_desc *desc_ring;
struct idpf_splitq_tx_compl_desc *compl_ring;
};
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
+ rte_iova_t tx_ring_dma; /* Tx ring DMA address */
struct idpf_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
volatile uint8_t *qtx_tail; /* register address of tail */
/* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
+ uint16_t nb_tx_used;
+ uint16_t nb_tx_free;
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
+ uint16_t tx_free_thresh;
+
+ uint16_t tx_rs_thresh;
uint16_t port_id;
uint16_t queue_id;
uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
+ uint16_t tx_next_dd; /* next to set RS, for VPMD */
+ uint16_t tx_next_rs; /* next to check DD, for VPMD */
bool q_set; /* if tx queue has been configured */
bool q_started; /* if tx queue has been started */
bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
+ const struct idpf_txq_ops *idpf_ops;
/* only valid for split queue mode */
uint16_t sw_nb_desc;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..ba97003779 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -496,20 +496,20 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -538,12 +538,12 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -627,20 +627,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -655,10 +655,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -667,12 +667,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -692,7 +692,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..d2f82ab3f5 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1003,21 +1003,21 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1269,7 +1269,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1328,15 +1328,15 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1598,10 +1598,10 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1625,6 +1625,6 @@ idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..af81680825 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..95b112c95c 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..608cab30f3 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v5 0/4] net/intel: using common functions in idpf driver
2025-03-27 10:44 ` [PATCH v4 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-03-27 16:04 ` Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 1/4] net/intel: align Tx queue struct field names Shaiq Wani
` (5 more replies)
0 siblings, 6 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 16:04 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions
and structures from drivers/net/intel/common.
Shaiq Wani (4):
net/intel: align Tx queue struct field names
net/intel: use common Tx queue structure
net/intel: use common Tx entry structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 20 ++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 7 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 116 +++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 115 ++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 324 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 47 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 9 +-
16 files changed, 245 insertions(+), 550 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v5 1/4] net/intel: align Tx queue struct field names
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-03-27 16:04 ` Shaiq Wani
2025-03-28 16:57 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 2/4] net/intel: use common Tx queue structure Shaiq Wani
` (4 subsequent siblings)
5 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 16:04 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 21 ++---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 150 insertions(+), 149 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..8eed8f16d5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..caf02295a3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..df16aa3f06 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -233,16 +233,16 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1310,9 +1310,9 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..84c05cfaac 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -157,34 +157,35 @@ struct idpf_tx_entry {
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
+ volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
volatile union {
struct idpf_flex_tx_sched_desc *desc_ring;
struct idpf_splitq_tx_compl_desc *compl_ring;
};
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
+ rte_iova_t tx_ring_dma; /* Tx ring DMA address */
struct idpf_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
volatile uint8_t *qtx_tail; /* register address of tail */
/* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
+ uint16_t nb_tx_used;
+ uint16_t nb_tx_free;
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
+ uint16_t tx_free_thresh;
+
+ uint16_t tx_rs_thresh;
uint16_t port_id;
uint16_t queue_id;
uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
+ uint16_t tx_next_dd; /* next to set RS, for VPMD */
+ uint16_t tx_next_rs; /* next to check DD, for VPMD */
bool q_set; /* if tx queue has been configured */
bool q_started; /* if tx queue has been started */
bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
+ const struct idpf_txq_ops *idpf_ops;
/* only valid for split queue mode */
uint16_t sw_nb_desc;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..ba97003779 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -496,20 +496,20 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -538,12 +538,12 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -627,20 +627,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -655,10 +655,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -667,12 +667,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -692,7 +692,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..d2f82ab3f5 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1003,21 +1003,21 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1269,7 +1269,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1328,15 +1328,15 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1598,10 +1598,10 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1625,6 +1625,6 @@ idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..af81680825 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..95b112c95c 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..608cab30f3 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v5 2/4] net/intel: use common Tx queue structure
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-03-27 16:04 ` Shaiq Wani
2025-03-28 17:22 ` Bruce Richardson
2025-03-28 17:55 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 3/4] net/intel: use common Tx entry structure Shaiq Wani
` (3 subsequent siblings)
5 siblings, 2 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 16:04 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 20 +++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 3 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 36 ++++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 58 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 12 ++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 21 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 5 +-
16 files changed, 101 insertions(+), 117 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..af32f4deda 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -98,6 +99,25 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ void **txqs; /*only valid for split queue mode*/
+ bool q_started; /* if tx queue has been started */
+
+ /* only valid for split queue mode */
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ uint8_t expected_gen_id;
+
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
@@ -1167,7 +1168,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 8eed8f16d5..d7b5a660b5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index caf02295a3..874b5cd5f3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "cpfl_ethdev.h"
#include "cpfl_rxtx.h"
+#include "../common/tx.h"
#define CPFL_SCALAR_PATH 0
#define CPFL_VECTOR_PATH 1
@@ -49,7 +50,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index df16aa3f06..48fc3ef7ae 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,7 +208,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
for (i = 0; i < size; i++)
((volatile char *)txq->desc_ring)[i] = 0;
- txe = txq->sw_ring;
+ txe = (struct idpf_tx_entry *)txq->sw_ring;
prev = (uint16_t)(txq->sw_nb_desc - 1);
for (i = 0; i < txq->sw_nb_desc; i++) {
txe[i].mbuf = NULL;
@@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,7 +264,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -275,7 +275,7 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
return;
}
- txe = txq->sw_ring;
+ txe = (struct idpf_tx_entry *)txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
((volatile char *)txq->idpf_tx_ring)[i] = 0;
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct idpf_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -794,7 +794,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
break;
case IDPF_TXD_COMPLT_RS:
/* q_head indicates sw_id when ctype is 2 */
- txe = &txq->sw_ring[q_head];
+ txe = (struct idpf_tx_entry *)&txq->sw_ring[q_head];
if (txe->mbuf != NULL) {
rte_pktmbuf_free_seg(txe->mbuf);
txe->mbuf = NULL;
@@ -860,7 +860,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct idpf_tx_entry *sw_ring;
@@ -874,11 +874,11 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint8_t cmd_dtype;
uint16_t nb_ctx;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
txr = txq->desc_ring;
- sw_ring = txq->sw_ring;
+ sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
tx_id = txq->tx_tail;
sw_id = txq->sw_tail;
txe = &sw_ring[sw_id];
@@ -1302,10 +1302,10 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct idpf_tx_entry *sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1351,7 +1351,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct idpf_tx_entry *txe, *txn;
struct idpf_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
@@ -1368,10 +1368,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
nb_tx = 0;
txq = tx_queue;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
- sw_ring = txq->sw_ring;
+ sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 84c05cfaac..1a64b6615c 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -154,49 +155,6 @@ struct idpf_tx_entry {
uint16_t last_id;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_tx_used;
- uint16_t nb_tx_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t tx_free_thresh;
-
- uint16_t tx_rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t tx_next_dd; /* next to set RS, for VPMD */
- uint16_t tx_next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *idpf_ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -224,7 +182,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -238,7 +196,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -248,11 +206,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -283,9 +241,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index ba97003779..26b24106d0 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -489,7 +489,7 @@ idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txep;
uint32_t n;
@@ -509,7 +509,7 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -619,7 +619,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -638,7 +638,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
@@ -659,7 +659,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
}
idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
@@ -687,7 +687,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index d2f82ab3f5..a41b5f33af 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -6,6 +6,7 @@
#include "idpf_common_device.h"
#include "idpf_common_rxtx.h"
+
#define IDPF_DESCS_PER_LOOP_AVX 8
#define PKTLEN_SHIFT 10
@@ -996,7 +997,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1193,7 +1194,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1264,7 +1265,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1289,10 +1290,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1321,7 +1322,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1496,7 +1497,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1560,7 +1561,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1592,7 +1593,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1620,7 +1621,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index af81680825..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
@@ -709,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 95b112c95c..4d8cfa56ac 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,7 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
+ struct ci_tx_queue *txq =
dev->data->tx_queues[tx_queue_id];
int err = 0;
@@ -653,7 +653,6 @@ idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
tx_queue_id);
} else {
- txq->q_started = true;
dev->data->tx_queue_state[tx_queue_id] =
RTE_ETH_QUEUE_STATE_STARTED;
}
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -742,7 +741,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +879,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 608cab30f3..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
@@ -49,7 +50,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -103,7 +104,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v5 2/4] net/intel: use common Tx queue structure
2025-03-27 16:04 ` [PATCH v5 2/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-28 17:22 ` Bruce Richardson
2025-03-28 17:55 ` Bruce Richardson
1 sibling, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 17:22 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:35PM +0530, Shaiq Wani wrote:
> Merge in additional fields used by the idpf driver and then convert it
> over to using the common Tx queue structure
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Some comments inline below.
> ---
> drivers/net/intel/common/tx.h | 20 +++++++
> drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
> drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
> drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
> drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
> drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 3 +-
> drivers/net/intel/idpf/idpf_common_rxtx.c | 36 ++++++------
> drivers/net/intel/idpf/idpf_common_rxtx.h | 58 +++----------------
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 12 ++--
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 21 +++----
> drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
> drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
> drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
> drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
> drivers/net/intel/idpf/idpf_rxtx.h | 1 +
> drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 5 +-
> 16 files changed, 101 insertions(+), 117 deletions(-)
>
<snip>
> static int
> -cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
> +cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
> uint16_t queue_idx, uint16_t nb_desc,
> unsigned int socket_id)
> {
> struct cpfl_vport *cpfl_vport = dev->data->dev_private;
> struct idpf_vport *vport = &cpfl_vport->base;
> const struct rte_memzone *mz;
> - struct idpf_tx_queue *cq;
> + struct ci_tx_queue *cq;
> int ret;
>
> cq = rte_zmalloc_socket("cpfl splitq cq",
> - sizeof(struct idpf_tx_queue),
> + sizeof(struct ci_tx_queue),
Minor nit, but this would be more maintainable I think as "sizeof(*cq)" so
if you have to change the type of cq again in future, only on line needs to
change.
> RTE_CACHE_LINE_SIZE,
> socket_id);
> if (cq == NULL) {
> @@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
> struct cpfl_tx_queue *cpfl_txq;
<snip>
> void
> -idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
> +idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
> {
> struct idpf_tx_entry *txe;
> uint32_t i, size;
> @@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
> for (i = 0; i < size; i++)
> ((volatile char *)txq->desc_ring)[i] = 0;
>
> - txe = txq->sw_ring;
> + txe = (struct idpf_tx_entry *)txq->sw_ring;
As I comment on the next patch in the series, if you change the order of
these two patches, you won't need to introduce these new typecasts.
> prev = (uint16_t)(txq->sw_nb_desc - 1);
> for (i = 0; i < txq->sw_nb_desc; i++) {
> txe[i].mbuf = NULL;
> @@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
> }
<snip>
^ permalink raw reply [flat|nested] 52+ messages in thread* Re: [PATCH v5 2/4] net/intel: use common Tx queue structure
2025-03-27 16:04 ` [PATCH v5 2/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-28 17:22 ` Bruce Richardson
@ 2025-03-28 17:55 ` Bruce Richardson
1 sibling, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 17:55 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:35PM +0530, Shaiq Wani wrote:
> Merge in additional fields used by the idpf driver and then convert it
> over to using the common Tx queue structure
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
> drivers/net/intel/common/tx.h | 20 +++++++
> drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
> drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
> drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
> drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
> drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 3 +-
> drivers/net/intel/idpf/idpf_common_rxtx.c | 36 ++++++------
> drivers/net/intel/idpf/idpf_common_rxtx.h | 58 +++----------------
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 12 ++--
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 21 +++----
> drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
> drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
> drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
> drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
> drivers/net/intel/idpf/idpf_rxtx.h | 1 +
> drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 5 +-
> 16 files changed, 101 insertions(+), 117 deletions(-)
>
> diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
> index d9cf4474fc..af32f4deda 100644
> --- a/drivers/net/intel/common/tx.h
> +++ b/drivers/net/intel/common/tx.h
> @@ -35,6 +35,7 @@ struct ci_tx_queue {
> volatile struct i40e_tx_desc *i40e_tx_ring;
> volatile struct iavf_tx_desc *iavf_tx_ring;
> volatile struct ice_tx_desc *ice_tx_ring;
> + volatile struct idpf_base_tx_desc *idpf_tx_ring;
> volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
> };
> volatile uint8_t *qtx_tail; /* register address of tail */
> @@ -98,6 +99,25 @@ struct ci_tx_queue {
> uint8_t wthresh; /**< Write-back threshold reg. */
> uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
> };
> + struct { /* idpf specific values */
> + volatile union {
> + struct idpf_flex_tx_sched_desc *desc_ring;
> + struct idpf_splitq_tx_compl_desc *compl_ring;
> + };
> + const struct idpf_txq_ops *idpf_ops;
> + struct ci_tx_queue *complq;
> + void **txqs; /*only valid for split queue mode*/
> + bool q_started; /* if tx queue has been started */
> +
> + /* only valid for split queue mode */
> + uint32_t tx_start_qid;
> + uint16_t sw_nb_desc;
> + uint16_t sw_tail;
> +#define IDPF_TX_CTYPE_NUM 8
> + uint16_t ctype[IDPF_TX_CTYPE_NUM];
> + uint8_t expected_gen_id;
> +
Though not a blocker for merge, I'd still like to get this idpf structure
down in size a bit - it causes a 50% increase in the size of the overall
queue structure, from 128 bytes to 192 bytes in size.
There are a couple of ways I think we could cut this down a little:
* bool values only use 1 bytes in size, so we are wasting 3 bytes after the
q_started flag. Two thoughts here:
1. is the queue started state not already tracked somewhere in the ethdev
data or queue data?
2. Move this field down to the end, beside the expected_gen_id flag, to
free up 4 bytes
* If we change the ctype array from an array to a pointer, we can save 8
bytes. However, looking at the code, I'm also wondering how this is used:
- in scalar code we don't use the ctype array, but check instead for just
types 2 and 4
- in the avx512 code, we do use the ctypes array, incrementing values
that we get. However, from what I see, we only ever look at value 2 of
the array in that code. Am I missing something here? Do we really need
the array at all?
* The ops structure only contains a single function pointer for the release
structure, which either contains the default release function or the
AVX512 release function. However, with this patchset, the AVX2 code now
seems to be using the same descriptor format at the AVX512 code, so I
suspect that the release function may be wrong in those cases. Therefore,
I believe that the idpf_ops structure should be removed, and the existing
txq->vector_tx flag used instead to choose the release function. That would
save another 8 bytes, and correct the AVX2 path.
Regards,
/Bruce
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v5 3/4] net/intel: use common Tx entry structure
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 2/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-27 16:04 ` Shaiq Wani
2025-03-28 17:17 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
` (2 subsequent siblings)
5 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 16:04 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/idpf/idpf_common_rxtx.c | 26 ++++++++---------
drivers/net/intel/idpf/idpf_common_rxtx.h | 10 -------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 23 +++++----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
5 files changed, 30 insertions(+), 59 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 48fc3ef7ae..4318b3fb3c 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
void
idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
for (i = 0; i < size; i++)
((volatile char *)txq->desc_ring)[i] = 0;
- txe = (struct idpf_tx_entry *)txq->sw_ring;
+ txe = (struct ci_tx_entry *)txq->sw_ring;
prev = (uint16_t)(txq->sw_nb_desc - 1);
for (i = 0; i < txq->sw_nb_desc; i++) {
txe[i].mbuf = NULL;
@@ -266,7 +266,7 @@ idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
void
idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -275,7 +275,7 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
return;
}
- txe = (struct idpf_tx_entry *)txq->sw_ring;
+ txe = (struct ci_tx_entry *)txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
((volatile char *)txq->idpf_tx_ring)[i] = 0;
@@ -755,7 +755,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -794,7 +794,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
break;
case IDPF_TXD_COMPLT_RS:
/* q_head indicates sw_id when ctype is 2 */
- txe = (struct idpf_tx_entry *)&txq->sw_ring[q_head];
+ txe = &txq->sw_ring[q_head];
if (txe->mbuf != NULL) {
rte_pktmbuf_free_seg(txe->mbuf);
txe->mbuf = NULL;
@@ -863,9 +863,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -878,7 +878,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
txr = txq->desc_ring;
- sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ sw_ring = txq->sw_ring;
tx_id = txq->tx_tail;
sw_id = txq->sw_tail;
txe = &sw_ring[sw_id];
@@ -1305,7 +1305,7 @@ static inline int
idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1349,8 +1349,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
@@ -1371,7 +1371,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
if (unlikely(txq == NULL))
return nb_tx;
- sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ sw_ring = txq->sw_ring;
txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 1a64b6615c..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -149,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -167,10 +161,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 26b24106d0..bce0257804 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -478,20 +478,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -509,7 +500,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = (struct idpf_tx_entry *)&txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -621,7 +612,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -638,13 +629,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -659,10 +650,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index a41b5f33af..c0ec754642 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -999,7 +999,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1112,16 +1112,6 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1196,7 +1186,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1221,7 +1211,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1240,7 +1230,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1324,7 +1314,7 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1499,7 +1489,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1522,7 +1512,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1541,7 +1531,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1597,7 +1587,7 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 4d8cfa56ac..7f512c6bc6 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v5 3/4] net/intel: use common Tx entry structure
2025-03-27 16:04 ` [PATCH v5 3/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-03-28 17:17 ` Bruce Richardson
0 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 17:17 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:36PM +0530, Shaiq Wani wrote:
> Used the common Tx entry structure and common Tx mbuf ring replenish fn
> in place of idpf-specific structure and function.
> The vector driver code paths (AVX2, AVX512) use the smaller SW
> ring structure.
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Minor nit: I would suggest making this patch 2, rather than patch 3, which
would avoid the need for the typecasts in the patch to convert to the
common queue structure.
> drivers/net/intel/idpf/idpf_common_rxtx.c | 26 ++++++++---------
> drivers/net/intel/idpf/idpf_common_rxtx.h | 10 -------
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 23 +++++----------
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
> drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
> 5 files changed, 30 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
> index 48fc3ef7ae..4318b3fb3c 100644
> --- a/drivers/net/intel/idpf/idpf_common_rxtx.c
> +++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
> @@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
> void
> idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
> {
> - struct idpf_tx_entry *txe;
> + struct ci_tx_entry *txe;
> uint32_t i, size;
> uint16_t prev;
>
> @@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
> for (i = 0; i < size; i++)
> ((volatile char *)txq->desc_ring)[i] = 0;
>
> - txe = (struct idpf_tx_entry *)txq->sw_ring;
> + txe = (struct ci_tx_entry *)txq->sw_ring;
No typecast is actually necessary here, since txq->sw_ring already of type
(struct ci_tx_entry). As I suggest above, if you switch the patch order,
you remove the need to have the (struct idpf_tx_entry *) cast at all - it
was just introduced in the previous patch in this set.
> prev = (uint16_t)(txq->sw_nb_desc - 1);
> for (i = 0; i < txq->sw_nb_desc; i++) {
> txe[i].mbuf = NULL;
<snip>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-03-27 16:04 ` [PATCH v5 3/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-03-27 16:04 ` Shaiq Wani
2025-03-28 17:25 ` Bruce Richardson
2025-03-28 15:29 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Bruce Richardson
2025-03-28 17:58 ` Bruce Richardson
5 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 16:04 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 68 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 237 +-----------------
2 files changed, 22 insertions(+), 283 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index bce0257804..6399f357d3 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -79,6 +79,14 @@ idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline uint16_t
_idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
@@ -479,64 +487,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -621,7 +571,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index c0ec754642..dbbdc71e22 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -122,6 +122,14 @@ idpf_singleq_rearm_common(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static __rte_always_inline void
idpf_singleq_rearm(struct idpf_rx_queue *rxq)
{
@@ -996,122 +1004,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1195,7 +1087,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1311,110 +1203,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1556,11 +1344,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf
2025-03-27 16:04 ` [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
@ 2025-03-28 17:25 ` Bruce Richardson
0 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 17:25 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:37PM +0530, Shaiq Wani wrote:
> Switch the idpf driver to use the common Tx free function for
> AVX2 and AVX512
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 68 +----
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 237 +-----------------
> 2 files changed, 22 insertions(+), 283 deletions(-)
>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
> index bce0257804..6399f357d3 100644
> --- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
> +++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
> @@ -79,6 +79,14 @@ idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
> IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
> }
>
> +static inline int
> +idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
> +{
> + return (txq->idpf_tx_ring[idx].qw1 &
Minor nit - watch indentation here, this is indented by two instead of 1.
[Next line is correctly indented at 3 levels, though, so don't adjust it]
> + rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
> + rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
> +}
> +
> static inline uint16_t
> _idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
> uint16_t nb_pkts)
> @@ -479,64 +487,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
> return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
> }
>
> -static __rte_always_inline int
> -idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
> -{
> - struct ci_tx_entry_vec *txep;
> - uint32_t n;
> - uint32_t i;
> - int nb_free = 0;
> - struct rte_mbuf *m;
> - struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
> -
> - /* check DD bits on threshold descriptor */
> - if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
> - rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
> - rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
> - return 0;
> -
> - n = txq->tx_rs_thresh;
> -
> - /* first buffer to free from S/W ring is at index
> - * tx_next_dd - (tx_rs_thresh-1)
> - */
> - txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
> - m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
> - if (likely(m)) {
> - free[0] = m;
> - nb_free = 1;
> - for (i = 1; i < n; i++) {
> - m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
> - if (likely(m)) {
> - if (likely(m->pool == free[0]->pool)) {
> - free[nb_free++] = m;
> - } else {
> - rte_mempool_put_bulk(free[0]->pool,
> - (void *)free,
> - nb_free);
> - free[0] = m;
> - nb_free = 1;
> - }
> - }
> - }
> - rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
> - } else {
> - for (i = 1; i < n; i++) {
> - m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
> - if (m)
> - rte_mempool_put(m->pool, m);
> - }
> - }
> -
> - /* buffers were freed, update counters */
> - txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
> - txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
> - if (txq->tx_next_dd >= txq->nb_tx_desc)
> - txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
> -
> - return txq->tx_rs_thresh;
> -}
> -
> static inline void
> idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
> struct rte_mbuf *pkt, uint64_t flags)
> @@ -621,7 +571,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
> nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
>
> if (txq->nb_tx_free < txq->tx_free_thresh)
> - idpf_singleq_tx_free_bufs_vec(txq);
> + ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
>
> nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
> if (unlikely(nb_pkts == 0))
> diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
> index c0ec754642..dbbdc71e22 100644
> --- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
> +++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
> @@ -122,6 +122,14 @@ idpf_singleq_rearm_common(struct idpf_rx_queue *rxq)
> IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
> }
>
> +static inline int
> +idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
> +{
> + return (txq->idpf_tx_ring[idx].qw1 &
> + rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
> + rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
> +}
> +
This code appears above two. Can it not be put in a common header to avoid
duplication?
> static __rte_always_inline void
> idpf_singleq_rearm(struct idpf_rx_queue *rxq)
> {
<snip>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v5 0/4] net/intel: using common functions in idpf driver
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (3 preceding siblings ...)
2025-03-27 16:04 ` [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
@ 2025-03-28 15:29 ` Bruce Richardson
2025-03-28 15:36 ` David Marchand
2025-03-28 17:58 ` Bruce Richardson
5 siblings, 1 reply; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 15:29 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:33PM +0530, Shaiq Wani wrote:
> reworked the drivers to use the common functions
> and structures from drivers/net/intel/common.
>
> Shaiq Wani (4):
> net/intel: align Tx queue struct field names
> net/intel: use common Tx queue structure
> net/intel: use common Tx entry structure
> net/idpf: use common Tx free fn in idpf
>
Recheck-request: iol-unit-amd64-testing
^ permalink raw reply [flat|nested] 52+ messages in thread* Re: [PATCH v5 0/4] net/intel: using common functions in idpf driver
2025-03-28 15:29 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Bruce Richardson
@ 2025-03-28 15:36 ` David Marchand
0 siblings, 0 replies; 52+ messages in thread
From: David Marchand @ 2025-03-28 15:36 UTC (permalink / raw)
To: Bruce Richardson; +Cc: Shaiq Wani, dev, aman.deep.singh
On Fri, Mar 28, 2025 at 4:30 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Thu, Mar 27, 2025 at 09:34:33PM +0530, Shaiq Wani wrote:
> > reworked the drivers to use the common functions
> > and structures from drivers/net/intel/common.
> >
> > Shaiq Wani (4):
> > net/intel: align Tx queue struct field names
> > net/intel: use common Tx queue structure
> > net/intel: use common Tx entry structure
> > net/idpf: use common Tx free fn in idpf
> >
> Recheck-request: iol-unit-amd64-testing
I also received a strange report on eal_flags_misc_autotest, so it is
probably not an issue with this series.
The test crashes with what smells like a double free for a memzone
object, strange.
--
David Marchand
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v5 0/4] net/intel: using common functions in idpf driver
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (4 preceding siblings ...)
2025-03-28 15:29 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Bruce Richardson
@ 2025-03-28 17:58 ` Bruce Richardson
5 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-03-28 17:58 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Mar 27, 2025 at 09:34:33PM +0530, Shaiq Wani wrote:
> reworked the drivers to use the common functions
> and structures from drivers/net/intel/common.
>
> Shaiq Wani (4):
> net/intel: align Tx queue struct field names
> net/intel: use common Tx queue structure
> net/intel: use common Tx entry structure
> net/idpf: use common Tx free fn in idpf
>
I like the idea behind these changes, so please keep my acks on v6 of this
set, to fix some of the minor issues I've highlighted in the comments on the
individual patches.
Thanks,
/Bruce
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v4 2/4] net/intel: use common Tx queue structure
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-03-27 10:45 ` Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 10:45 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 20 +++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 26 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 3 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 36 ++++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 58 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 12 ++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 21 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 5 +-
16 files changed, 101 insertions(+), 117 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..af32f4deda 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -98,6 +99,25 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ void **txqs; /*only valid for split queue mode*/
+ bool q_started; /* if tx queue has been started */
+
+ /* only valid for split queue mode */
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ uint8_t expected_gen_id;
+
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
@@ -1167,7 +1168,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 8eed8f16d5..d7b5a660b5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index caf02295a3..874b5cd5f3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "cpfl_ethdev.h"
#include "cpfl_rxtx.h"
+#include "../common/tx.h"
#define CPFL_SCALAR_PATH 0
#define CPFL_VECTOR_PATH 1
@@ -49,7 +50,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index df16aa3f06..48fc3ef7ae 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,7 +208,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
for (i = 0; i < size; i++)
((volatile char *)txq->desc_ring)[i] = 0;
- txe = txq->sw_ring;
+ txe = (struct idpf_tx_entry *)txq->sw_ring;
prev = (uint16_t)(txq->sw_nb_desc - 1);
for (i = 0; i < txq->sw_nb_desc; i++) {
txe[i].mbuf = NULL;
@@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,7 +264,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txe;
uint32_t i, size;
@@ -275,7 +275,7 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
return;
}
- txe = txq->sw_ring;
+ txe = (struct idpf_tx_entry *)txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
((volatile char *)txq->idpf_tx_ring)[i] = 0;
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct idpf_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -794,7 +794,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
break;
case IDPF_TXD_COMPLT_RS:
/* q_head indicates sw_id when ctype is 2 */
- txe = &txq->sw_ring[q_head];
+ txe = (struct idpf_tx_entry *)&txq->sw_ring[q_head];
if (txe->mbuf != NULL) {
rte_pktmbuf_free_seg(txe->mbuf);
txe->mbuf = NULL;
@@ -860,7 +860,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct idpf_tx_entry *sw_ring;
@@ -874,11 +874,11 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint8_t cmd_dtype;
uint16_t nb_ctx;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
txr = txq->desc_ring;
- sw_ring = txq->sw_ring;
+ sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
tx_id = txq->tx_tail;
sw_id = txq->sw_tail;
txe = &sw_ring[sw_id];
@@ -1302,10 +1302,10 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct idpf_tx_entry *sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1351,7 +1351,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct idpf_tx_entry *txe, *txn;
struct idpf_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
@@ -1368,10 +1368,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
nb_tx = 0;
txq = tx_queue;
- if (unlikely(txq == NULL) || unlikely(!txq->q_started))
+ if (unlikely(txq == NULL))
return nb_tx;
- sw_ring = txq->sw_ring;
+ sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 84c05cfaac..1a64b6615c 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -154,49 +155,6 @@ struct idpf_tx_entry {
uint16_t last_id;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_tx_used;
- uint16_t nb_tx_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t tx_free_thresh;
-
- uint16_t tx_rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t tx_next_dd; /* next to set RS, for VPMD */
- uint16_t tx_next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *idpf_ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -224,7 +182,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -238,7 +196,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -248,11 +206,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -283,9 +241,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index ba97003779..26b24106d0 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -489,7 +489,7 @@ idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct idpf_tx_entry *txep;
uint32_t n;
@@ -509,7 +509,7 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -619,7 +619,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -638,7 +638,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
@@ -659,7 +659,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
}
idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
@@ -687,7 +687,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index d2f82ab3f5..a41b5f33af 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -6,6 +6,7 @@
#include "idpf_common_device.h"
#include "idpf_common_rxtx.h"
+
#define IDPF_DESCS_PER_LOOP_AVX 8
#define PKTLEN_SHIFT 10
@@ -996,7 +997,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1193,7 +1194,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1264,7 +1265,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1289,10 +1290,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1321,7 +1322,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct idpf_tx_vec_entry *txep;
uint32_t n;
@@ -1496,7 +1497,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct idpf_tx_vec_entry *txep;
uint16_t n, nb_commit, tx_id;
@@ -1560,7 +1561,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1592,7 +1593,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1620,7 +1621,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index af81680825..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
@@ -709,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 95b112c95c..4d8cfa56ac 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,7 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
+ struct ci_tx_queue *txq =
dev->data->tx_queues[tx_queue_id];
int err = 0;
@@ -653,7 +653,6 @@ idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
tx_queue_id);
} else {
- txq->q_started = true;
dev->data->tx_queue_state[tx_queue_id] =
RTE_ETH_QUEUE_STATE_STARTED;
}
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -742,7 +741,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +879,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 608cab30f3..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
@@ -49,7 +50,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -103,7 +104,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v4 3/4] net/intel: use common Tx entry structure
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 2/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-27 10:45 ` Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 10:45 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/idpf/idpf_common_rxtx.c | 26 ++++++++---------
drivers/net/intel/idpf/idpf_common_rxtx.h | 10 -------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 23 +++++----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
5 files changed, 30 insertions(+), 59 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 48fc3ef7ae..4318b3fb3c 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
void
idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -223,7 +223,7 @@ idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
for (i = 0; i < size; i++)
((volatile char *)txq->desc_ring)[i] = 0;
- txe = (struct idpf_tx_entry *)txq->sw_ring;
+ txe = (struct ci_tx_entry *)txq->sw_ring;
prev = (uint16_t)(txq->sw_nb_desc - 1);
for (i = 0; i < txq->sw_nb_desc; i++) {
txe[i].mbuf = NULL;
@@ -266,7 +266,7 @@ idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
void
idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -275,7 +275,7 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
return;
}
- txe = (struct idpf_tx_entry *)txq->sw_ring;
+ txe = (struct ci_tx_entry *)txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
((volatile char *)txq->idpf_tx_ring)[i] = 0;
@@ -755,7 +755,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -794,7 +794,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
break;
case IDPF_TXD_COMPLT_RS:
/* q_head indicates sw_id when ctype is 2 */
- txe = (struct idpf_tx_entry *)&txq->sw_ring[q_head];
+ txe = &txq->sw_ring[q_head];
if (txe->mbuf != NULL) {
rte_pktmbuf_free_seg(txe->mbuf);
txe->mbuf = NULL;
@@ -863,9 +863,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -878,7 +878,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
txr = txq->desc_ring;
- sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ sw_ring = txq->sw_ring;
tx_id = txq->tx_tail;
sw_id = txq->sw_tail;
txe = &sw_ring[sw_id];
@@ -1305,7 +1305,7 @@ static inline int
idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1349,8 +1349,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
@@ -1371,7 +1371,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
if (unlikely(txq == NULL))
return nb_tx;
- sw_ring = (struct idpf_tx_entry *)txq->sw_ring;
+ sw_ring = txq->sw_ring;
txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 1a64b6615c..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -149,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -167,10 +161,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 26b24106d0..bce0257804 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -478,20 +478,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -509,7 +500,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = (struct idpf_tx_entry *)&txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -621,7 +612,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -638,13 +629,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -659,10 +650,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct idpf_tx_entry *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index a41b5f33af..c0ec754642 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -999,7 +999,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1112,16 +1112,6 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1196,7 +1186,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1221,7 +1211,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1240,7 +1230,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1324,7 +1314,7 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1499,7 +1489,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1522,7 +1512,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1541,7 +1531,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1597,7 +1587,7 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 4d8cfa56ac..7f512c6bc6 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v4 4/4] net/idpf: use common Tx free fn in idpf
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-03-27 10:45 ` [PATCH v4 3/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-03-27 10:45 ` Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-27 10:45 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 10 +-
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 237 +-----------------
2 files changed, 22 insertions(+), 225 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index bce0257804..fff31fedec 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -79,6 +79,14 @@ idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline uint16_t
_idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
@@ -621,7 +629,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index c0ec754642..dbbdc71e22 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -122,6 +122,14 @@ idpf_singleq_rearm_common(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static __rte_always_inline void
idpf_singleq_rearm(struct idpf_rx_queue *rxq)
{
@@ -996,122 +1004,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1195,7 +1087,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1311,110 +1203,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1556,11 +1344,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v3 2/4] net/intel: align Tx queue struct field names
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 1/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-24 12:49 ` Shaiq Wani
2025-03-24 13:16 ` Bruce Richardson
2025-03-24 12:49 ` [PATCH v3 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:49 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 2 +-
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 140 insertions(+), 140 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index cf4320df0c..d7b5a660b5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index eb730ea377..f1e555b5f8 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 3e8f24ac38..648b082924 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -233,16 +233,16 @@ idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1310,9 +1310,9 @@ idpf_xmit_cleanup(struct ci_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct ci_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index ea94acf9f9..f65dc01cc2 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 948b95e79f..5e4e738ffa 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -496,20 +496,20 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->sw_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -538,12 +538,12 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -627,20 +627,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -655,10 +655,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -667,12 +667,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -692,7 +692,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index f215583edf..f6c8e8ba52 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1003,21 +1003,21 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1269,7 +1269,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1328,15 +1328,15 @@ idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1598,10 +1598,10 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1625,6 +1625,6 @@ idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 11394d28b7..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index ed02cf5bcb..fcf13696d1 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -681,11 +681,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -712,7 +712,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
}
txq = dev->data->tx_queues[tx_queue_id];
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 979e7f38bb..597d4472d2 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v3 3/4] net/intel: use common Tx entry structure
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 1/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 2/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-03-24 12:49 ` Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:49 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_ethdev.c | 1 +
drivers/net/intel/cpfl/cpfl_rxtx.h | 1 +
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 1 +
drivers/net/intel/idpf/idpf_common_rxtx.c | 16 +++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 11 +-------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 25 ++++++-----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_ethdev.c | 1 +
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 1 +
drivers/net/intel/idpf/meson.build | 2 +-
12 files changed, 34 insertions(+), 56 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 2f071082e1..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index 314a233e6d..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index f1e555b5f8..874b5cd5f3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "cpfl_ethdev.h"
#include "cpfl_rxtx.h"
+#include "../common/tx.h"
#define CPFL_SCALAR_PATH 0
#define CPFL_VECTOR_PATH 1
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 648b082924..deaa579391 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
void
idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -266,7 +266,7 @@ idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
void
idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -755,7 +755,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -863,9 +863,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -1305,7 +1305,7 @@ static inline int
idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1349,8 +1349,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index f65dc01cc2..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -148,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -166,10 +161,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 5e4e738ffa..bce0257804 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -478,20 +478,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -499,7 +490,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->sw_ring[txq->tx_next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
@@ -509,7 +500,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -621,7 +612,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -638,13 +629,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -659,10 +650,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index f6c8e8ba52..715be52046 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -998,7 +998,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1111,16 +1111,6 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1195,7 +1185,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1220,7 +1210,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1239,7 +1229,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1323,7 +1313,7 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1498,7 +1488,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1521,7 +1511,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1540,7 +1530,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1596,7 +1586,7 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index e722f4d3e8..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index fcf13696d1..16503ca7af 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 597d4472d2..f97a9a6fce 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
diff --git a/drivers/net/intel/idpf/meson.build b/drivers/net/intel/idpf/meson.build
index 4b272d02b1..296c9cec45 100644
--- a/drivers/net/intel/idpf/meson.build
+++ b/drivers/net/intel/idpf/meson.build
@@ -37,7 +37,7 @@ if arch_subdir == 'x86' and dpdk_conf.get('RTE_IOVA_IN_MBUF') == 1
endif
idpf_common_avx512_lib = static_library('idpf_common_avx512_lib',
'idpf_common_rxtx_avx512.c',
- dependencies: static_rte_mbuf,
+ dependencies: [static_rte_mbuf,static_rte_ethdev],
include_directories: includes,
c_args: avx512_args)
objs += idpf_common_avx512_lib.extract_objects('idpf_common_rxtx_avx512.c')
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v3 4/4] net/idpf: use common Tx free fn in idpf
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-03-24 12:49 ` [PATCH v3 3/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-03-24 12:49 ` Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:49 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 68 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 237 +-----------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 2 +-
3 files changed, 23 insertions(+), 284 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index bce0257804..6399f357d3 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -79,6 +79,14 @@ idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline uint16_t
_idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
@@ -479,64 +487,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -621,7 +571,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 715be52046..cb83dd3601 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -121,6 +121,14 @@ idpf_singleq_rearm_common(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static __rte_always_inline void
idpf_singleq_rearm(struct idpf_rx_queue *rxq)
{
@@ -995,122 +1003,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1194,7 +1086,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1310,110 +1202,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1555,11 +1343,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index f97a9a6fce..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,7 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
-#include "../common/tx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v2 2/4] net/intel: align Tx queue struct field names
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 1/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-03-24 12:39 ` Shaiq Wani
2025-03-24 12:40 ` [PATCH v2 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-24 12:40 ` [PATCH v2 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:39 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 2 +-
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 140 insertions(+), 140 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index cf4320df0c..d7b5a660b5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index eb730ea377..f1e555b5f8 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 3e8f24ac38..648b082924 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -233,16 +233,16 @@ idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1310,9 +1310,9 @@ idpf_xmit_cleanup(struct ci_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct ci_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index ea94acf9f9..f65dc01cc2 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 948b95e79f..5e4e738ffa 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -496,20 +496,20 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->sw_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -538,12 +538,12 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -627,20 +627,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -655,10 +655,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -667,12 +667,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -692,7 +692,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index f215583edf..f6c8e8ba52 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1003,21 +1003,21 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1269,7 +1269,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1328,15 +1328,15 @@ idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1598,10 +1598,10 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1625,6 +1625,6 @@ idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 11394d28b7..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index ed02cf5bcb..fcf13696d1 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -681,11 +681,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -712,7 +712,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
}
txq = dev->data->tx_queues[tx_queue_id];
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 979e7f38bb..597d4472d2 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v2 3/4] net/intel: use common Tx entry structure
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 1/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 2/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-03-24 12:40 ` Shaiq Wani
2025-03-24 12:40 ` [PATCH v2 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:40 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_ethdev.c | 1 +
drivers/net/intel/cpfl/cpfl_rxtx.h | 1 +
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 1 +
drivers/net/intel/idpf/idpf_common_rxtx.c | 16 +++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 11 +-------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 25 ++++++-----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_ethdev.c | 1 +
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 1 +
drivers/net/intel/idpf/meson.build | 2 +-
12 files changed, 34 insertions(+), 56 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 2f071082e1..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index 314a233e6d..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index f1e555b5f8..874b5cd5f3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "cpfl_ethdev.h"
#include "cpfl_rxtx.h"
+#include "../common/tx.h"
#define CPFL_SCALAR_PATH 0
#define CPFL_VECTOR_PATH 1
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 648b082924..deaa579391 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
void
idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -266,7 +266,7 @@ idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
void
idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -755,7 +755,7 @@ idpf_split_tx_free(struct ci_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -863,9 +863,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -1305,7 +1305,7 @@ static inline int
idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1349,8 +1349,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index f65dc01cc2..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -148,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -166,10 +161,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 5e4e738ffa..bce0257804 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -478,20 +478,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -499,7 +490,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->sw_ring[txq->tx_next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
@@ -509,7 +500,7 @@ idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
+ txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -621,7 +612,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -638,13 +629,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -659,10 +650,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index f6c8e8ba52..715be52046 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -998,7 +998,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1111,16 +1111,6 @@ idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1195,7 +1185,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1220,7 +1210,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1239,7 +1229,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1323,7 +1313,7 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1498,7 +1488,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1521,7 +1511,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1540,7 +1530,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1596,7 +1586,7 @@ idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index e722f4d3e8..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index fcf13696d1..16503ca7af 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 597d4472d2..f97a9a6fce 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
diff --git a/drivers/net/intel/idpf/meson.build b/drivers/net/intel/idpf/meson.build
index 4b272d02b1..296c9cec45 100644
--- a/drivers/net/intel/idpf/meson.build
+++ b/drivers/net/intel/idpf/meson.build
@@ -37,7 +37,7 @@ if arch_subdir == 'x86' and dpdk_conf.get('RTE_IOVA_IN_MBUF') == 1
endif
idpf_common_avx512_lib = static_library('idpf_common_avx512_lib',
'idpf_common_rxtx_avx512.c',
- dependencies: static_rte_mbuf,
+ dependencies: [static_rte_mbuf,static_rte_ethdev],
include_directories: includes,
c_args: avx512_args)
objs += idpf_common_avx512_lib.extract_objects('idpf_common_rxtx_avx512.c')
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v2 4/4] net/idpf: use common Tx free fn in idpf
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
` (2 preceding siblings ...)
2025-03-24 12:40 ` [PATCH v2 3/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-03-24 12:40 ` Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-03-24 12:40 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 68 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 237 +-----------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 2 +-
3 files changed, 23 insertions(+), 284 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index bce0257804..6399f357d3 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -79,6 +79,14 @@ idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline uint16_t
_idpf_singleq_recv_raw_pkts_vec_avx2(struct idpf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
@@ -479,64 +487,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring_vec[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -621,7 +571,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 715be52046..cb83dd3601 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -121,6 +121,14 @@ idpf_singleq_rearm_common(struct idpf_rx_queue *rxq)
IDPF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
}
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static __rte_always_inline void
idpf_singleq_rearm(struct idpf_rx_queue *rxq)
{
@@ -995,122 +1003,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1194,7 +1086,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1310,110 +1202,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1555,11 +1343,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index f97a9a6fce..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,7 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
-#include "../common/tx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v6 0/4] net/intel: using common functions in idpf driver
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-12 16:38 ` Bruce Richardson
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
@ 2025-04-03 11:24 ` Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 1/4] net/intel: align Tx queue struct field names Shaiq Wani
` (4 more replies)
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
4 siblings, 5 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-03 11:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions
and structures from drivers/net/intel/common.
Shaiq Wani (4):
net/intel: align Tx queue struct field names
net/intel: use common Tx entry structure
net/intel: use common Tx queue structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 18 +
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 6 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 108 +++---
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 108 ++----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 316 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 47 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 17 +-
16 files changed, 231 insertions(+), 546 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v6 1/4] net/intel: align Tx queue struct field names
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-04-03 11:24 ` Shaiq Wani
2025-04-08 16:21 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 2/4] net/intel: use common Tx entry structure Shaiq Wani
` (3 subsequent siblings)
4 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-04-03 11:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 21 ++---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 150 insertions(+), 149 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..8eed8f16d5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..caf02295a3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 7171e27b8d..df16aa3f06 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -233,16 +233,16 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -278,11 +278,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -291,13 +291,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
void
@@ -310,11 +310,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -324,7 +324,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -343,7 +343,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -789,7 +789,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -886,7 +886,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -895,12 +895,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -953,13 +953,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1310,9 +1310,9 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1336,7 +1336,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1372,12 +1372,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1410,14 +1410,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1479,10 +1479,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1490,7 +1490,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1613,13 +1613,13 @@ idpf_rxq_vec_setup_default(struct idpf_rx_queue *rxq)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..84c05cfaac 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -157,34 +157,35 @@ struct idpf_tx_entry {
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
+ volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
volatile union {
struct idpf_flex_tx_sched_desc *desc_ring;
struct idpf_splitq_tx_compl_desc *compl_ring;
};
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
+ rte_iova_t tx_ring_dma; /* Tx ring DMA address */
struct idpf_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
volatile uint8_t *qtx_tail; /* register address of tail */
/* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
+ uint16_t nb_tx_used;
+ uint16_t nb_tx_free;
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
+ uint16_t tx_free_thresh;
+
+ uint16_t tx_rs_thresh;
uint16_t port_id;
uint16_t queue_id;
uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
+ uint16_t tx_next_dd; /* next to set RS, for VPMD */
+ uint16_t tx_next_rs; /* next to check DD, for VPMD */
bool q_set; /* if tx queue has been configured */
bool q_started; /* if tx queue has been started */
bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
+ const struct idpf_txq_ops *idpf_ops;
/* only valid for split queue mode */
uint16_t sw_nb_desc;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 43a95466ae..ba97003779 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -496,20 +496,20 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -538,12 +538,12 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -627,20 +627,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -655,10 +655,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -667,12 +667,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -692,7 +692,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index b630d1fcd9..d2f82ab3f5 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1003,21 +1003,21 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1103,12 +1103,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1201,22 +1201,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1231,10 +1231,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1244,12 +1244,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1269,7 +1269,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1328,15 +1328,15 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1415,13 +1415,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1506,9 +1506,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1517,7 +1517,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1532,7 +1532,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1545,9 +1545,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1568,10 +1568,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1598,10 +1598,10 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1625,6 +1625,6 @@ idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 0ae1d55d79..af81680825 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1101,7 +1101,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1110,7 +1110,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1121,7 +1121,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..95b112c95c 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..608cab30f3 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v6 2/4] net/intel: use common Tx entry structure
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-04-03 11:24 ` Shaiq Wani
2025-04-08 16:22 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 3/4] net/intel: use common Tx queue structure Shaiq Wani
` (2 subsequent siblings)
4 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-04-03 11:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 16 +++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 13 ++-------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 21 ++++----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_ethdev.c | 1 +
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 1 +
9 files changed, 30 insertions(+), 55 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 8eed8f16d5..6b7e7c5087 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index df16aa3f06..4086714ae1 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -210,7 +210,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
void
idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -266,7 +266,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
void
idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -755,7 +755,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct idpf_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -863,9 +863,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -1305,7 +1305,7 @@ static inline int
idpf_xmit_cleanup(struct idpf_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1349,8 +1349,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct idpf_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 84c05cfaac..30f9e9398d 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -148,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
@@ -163,7 +158,7 @@ struct idpf_tx_queue {
struct idpf_splitq_tx_compl_desc *compl_ring;
};
rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
+ struct ci_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
@@ -209,10 +204,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index ba97003779..40da70a6aa 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -478,20 +478,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -621,7 +612,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -638,13 +629,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -659,10 +650,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index d2f82ab3f5..eccdcd43ff 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -998,7 +998,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1111,16 +1111,6 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1195,7 +1185,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct idpf_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1220,7 +1210,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1239,7 +1229,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1323,7 +1313,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1498,7 +1488,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1521,7 +1511,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1540,7 +1530,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1596,7 +1586,7 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..62685d3b7e 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 95b112c95c..d67526c0fa 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 608cab30f3..bb9cbf5c02 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v6 3/4] net/intel: use common Tx queue structure
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 2/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-04-03 11:24 ` Shaiq Wani
2025-04-08 16:49 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-04-08 16:52 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Bruce Richardson
4 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-04-03 11:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
drivers/net/intel/common/tx.h | 18 ++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 24 ++++----
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 20 +++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 57 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 10 ++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
15 files changed, 83 insertions(+), 107 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index d9cf4474fc..9694b0fc06 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -98,6 +99,23 @@ struct ci_tx_queue {
uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ void **txqs; /*only valid for split queue mode*/
+ bool q_started; /* if tx queue has been started */
+ /* only valid for split queue mode */
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ uint8_t expected_gen_id;
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
@@ -1167,7 +1168,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 6b7e7c5087..20a9042f3a 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index caf02295a3..f1e555b5f8 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -49,7 +49,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 4086714ae1..7cf3379ff5 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -90,7 +90,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -208,7 +208,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
}
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -246,7 +246,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -264,7 +264,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
}
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -333,7 +333,7 @@ idpf_qc_rx_queue_release(void *rxq)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -750,13 +750,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct ci_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -860,7 +860,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct ci_tx_entry *sw_ring;
@@ -1302,7 +1302,7 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
struct ci_tx_entry *sw_ring = txq->sw_ring;
@@ -1351,7 +1351,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct ci_tx_entry *txe, *txn;
struct ci_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 30f9e9398d..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -149,49 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct ci_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_tx_used;
- uint16_t nb_tx_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t tx_free_thresh;
-
- uint16_t tx_rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t tx_next_dd; /* next to set RS, for VPMD */
- uint16_t tx_next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *idpf_ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -215,7 +172,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -229,7 +186,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -239,11 +196,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -274,9 +231,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 40da70a6aa..83797ce13e 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -480,7 +480,7 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txep;
uint32_t n;
@@ -610,7 +610,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -629,7 +629,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
@@ -650,7 +650,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
@@ -678,7 +678,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index eccdcd43ff..715be52046 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -996,7 +996,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1183,7 +1183,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1254,7 +1254,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1279,10 +1279,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1311,7 +1311,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1486,7 +1486,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1550,7 +1550,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1582,7 +1582,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1610,7 +1610,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
};
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index af81680825..0580a1819a 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1074,7 +1074,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
}
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 62685d3b7e..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -710,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index d67526c0fa..bf190b02ee 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,8 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
- dev->data->tx_queues[tx_queue_id];
+ struct ci_tx_queue *txq = dev->data->tx_queues[tx_queue_id];
int err = 0;
err = idpf_vc_txq_config(vport, txq);
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -742,7 +741,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +879,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index bb9cbf5c02..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -50,7 +50,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -104,7 +104,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v6 3/4] net/intel: use common Tx queue structure
2025-04-03 11:24 ` [PATCH v6 3/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-04-08 16:49 ` Bruce Richardson
0 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-04-08 16:49 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Apr 03, 2025 at 04:54:28PM +0530, Shaiq Wani wrote:
> Merge in additional fields used by the idpf driver and then convert it
> over to using the common Tx queue structure
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
> drivers/net/intel/common/tx.h | 18 ++++++
> drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
> drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
> drivers/net/intel/cpfl/cpfl_rxtx.c | 24 ++++----
> drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
> drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
> drivers/net/intel/idpf/idpf_common_rxtx.c | 20 +++----
> drivers/net/intel/idpf/idpf_common_rxtx.h | 57 +++----------------
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 10 ++--
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
> drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
> drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
> drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
> drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
> drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
> 15 files changed, 83 insertions(+), 107 deletions(-)
>
> diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
> index d9cf4474fc..9694b0fc06 100644
> --- a/drivers/net/intel/common/tx.h
> +++ b/drivers/net/intel/common/tx.h
> @@ -35,6 +35,7 @@ struct ci_tx_queue {
> volatile struct i40e_tx_desc *i40e_tx_ring;
> volatile struct iavf_tx_desc *iavf_tx_ring;
> volatile struct ice_tx_desc *ice_tx_ring;
> + volatile struct idpf_base_tx_desc *idpf_tx_ring;
> volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
> };
> volatile uint8_t *qtx_tail; /* register address of tail */
> @@ -98,6 +99,23 @@ struct ci_tx_queue {
> uint8_t wthresh; /**< Write-back threshold reg. */
> uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */
> };
> + struct { /* idpf specific values */
> + volatile union {
> + struct idpf_flex_tx_sched_desc *desc_ring;
> + struct idpf_splitq_tx_compl_desc *compl_ring;
> + };
> + const struct idpf_txq_ops *idpf_ops;
> + struct ci_tx_queue *complq;
> + void **txqs; /*only valid for split queue mode*/
> + bool q_started; /* if tx queue has been started */
> + /* only valid for split queue mode */
> + uint32_t tx_start_qid;
> + uint16_t sw_nb_desc;
> + uint16_t sw_tail;
> +#define IDPF_TX_CTYPE_NUM 8
> + uint16_t ctype[IDPF_TX_CTYPE_NUM];
> + uint8_t expected_gen_id;
> + };
> };
> };
While I think we can do some work in terms of shrinking down this queue
structure, its not a massive problem I think right now. It can be solved
separate from this patch.
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-04-03 11:24 ` [PATCH v6 3/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-04-03 11:24 ` Shaiq Wani
2025-04-08 16:50 ` Bruce Richardson
2025-04-08 16:52 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Bruce Richardson
4 siblings, 1 reply; 52+ messages in thread
From: Shaiq Wani @ 2025-04-03 11:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 61 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 230 +-----------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 8 +
3 files changed, 16 insertions(+), 283 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 83797ce13e..1d4712b973 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -6,6 +6,7 @@
#include "idpf_common_rxtx.h"
#include "idpf_common_device.h"
+#include "idpf_rxtx_vec_common.h"
static __rte_always_inline void
idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
@@ -479,64 +480,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -621,7 +564,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 715be52046..752f254fe3 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -5,6 +5,7 @@
#include <rte_vect.h>
#include "idpf_common_device.h"
#include "idpf_common_rxtx.h"
+#include "idpf_rxtx_vec_common.h"
#define IDPF_DESCS_PER_LOOP_AVX 8
#define PKTLEN_SHIFT 10
@@ -995,122 +996,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1194,7 +1079,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1310,110 +1195,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1555,11 +1336,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index e444addf85..cd75c050c9 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -28,6 +28,14 @@
RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline int
idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf
2025-04-03 11:24 ` [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
@ 2025-04-08 16:50 ` Bruce Richardson
0 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-04-08 16:50 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Apr 03, 2025 at 04:54:29PM +0530, Shaiq Wani wrote:
> Switch the idpf driver to use the common Tx free function for
> AVX2 and AVX512
>
> Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
> ---
> .../net/intel/idpf/idpf_common_rxtx_avx2.c | 61 +----
> .../net/intel/idpf/idpf_common_rxtx_avx512.c | 230 +-----------------
> drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 8 +
> 3 files changed, 16 insertions(+), 283 deletions(-)
>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v6 0/4] net/intel: using common functions in idpf driver
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (3 preceding siblings ...)
2025-04-03 11:24 ` [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
@ 2025-04-08 16:52 ` Bruce Richardson
4 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-04-08 16:52 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Thu, Apr 03, 2025 at 04:54:25PM +0530, Shaiq Wani wrote:
> reworked the drivers to use the common functions
> and structures from drivers/net/intel/common.
>
> Shaiq Wani (4):
> net/intel: align Tx queue struct field names
> net/intel: use common Tx entry structure
> net/intel: use common Tx queue structure
> net/idpf: use common Tx free fn in idpf
>
Due to other changes, these patches no longer apply cleanly to my tree.
Can you perhaps rebase and do a new revision for me to apply? [Please keep
the acks on the patches when you do so]
/Bruce
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 0/4] net/intel: using common functions in idpf driver
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-04-10 5:24 ` Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 1/4] net/intel: align Tx queue struct field names Shaiq Wani
` (3 more replies)
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
4 siblings, 4 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-10 5:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions
and structures from drivers/net/intel/common.
v7: rebased on top of latest main branch so that it now applies cleanly.
Shaiq Wani (4):
net/intel: align Tx queue struct field names
net/intel: use common Tx entry structure
net/intel: use common Tx queue structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 18 +
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 6 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 108 +++---
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 108 ++----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 316 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 47 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 17 +-
16 files changed, 231 insertions(+), 546 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v7 1/4] net/intel: align Tx queue struct field names
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
@ 2025-04-10 5:24 ` Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 2/4] net/intel: use common Tx entry structure Shaiq Wani
` (2 subsequent siblings)
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-10 5:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 21 ++---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 150 insertions(+), 149 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..8eed8f16d5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..caf02295a3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 0e785daff4..f0e8d099ef 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -243,16 +243,16 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_complq_reset)
@@ -290,11 +290,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -303,13 +303,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_rx_queue_release)
@@ -323,11 +323,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -337,7 +337,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -357,7 +357,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -807,7 +807,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -905,7 +905,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -914,12 +914,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -972,13 +972,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1331,9 +1331,9 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1357,7 +1357,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1394,12 +1394,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1432,14 +1432,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1501,10 +1501,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1512,7 +1512,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1637,7 +1637,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_singleq_rx_vec_setup)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
@@ -1645,6 +1645,6 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_splitq_rx_vec_setup)
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..84c05cfaac 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -157,34 +157,35 @@ struct idpf_tx_entry {
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
+ volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
volatile union {
struct idpf_flex_tx_sched_desc *desc_ring;
struct idpf_splitq_tx_compl_desc *compl_ring;
};
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
+ rte_iova_t tx_ring_dma; /* Tx ring DMA address */
struct idpf_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
volatile uint8_t *qtx_tail; /* register address of tail */
/* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
+ uint16_t nb_tx_used;
+ uint16_t nb_tx_free;
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
+ uint16_t tx_free_thresh;
+
+ uint16_t tx_rs_thresh;
uint16_t port_id;
uint16_t queue_id;
uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
+ uint16_t tx_next_dd; /* next to set RS, for VPMD */
+ uint16_t tx_next_rs; /* next to check DD, for VPMD */
bool q_set; /* if tx queue has been configured */
bool q_started; /* if tx queue has been started */
bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
+ const struct idpf_txq_ops *idpf_ops;
/* only valid for split queue mode */
uint16_t sw_nb_desc;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 79b8d80ea9..6b7e1df9cd 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -498,20 +498,20 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -540,12 +540,12 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -629,20 +629,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -657,10 +657,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -669,12 +669,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -695,7 +695,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 1299346cbc..e0a0f1a8a7 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1006,21 +1006,21 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1106,12 +1106,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1204,22 +1204,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1234,10 +1234,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1247,12 +1247,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1272,7 +1272,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1332,15 +1332,15 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1419,13 +1419,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1510,9 +1510,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1521,7 +1521,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1536,7 +1536,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1549,9 +1549,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1572,10 +1572,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1603,10 +1603,10 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1631,6 +1631,6 @@ idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index c152a11811..1fd6bae02b 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1129,7 +1129,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1138,7 +1138,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1149,7 +1149,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..95b112c95c 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..608cab30f3 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v7 2/4] net/intel: use common Tx entry structure
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-04-10 5:24 ` Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 3/4] net/intel: use common Tx queue structure Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-10 5:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 16 +++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 13 ++-------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 21 ++++----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_ethdev.c | 1 +
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 1 +
9 files changed, 30 insertions(+), 55 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 8eed8f16d5..6b7e7c5087 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index f0e8d099ef..a008431bcf 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -220,7 +220,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_descq_reset)
void
idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -278,7 +278,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_single_tx_queue_reset)
void
idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -773,7 +773,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct idpf_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -882,9 +882,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -1326,7 +1326,7 @@ static inline int
idpf_xmit_cleanup(struct idpf_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1371,8 +1371,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct idpf_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 84c05cfaac..30f9e9398d 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -148,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
@@ -163,7 +158,7 @@ struct idpf_tx_queue {
struct idpf_splitq_tx_compl_desc *compl_ring;
};
rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
+ struct ci_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
@@ -209,10 +204,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 6b7e1df9cd..8481e3b6bb 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -480,20 +480,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -623,7 +614,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -640,13 +631,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -661,10 +652,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index e0a0f1a8a7..4c65386f42 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1001,7 +1001,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1114,16 +1114,6 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1198,7 +1188,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct idpf_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1223,7 +1213,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1242,7 +1232,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1327,7 +1317,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1502,7 +1492,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1525,7 +1515,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1544,7 +1534,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1601,7 +1591,7 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..62685d3b7e 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 95b112c95c..d67526c0fa 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 608cab30f3..bb9cbf5c02 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v7 3/4] net/intel: use common Tx queue structure
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 2/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-04-10 5:24 ` Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-10 5:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/common/tx.h | 18 ++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 24 ++++----
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 20 +++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 57 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 10 ++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
15 files changed, 83 insertions(+), 107 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index 8a19820855..c99bd5420f 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -100,6 +101,23 @@ struct ci_tx_queue {
uint8_t is_vf; /**< indicates that this is a VF queue */
uint8_t vf_ctx_initialized; /**< VF context descriptors initialized */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ void **txqs; /*only valid for split queue mode*/
+ bool q_started; /* if tx queue has been started */
+ /* only valid for split queue mode */
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ uint8_t expected_gen_id;
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
@@ -1167,7 +1168,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 6b7e7c5087..20a9042f3a 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index caf02295a3..f1e555b5f8 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -49,7 +49,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index a008431bcf..a734637a39 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -95,7 +95,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_txq_mbufs_release)
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -218,7 +218,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_descq_reset)
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -257,7 +257,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_complq_reset)
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -276,7 +276,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_single_tx_queue_reset)
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -347,7 +347,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_tx_queue_release)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -768,13 +768,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct ci_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -879,7 +879,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct ci_tx_entry *sw_ring;
@@ -1323,7 +1323,7 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
struct ci_tx_entry *sw_ring = txq->sw_ring;
@@ -1373,7 +1373,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct ci_tx_entry *txe, *txn;
struct ci_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 30f9e9398d..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -149,49 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct ci_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_tx_used;
- uint16_t nb_tx_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t tx_free_thresh;
-
- uint16_t tx_rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t tx_next_dd; /* next to set RS, for VPMD */
- uint16_t tx_next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *idpf_ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -215,7 +172,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -229,7 +186,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -239,11 +196,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -274,9 +231,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 8481e3b6bb..40a0473116 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -482,7 +482,7 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txep;
uint32_t n;
@@ -612,7 +612,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -631,7 +631,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
@@ -652,7 +652,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
@@ -681,7 +681,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 4c65386f42..d78b8ad86b 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -999,7 +999,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1186,7 +1186,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1257,7 +1257,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1283,10 +1283,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1315,7 +1315,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1490,7 +1490,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1554,7 +1554,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1587,7 +1587,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1616,7 +1616,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_tx_vec_avx512_setup)
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 1fd6bae02b..bab854e191 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1102,7 +1102,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
RTE_EXPORT_INTERNAL_SYMBOL(idpf_vc_txq_config)
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 62685d3b7e..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -710,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index d67526c0fa..bf190b02ee 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,8 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
- dev->data->tx_queues[tx_queue_id];
+ struct ci_tx_queue *txq = dev->data->tx_queues[tx_queue_id];
int err = 0;
err = idpf_vc_txq_config(vport, txq);
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -742,7 +741,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +879,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index bb9cbf5c02..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -50,7 +50,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -104,7 +104,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v7 4/4] net/idpf: use common Tx free fn in idpf
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
` (2 preceding siblings ...)
2025-04-10 5:24 ` [PATCH v7 3/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-04-10 5:24 ` Shaiq Wani
3 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-10 5:24 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 61 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 230 +-----------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 8 +
3 files changed, 16 insertions(+), 283 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 40a0473116..1babc5114b 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -7,6 +7,7 @@
#include "idpf_common_rxtx.h"
#include "idpf_common_device.h"
+#include "idpf_rxtx_vec_common.h"
static __rte_always_inline void
idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
@@ -481,64 +482,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -623,7 +566,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index d78b8ad86b..15b4c8a68e 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -6,6 +6,7 @@
#include <rte_vect.h>
#include "idpf_common_device.h"
#include "idpf_common_rxtx.h"
+#include "idpf_rxtx_vec_common.h"
#define IDPF_DESCS_PER_LOOP_AVX 8
#define PKTLEN_SHIFT 10
@@ -998,122 +999,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1197,7 +1082,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1314,110 +1199,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1559,11 +1340,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index e444addf85..cd75c050c9 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -28,6 +28,14 @@
RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline int
idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v8 0/4] net/intel: using common functions in idpf driver
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
` (3 preceding siblings ...)
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
@ 2025-04-28 9:21 ` Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 1/4] net/intel: align Tx queue struct field names Shaiq Wani
` (4 more replies)
4 siblings, 5 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-28 9:21 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
reworked the drivers to use the common functions
and structures from drivers/net/intel/common.
v8: fixed idpf_desc_done fn.
v7: rebased on top of latest main branch for a clean apply.
Shaiq Wani (4):
net/intel: align Tx queue struct field names
net/intel: use common Tx entry structure
net/intel: use common Tx queue structure
net/idpf: use common Tx free fn in idpf
drivers/net/intel/common/tx.h | 18 +
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 66 ++--
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 6 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 108 +++---
drivers/net/intel/idpf/idpf_common_rxtx.h | 69 +---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 108 ++----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 316 +++---------------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 8 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 3 +-
drivers/net/intel/idpf/idpf_rxtx.c | 47 ++-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 21 +-
16 files changed, 235 insertions(+), 546 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 52+ messages in thread* [PATCH v8 1/4] net/intel: align Tx queue struct field names
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
@ 2025-04-28 9:21 ` Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 2/4] net/intel: use common Tx entry structure Shaiq Wani
` (3 subsequent siblings)
4 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-28 9:21 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Align the Tx queue struct field names in idpf and
cpfl driver with the common Tx queue struct.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 40 ++++-----
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 4 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 72 ++++++++--------
drivers/net/intel/idpf/idpf_common_rxtx.h | 21 ++---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 44 +++++-----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 84 +++++++++----------
drivers/net/intel/idpf/idpf_common_virtchnl.c | 6 +-
drivers/net/intel/idpf/idpf_rxtx.c | 24 +++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
9 files changed, 150 insertions(+), 149 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 47351ca102..8eed8f16d5 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -249,7 +249,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -310,7 +310,7 @@ cpfl_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_rxq);
@@ -332,7 +332,7 @@ cpfl_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(cpfl_txq);
@@ -426,7 +426,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -501,7 +501,7 @@ cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -565,8 +565,8 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = cpfl_tx_offload_convert(offloads);
@@ -585,7 +585,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
@@ -598,7 +598,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -613,7 +613,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
cpfl_vport->nb_data_txq++;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = cpfl_txq;
@@ -663,7 +663,7 @@ cpfl_rx_hairpin_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
bufq->rx_buf_len = CPFL_P2P_MBUF_SIZE - RTE_PKTMBUF_HEADROOM;
bufq->q_set = true;
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
return 0;
}
@@ -860,7 +860,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
goto err_txq_mz_rsv;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->desc_ring = mz->addr;
txq->mz = mz;
@@ -868,7 +868,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr +
cpfl_hw_qtail_get(cpfl_vport->p2p_q_chunks_info->tx_qtail_start,
logic_qid, cpfl_vport->p2p_q_chunks_info->tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
@@ -898,7 +898,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_cq_mz_rsv;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
@@ -979,7 +979,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = tx_complq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = tx_complq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info.queue_id = tx_complq->queue_id;
txq_info.ring_len = tx_complq->nb_tx_desc;
@@ -998,7 +998,7 @@ cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq
memset(&txq_info, 0, sizeof(txq_info));
- txq_info.dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info.dma_ring_addr = txq->tx_ring_dma;
txq_info.type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info.queue_id = txq->queue_id;
txq_info.ring_len = txq->nb_tx_desc;
@@ -1296,12 +1296,12 @@ cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = &cpfl_rxq->base;
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
if (rxq->bufq2)
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
if (cpfl_rxq->hairpin_info.hairpin_q) {
cpfl_rx_hairpin_descq_reset(rxq);
cpfl_rx_hairpin_bufq_reset(rxq->bufq1);
@@ -1344,7 +1344,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = &cpfl_txq->base;
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index 5b98f86932..caf02295a3 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -54,8 +54,8 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return CPFL_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return CPFL_SCALAR_PATH;
if ((txq->offloads & CPFL_TX_NO_VECTOR_FLAGS) != 0)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index 0e785daff4..f0e8d099ef 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -243,16 +243,16 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
/* Use this as next to clean for split desc queue */
txq->last_desc_cleaned = 0;
txq->sw_tail = 0;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
memset(txq->ctype, 0, sizeof(txq->ctype));
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_complq_reset)
@@ -290,11 +290,11 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
txe = txq->sw_ring;
size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
for (i = 0; i < size; i++)
- ((volatile char *)txq->tx_ring)[i] = 0;
+ ((volatile char *)txq->idpf_tx_ring)[i] = 0;
prev = (uint16_t)(txq->nb_tx_desc - 1);
for (i = 0; i < txq->nb_tx_desc; i++) {
- txq->tx_ring[i].qw1 =
+ txq->idpf_tx_ring[i].qw1 =
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
txe[i].mbuf = NULL;
txe[i].last_id = i;
@@ -303,13 +303,13 @@ idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
}
txq->tx_tail = 0;
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
txq->last_desc_cleaned = txq->nb_tx_desc - 1;
- txq->nb_free = txq->nb_tx_desc - 1;
+ txq->nb_tx_free = txq->nb_tx_desc - 1;
- txq->next_dd = txq->rs_thresh - 1;
- txq->next_rs = txq->rs_thresh - 1;
+ txq->tx_next_dd = txq->tx_rs_thresh - 1;
+ txq->tx_next_rs = txq->tx_rs_thresh - 1;
}
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_rx_queue_release)
@@ -323,11 +323,11 @@ idpf_qc_rx_queue_release(void *rxq)
/* Split queue */
if (!q->adapter->is_rx_singleq) {
- q->bufq1->ops->release_mbufs(q->bufq1);
+ q->bufq1->idpf_ops->release_mbufs(q->bufq1);
rte_free(q->bufq1->sw_ring);
rte_memzone_free(q->bufq1->mz);
rte_free(q->bufq1);
- q->bufq2->ops->release_mbufs(q->bufq2);
+ q->bufq2->idpf_ops->release_mbufs(q->bufq2);
rte_free(q->bufq2->sw_ring);
rte_memzone_free(q->bufq2->mz);
rte_free(q->bufq2);
@@ -337,7 +337,7 @@ idpf_qc_rx_queue_release(void *rxq)
}
/* Single queue */
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -357,7 +357,7 @@ idpf_qc_tx_queue_release(void *txq)
rte_free(q->complq);
}
- q->ops->release_mbufs(q);
+ q->idpf_ops->release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -807,7 +807,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
q_head;
else
nb_desc_clean = q_head - txq->last_desc_cleaned;
- txq->nb_free += nb_desc_clean;
+ txq->nb_tx_free += nb_desc_clean;
txq->last_desc_cleaned = q_head;
break;
case IDPF_TXD_COMPLT_RS:
@@ -905,7 +905,7 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
tx_pkt = tx_pkts[nb_tx];
- if (txq->nb_free <= txq->free_thresh) {
+ if (txq->nb_tx_free <= txq->tx_free_thresh) {
/* TODO: Need to refine
* 1. free and clean: Better to decide a clean destination instead of
* loop times. And don't free mbuf when RS got immediately, free when
@@ -914,12 +914,12 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
* 2. out-of-order rewrite back haven't be supported, SW head and HW head
* need to be separated.
**/
- nb_to_clean = 2 * txq->rs_thresh;
+ nb_to_clean = 2 * txq->tx_rs_thresh;
while (nb_to_clean--)
idpf_split_tx_free(txq->complq);
}
- if (txq->nb_free < tx_pkt->nb_segs)
+ if (txq->nb_tx_free < tx_pkt->nb_segs)
break;
cmd_dtype = 0;
@@ -972,13 +972,13 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* fill the last descriptor with End of Packet (EOP) bit */
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_EOP;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
- if (txq->nb_used >= 32) {
+ if (txq->nb_tx_used >= 32) {
txd->qw1.cmd_dtype |= IDPF_TXD_FLEX_FLOW_CMD_RE;
/* Update txq RE bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
}
@@ -1331,9 +1331,9 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
- volatile struct idpf_base_tx_desc *txd = txq->tx_ring;
+ volatile struct idpf_base_tx_desc *txd = txq->idpf_tx_ring;
- desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->rs_thresh);
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
@@ -1357,7 +1357,7 @@ idpf_xmit_cleanup(struct idpf_tx_queue *txq)
txd[desc_to_clean_to].qw1 = 0;
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_free = (uint16_t)(txq->nb_free + nb_tx_to_clean);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
return 0;
}
@@ -1394,12 +1394,12 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
sw_ring = txq->sw_ring;
- txr = txq->tx_ring;
+ txr = txq->idpf_tx_ring;
tx_id = txq->tx_tail;
txe = &sw_ring[tx_id];
/* Check if the descriptor ring needs to be cleaned. */
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
(void)idpf_xmit_cleanup(txq);
for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
@@ -1432,14 +1432,14 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
" tx_first=%u tx_last=%u",
txq->port_id, txq->queue_id, tx_id, tx_last);
- if (nb_used > txq->nb_free) {
+ if (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
goto end_of_tx;
}
- if (unlikely(nb_used > txq->rs_thresh)) {
- while (nb_used > txq->nb_free) {
+ if (unlikely(nb_used > txq->tx_rs_thresh)) {
+ while (nb_used > txq->nb_tx_free) {
if (idpf_xmit_cleanup(txq) != 0) {
if (nb_tx == 0)
return 0;
@@ -1501,10 +1501,10 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* The last packet data descriptor needs End Of Packet (EOP) */
td_cmd |= IDPF_TX_DESC_CMD_EOP;
- txq->nb_used = (uint16_t)(txq->nb_used + nb_used);
- txq->nb_free = (uint16_t)(txq->nb_free - nb_used);
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
- if (txq->nb_used >= txq->rs_thresh) {
+ if (txq->nb_tx_used >= txq->tx_rs_thresh) {
TX_LOG(DEBUG, "Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
@@ -1512,7 +1512,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
td_cmd |= IDPF_TX_DESC_CMD_RS;
/* Update txq RS bit counters */
- txq->nb_used = 0;
+ txq->nb_tx_used = 0;
}
txd->qw1 |= rte_cpu_to_le_16(td_cmd << IDPF_TXD_QW1_CMD_S);
@@ -1637,7 +1637,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_singleq_rx_vec_setup)
int __rte_cold
idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->ops = &def_rx_ops_vec;
+ rxq->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq);
}
@@ -1645,6 +1645,6 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_splitq_rx_vec_setup)
int __rte_cold
idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq)
{
- rxq->bufq2->ops = &def_rx_ops_vec;
+ rxq->bufq2->idpf_ops = &def_rx_ops_vec;
return idpf_rxq_vec_setup_default(rxq->bufq2);
}
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index e19e1878f3..84c05cfaac 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -135,7 +135,7 @@ struct idpf_rx_queue {
bool q_set; /* if rx queue has been configured */
bool q_started; /* if rx queue has been started */
bool rx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_rxq_ops *ops;
+ const struct idpf_rxq_ops *idpf_ops;
struct idpf_rx_stats rx_stats;
@@ -157,34 +157,35 @@ struct idpf_tx_entry {
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *tx_ring; /* Tx ring virtual address */
+ volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
volatile union {
struct idpf_flex_tx_sched_desc *desc_ring;
struct idpf_splitq_tx_compl_desc *compl_ring;
};
- uint64_t tx_ring_phys_addr; /* Tx ring DMA address */
+ rte_iova_t tx_ring_dma; /* Tx ring DMA address */
struct idpf_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
volatile uint8_t *qtx_tail; /* register address of tail */
/* number of used desc since RS bit set */
- uint16_t nb_used;
- uint16_t nb_free;
+ uint16_t nb_tx_used;
+ uint16_t nb_tx_free;
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t free_thresh;
- uint16_t rs_thresh;
+ uint16_t tx_free_thresh;
+
+ uint16_t tx_rs_thresh;
uint16_t port_id;
uint16_t queue_id;
uint64_t offloads;
- uint16_t next_dd; /* next to set RS, for VPMD */
- uint16_t next_rs; /* next to check DD, for VPMD */
+ uint16_t tx_next_dd; /* next to set RS, for VPMD */
+ uint16_t tx_next_rs; /* next to check DD, for VPMD */
bool q_set; /* if tx queue has been configured */
bool q_started; /* if tx queue has been started */
bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *ops;
+ const struct idpf_txq_ops *idpf_ops;
/* only valid for split queue mode */
uint16_t sw_nb_desc;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 79b8d80ea9..6b7e1df9cd 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -498,20 +498,20 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
- * next_dd - (rs_thresh-1)
+ * tx_next_dd - (tx_rs_thresh-1)
*/
- txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
if (likely(m)) {
free[0] = m;
@@ -540,12 +540,12 @@ idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
}
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static inline void
@@ -629,20 +629,20 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_singleq_tx_free_bufs_vec(txq);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -657,10 +657,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = &txq->sw_ring[tx_id];
}
@@ -669,12 +669,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -695,7 +695,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 1299346cbc..e0a0f1a8a7 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1006,21 +1006,21 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
/* check DD bits on threshold descriptor */
- if ((txq->tx_ring[txq->next_dd].qw1 &
+ if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
return 0;
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1106,12 +1106,12 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
static __rte_always_inline void
@@ -1204,22 +1204,22 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- if (txq->nb_free < txq->free_thresh)
+ if (txq->nb_tx_free < txq->tx_free_thresh)
idpf_tx_singleq_free_bufs_avx512(txq);
- nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
if (unlikely(nb_pkts == 0))
return 0;
tx_id = txq->tx_tail;
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1234,10 +1234,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
- txdp = &txq->tx_ring[tx_id];
+ txdp = &txq->idpf_tx_ring[tx_id];
txep = (void *)txq->sw_ring;
txep += tx_id;
}
@@ -1247,12 +1247,12 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs) {
- txq->tx_ring[txq->next_rs].qw1 |=
+ if (tx_id > txq->tx_next_rs) {
+ txq->idpf_tx_ring[txq->tx_next_rs].qw1 |=
rte_cpu_to_le_64(((uint64_t)IDPF_TX_DESC_CMD_RS) <<
IDPF_TXD_QW1_CMD_S);
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
}
txq->tx_tail = tx_id;
@@ -1272,7 +1272,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_singleq_xmit_fixed_burst_vec_avx512(tx_queue, &tx_pkts[nb_tx],
num);
nb_tx += ret;
@@ -1332,15 +1332,15 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->rs_thresh);
+ struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
- n = txq->rs_thresh;
+ n = txq->tx_rs_thresh;
/* first buffer to free from S/W ring is at index
* tx_next_dd - (tx_rs_thresh-1)
*/
txep = (void *)txq->sw_ring;
- txep += txq->next_dd - (n - 1);
+ txep += txq->tx_next_dd - (n - 1);
if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
struct rte_mempool *mp = txep[0].mbuf->pool;
@@ -1419,13 +1419,13 @@ idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
done:
/* buffers were freed, update counters */
- txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
- txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
- if (txq->next_dd >= txq->nb_tx_desc)
- txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->rs_thresh;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
- return txq->rs_thresh;
+ return txq->tx_rs_thresh;
}
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
@@ -1510,9 +1510,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
tx_id = txq->tx_tail;
/* cross rx_thresh boundary is not allowed */
- nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
+ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
- nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
+ nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
return 0;
@@ -1521,7 +1521,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep = (void *)txq->sw_ring;
txep += tx_id;
- txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
@@ -1536,7 +1536,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
nb_commit = (uint16_t)(nb_commit - n);
tx_id = 0;
- txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
/* avoid reach the end of ring */
txdp = &txq->desc_ring[tx_id];
@@ -1549,9 +1549,9 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
tx_id = (uint16_t)(tx_id + nb_commit);
- if (tx_id > txq->next_rs)
- txq->next_rs =
- (uint16_t)(txq->next_rs + txq->rs_thresh);
+ if (tx_id > txq->tx_next_rs)
+ txq->tx_next_rs =
+ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
txq->tx_tail = tx_id;
@@ -1572,10 +1572,10 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->free_thresh)
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
idpf_tx_splitq_free_bufs_avx512(txq);
- num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
+ num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
&tx_pkts[nb_tx],
num);
@@ -1603,10 +1603,10 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
- if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
- i = txq->next_dd - txq->rs_thresh + 1;
+ i = txq->tx_next_dd - txq->tx_rs_thresh + 1;
if (txq->tx_tail < i) {
for (; i < txq->nb_tx_desc; i++) {
rte_pktmbuf_free_seg(swr[i].mbuf);
@@ -1631,6 +1631,6 @@ idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
if (!txq)
return 0;
- txq->ops = &avx512_tx_vec_ops;
+ txq->idpf_ops = &avx512_tx_vec_ops;
return 0;
}
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index c152a11811..1fd6bae02b 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1129,7 +1129,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;
@@ -1138,7 +1138,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
} else {
/* txq info */
txq_info = &vc_txqs->qinfo[0];
- txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;
txq_info->queue_id = txq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
@@ -1149,7 +1149,7 @@ idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
/* tx completion queue info */
txq_info = &vc_txqs->qinfo[1];
- txq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;
+ txq_info->dma_ring_addr = txq->complq->tx_ring_dma;
txq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;
txq_info->queue_id = txq->complq->queue_id;
txq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 0c3ecd2765..95b112c95c 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -187,7 +187,7 @@ idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,
idpf_qc_split_rx_bufq_reset(bufq);
bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
- bufq->ops = &def_rxq_ops;
+ bufq->idpf_ops = &def_rxq_ops;
bufq->q_set = true;
if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) {
@@ -305,7 +305,7 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
idpf_qc_single_rx_queue_reset(rxq);
rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
queue_idx * vport->chunks_info.rx_qtail_spacing);
- rxq->ops = &def_rxq_ops;
+ rxq->idpf_ops = &def_rxq_ops;
} else {
idpf_qc_split_rx_descq_reset(rxq);
@@ -378,7 +378,7 @@ idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
ret = -ENOMEM;
goto err_mz_reserve;
}
- cq->tx_ring_phys_addr = mz->iova;
+ cq->tx_ring_dma = mz->iova;
cq->compl_ring = mz->addr;
cq->mz = mz;
idpf_qc_split_tx_complq_reset(cq);
@@ -438,8 +438,8 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
is_splitq = !!(vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT);
txq->nb_tx_desc = nb_desc;
- txq->rs_thresh = tx_rs_thresh;
- txq->free_thresh = tx_free_thresh;
+ txq->tx_rs_thresh = tx_rs_thresh;
+ txq->tx_free_thresh = tx_free_thresh;
txq->queue_id = vport->chunks_info.tx_start_qid + queue_idx;
txq->port_id = dev->data->port_id;
txq->offloads = idpf_tx_offload_convert(offloads);
@@ -458,7 +458,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ret = -ENOMEM;
goto err_mz_reserve;
}
- txq->tx_ring_phys_addr = mz->iova;
+ txq->tx_ring_dma = mz->iova;
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
@@ -471,7 +471,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
if (!is_splitq) {
- txq->tx_ring = mz->addr;
+ txq->idpf_tx_ring = mz->addr;
idpf_qc_single_tx_queue_reset(txq);
} else {
txq->desc_ring = mz->addr;
@@ -486,7 +486,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +
queue_idx * vport->chunks_info.tx_qtail_spacing);
- txq->ops = &def_txq_ops;
+ txq->idpf_ops = &def_txq_ops;
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
@@ -682,11 +682,11 @@ idpf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
rxq = dev->data->rx_queues[rx_queue_id];
rxq->q_started = false;
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
- rxq->ops->release_mbufs(rxq);
+ rxq->idpf_ops->release_mbufs(rxq);
idpf_qc_single_rx_queue_reset(rxq);
} else {
- rxq->bufq1->ops->release_mbufs(rxq->bufq1);
- rxq->bufq2->ops->release_mbufs(rxq->bufq2);
+ rxq->bufq1->idpf_ops->release_mbufs(rxq->bufq1);
+ rxq->bufq2->idpf_ops->release_mbufs(rxq->bufq2);
idpf_qc_split_rx_queue_reset(rxq);
}
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -714,7 +714,7 @@ idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
txq = dev->data->tx_queues[tx_queue_id];
txq->q_started = false;
- txq->ops->release_mbufs(txq);
+ txq->idpf_ops->release_mbufs(txq);
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {
idpf_qc_single_tx_queue_reset(txq);
} else {
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 002c1e6948..608cab30f3 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -54,8 +54,8 @@ idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
if (txq == NULL)
return IDPF_SCALAR_PATH;
- if (txq->rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
- (txq->rs_thresh & 3) != 0)
+ if (txq->tx_rs_thresh < IDPF_VPMD_TX_MAX_BURST ||
+ (txq->tx_rs_thresh & 3) != 0)
return IDPF_SCALAR_PATH;
if ((txq->offloads & IDPF_TX_NO_VECTOR_FLAGS) != 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v8 2/4] net/intel: use common Tx entry structure
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 1/4] net/intel: align Tx queue struct field names Shaiq Wani
@ 2025-04-28 9:21 ` Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 3/4] net/intel: use common Tx queue structure Shaiq Wani
` (2 subsequent siblings)
4 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-28 9:21 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Used the common Tx entry structure and common Tx mbuf ring replenish fn
in place of idpf-specific structure and function.
The vector driver code paths (AVX2, AVX512) use the smaller SW
ring structure.
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/cpfl/cpfl_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 16 +++++------
drivers/net/intel/idpf/idpf_common_rxtx.h | 13 ++-------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 21 ++++----------
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 28 ++++++-------------
drivers/net/intel/idpf/idpf_ethdev.c | 1 +
drivers/net/intel/idpf/idpf_rxtx.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.h | 1 +
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 1 +
9 files changed, 30 insertions(+), 55 deletions(-)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 8eed8f16d5..6b7e7c5087 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -589,7 +589,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("cpfl tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index f0e8d099ef..a008431bcf 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -220,7 +220,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_descq_reset)
void
idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -278,7 +278,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_single_tx_queue_reset)
void
idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
uint32_t i, size;
uint16_t prev;
@@ -773,7 +773,7 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
- struct idpf_tx_entry *txe;
+ struct ci_tx_entry *txe;
struct idpf_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
@@ -882,9 +882,9 @@ idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *sw_ring;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
+ struct ci_tx_entry *txe, *txn;
uint16_t nb_used, tx_id, sw_id;
struct rte_mbuf *tx_pkt;
uint16_t nb_to_clean;
@@ -1326,7 +1326,7 @@ static inline int
idpf_xmit_cleanup(struct idpf_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
- struct idpf_tx_entry *sw_ring = txq->sw_ring;
+ struct ci_tx_entry *sw_ring = txq->sw_ring;
uint16_t nb_tx_desc = txq->nb_tx_desc;
uint16_t desc_to_clean_to;
uint16_t nb_tx_to_clean;
@@ -1371,8 +1371,8 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct idpf_base_tx_desc *txd;
volatile struct idpf_base_tx_desc *txr;
union idpf_tx_offload tx_offload = {0};
- struct idpf_tx_entry *txe, *txn;
- struct idpf_tx_entry *sw_ring;
+ struct ci_tx_entry *txe, *txn;
+ struct ci_tx_entry *sw_ring;
struct idpf_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 84c05cfaac..30f9e9398d 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -10,6 +10,7 @@
#include <rte_mbuf_core.h>
#include "idpf_common_device.h"
+#include "../common/tx.h"
#define IDPF_RX_MAX_BURST 32
@@ -148,12 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-struct idpf_tx_entry {
- struct rte_mbuf *mbuf;
- uint16_t next_id;
- uint16_t last_id;
-};
-
/* Structure associated with each TX queue. */
struct idpf_tx_queue {
const struct rte_memzone *mz; /* memzone for Tx ring */
@@ -163,7 +158,7 @@ struct idpf_tx_queue {
struct idpf_splitq_tx_compl_desc *compl_ring;
};
rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct idpf_tx_entry *sw_ring; /* address array of SW ring */
+ struct ci_tx_entry *sw_ring; /* address array of SW ring */
uint16_t nb_tx_desc; /* ring length */
uint16_t tx_tail; /* current value of tail */
@@ -209,10 +204,6 @@ union idpf_tx_offload {
};
};
-struct idpf_tx_vec_entry {
- struct rte_mbuf *mbuf;
-};
-
union idpf_tx_desc {
struct idpf_base_tx_desc *tx_ring;
struct idpf_flex_tx_sched_desc *desc_ring;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 6b7e1df9cd..8481e3b6bb 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -480,20 +480,11 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
{
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline void
-idpf_tx_backlog_entry(struct idpf_tx_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
static __rte_always_inline int
idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
{
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -623,7 +614,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -640,13 +631,13 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- idpf_tx_backlog_entry(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -661,10 +652,10 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = &txq->sw_ring[tx_id];
+ txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
}
- idpf_tx_backlog_entry(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index e0a0f1a8a7..4c65386f42 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -1001,7 +1001,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
static __rte_always_inline int
idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1114,16 +1114,6 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
return txq->tx_rs_thresh;
}
-static __rte_always_inline void
-tx_backlog_entry_avx512(struct idpf_tx_vec_entry *txep,
- struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
-{
- int i;
-
- for (i = 0; i < (int)nb_pkts; ++i)
- txep[i].mbuf = tx_pkts[i];
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1198,7 +1188,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
{
struct idpf_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
uint64_t flags = IDPF_TX_DESC_CMD_EOP;
uint64_t rs = IDPF_TX_DESC_CMD_RS | flags;
@@ -1223,7 +1213,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_singleq_vtx(txdp, tx_pkts, n - 1, flags);
tx_pkts += (n - 1);
@@ -1242,7 +1232,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_singleq_vtx(txdp, tx_pkts, nb_commit, flags);
@@ -1327,7 +1317,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
static __rte_always_inline int
idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
{
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint32_t n;
uint32_t i;
int nb_free = 0;
@@ -1502,7 +1492,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
{
struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
- struct idpf_tx_vec_entry *txep;
+ struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
/* bit2 is reserved and must be set to 1 according to Spec */
uint64_t cmd_dtype = IDPF_TXD_FLEX_FLOW_CMD_EOP;
@@ -1525,7 +1515,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
n = (uint16_t)(txq->nb_tx_desc - tx_id);
if (nb_commit >= n) {
- tx_backlog_entry_avx512(txep, tx_pkts, n);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, n);
idpf_splitq_vtx(txdp, tx_pkts, n - 1, cmd_dtype);
tx_pkts += (n - 1);
@@ -1544,7 +1534,7 @@ idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkt
txep += tx_id;
}
- tx_backlog_entry_avx512(txep, tx_pkts, nb_commit);
+ ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
idpf_splitq_vtx(txdp, tx_pkts, nb_commit, cmd_dtype);
@@ -1601,7 +1591,7 @@ idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
- struct idpf_tx_vec_entry *swr = (void *)txq->sw_ring;
+ struct ci_tx_entry_vec *swr = (void *)txq->sw_ring;
if (txq->sw_ring == NULL || txq->nb_tx_free == max_desc)
return;
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 7718167096..62685d3b7e 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -13,6 +13,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/tx.h"
#define IDPF_TX_SINGLE_Q "tx_single"
#define IDPF_RX_SINGLE_Q "rx_single"
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 95b112c95c..d67526c0fa 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -462,7 +462,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq->mz = mz;
txq->sw_ring = rte_zmalloc_socket("idpf tx sw ring",
- sizeof(struct idpf_tx_entry) * len,
+ sizeof(struct ci_tx_entry) * len,
RTE_CACHE_LINE_SIZE, socket_id);
if (txq->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate memory for SW TX ring");
diff --git a/drivers/net/intel/idpf/idpf_rxtx.h b/drivers/net/intel/idpf/idpf_rxtx.h
index 41a7495083..b456b8705d 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "idpf_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define IDPF_ALIGN_RING_DESC 32
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index 608cab30f3..bb9cbf5c02 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -10,6 +10,7 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
+#include "../common/rx.h"
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v8 3/4] net/intel: use common Tx queue structure
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 2/4] net/intel: use common Tx entry structure Shaiq Wani
@ 2025-04-28 9:21 ` Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-05-01 13:57 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Bruce Richardson
4 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-28 9:21 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Merge in additional fields used by the idpf driver and then convert it
over to using the common Tx queue structure
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/common/tx.h | 18 ++++++
drivers/net/intel/cpfl/cpfl_ethdev.c | 3 +-
drivers/net/intel/cpfl/cpfl_ethdev.h | 2 +-
drivers/net/intel/cpfl/cpfl_rxtx.c | 24 ++++----
drivers/net/intel/cpfl/cpfl_rxtx.h | 3 +-
drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h | 2 +-
drivers/net/intel/idpf/idpf_common_rxtx.c | 20 +++----
drivers/net/intel/idpf/idpf_common_rxtx.h | 57 +++----------------
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 10 ++--
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 20 +++----
drivers/net/intel/idpf/idpf_common_virtchnl.c | 2 +-
drivers/net/intel/idpf/idpf_common_virtchnl.h | 2 +-
drivers/net/intel/idpf/idpf_ethdev.c | 2 +-
drivers/net/intel/idpf/idpf_rxtx.c | 21 ++++---
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 4 +-
15 files changed, 83 insertions(+), 107 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index 8a19820855..c99bd5420f 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -35,6 +35,7 @@ struct ci_tx_queue {
volatile struct i40e_tx_desc *i40e_tx_ring;
volatile struct iavf_tx_desc *iavf_tx_ring;
volatile struct ice_tx_desc *ice_tx_ring;
+ volatile struct idpf_base_tx_desc *idpf_tx_ring;
volatile union ixgbe_adv_tx_desc *ixgbe_tx_ring;
};
volatile uint8_t *qtx_tail; /* register address of tail */
@@ -100,6 +101,23 @@ struct ci_tx_queue {
uint8_t is_vf; /**< indicates that this is a VF queue */
uint8_t vf_ctx_initialized; /**< VF context descriptors initialized */
};
+ struct { /* idpf specific values */
+ volatile union {
+ struct idpf_flex_tx_sched_desc *desc_ring;
+ struct idpf_splitq_tx_compl_desc *compl_ring;
+ };
+ const struct idpf_txq_ops *idpf_ops;
+ struct ci_tx_queue *complq;
+ void **txqs; /*only valid for split queue mode*/
+ bool q_started; /* if tx queue has been started */
+ /* only valid for split queue mode */
+ uint32_t tx_start_qid;
+ uint16_t sw_nb_desc;
+ uint16_t sw_tail;
+#define IDPF_TX_CTYPE_NUM 8
+ uint16_t ctype[IDPF_TX_CTYPE_NUM];
+ uint8_t expected_gen_id;
+ };
};
};
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.c b/drivers/net/intel/cpfl/cpfl_ethdev.c
index 1817221652..c94010bc51 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.c
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.c
@@ -18,6 +18,7 @@
#include "cpfl_rxtx.h"
#include "cpfl_flow.h"
#include "cpfl_rules.h"
+#include "../common/tx.h"
#define CPFL_REPRESENTOR "representor"
#define CPFL_TX_SINGLE_Q "tx_single"
@@ -1167,7 +1168,7 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
{
struct cpfl_vport *cpfl_vport =
(struct cpfl_vport *)dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct idpf_rx_queue *rxq;
struct cpfl_tx_queue *cpfl_txq;
struct cpfl_rx_queue *cpfl_rxq;
diff --git a/drivers/net/intel/cpfl/cpfl_ethdev.h b/drivers/net/intel/cpfl/cpfl_ethdev.h
index 9a38a69194..d4e1176ab1 100644
--- a/drivers/net/intel/cpfl/cpfl_ethdev.h
+++ b/drivers/net/intel/cpfl/cpfl_ethdev.h
@@ -174,7 +174,7 @@ struct cpfl_vport {
uint16_t nb_p2p_txq;
struct idpf_rx_queue *p2p_rx_bufq;
- struct idpf_tx_queue *p2p_tx_complq;
+ struct ci_tx_queue *p2p_tx_complq;
bool p2p_manual_bind;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.c b/drivers/net/intel/cpfl/cpfl_rxtx.c
index 6b7e7c5087..20a9042f3a 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.c
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.c
@@ -11,7 +11,7 @@
#include "cpfl_rxtx_vec_common.h"
static inline void
-cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
+cpfl_tx_hairpin_descq_reset(struct ci_tx_queue *txq)
{
uint32_t i, size;
@@ -26,7 +26,7 @@ cpfl_tx_hairpin_descq_reset(struct idpf_tx_queue *txq)
}
static inline void
-cpfl_tx_hairpin_complq_reset(struct idpf_tx_queue *cq)
+cpfl_tx_hairpin_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -320,7 +320,7 @@ static void
cpfl_tx_queue_release(void *txq)
{
struct cpfl_tx_queue *cpfl_txq = txq;
- struct idpf_tx_queue *q = NULL;
+ struct ci_tx_queue *q = NULL;
if (cpfl_txq == NULL)
return;
@@ -468,18 +468,18 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+cpfl_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("cpfl splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -528,7 +528,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_tx_queue *cpfl_txq;
struct idpf_hw *hw = &base->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -789,7 +789,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
struct cpfl_txq_hairpin_info *hairpin_info;
struct idpf_hw *hw = &adapter_base->hw;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq, *cq;
+ struct ci_tx_queue *txq, *cq;
const struct rte_memzone *mz;
uint32_t ring_size;
uint16_t peer_port, peer_q;
@@ -872,7 +872,7 @@ cpfl_tx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
if (cpfl_vport->p2p_tx_complq == NULL) {
cq = rte_zmalloc_socket("cpfl hairpin cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
dev->device->numa_node);
if (!cq) {
@@ -974,7 +974,7 @@ cpfl_hairpin_rxq_config(struct idpf_vport *vport, struct cpfl_rx_queue *cpfl_rxq
int
cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
{
- struct idpf_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
+ struct ci_tx_queue *tx_complq = cpfl_vport->p2p_tx_complq;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -993,7 +993,7 @@ cpfl_hairpin_tx_complq_config(struct cpfl_vport *cpfl_vport)
int
cpfl_hairpin_txq_config(struct idpf_vport *vport, struct cpfl_tx_queue *cpfl_txq)
{
- struct idpf_tx_queue *txq = &cpfl_txq->base;
+ struct ci_tx_queue *txq = &cpfl_txq->base;
struct virtchnl2_txq_info txq_info;
memset(&txq_info, 0, sizeof(txq_info));
@@ -1321,7 +1321,7 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
struct cpfl_vport *cpfl_vport = dev->data->dev_private;
struct idpf_vport *vport = &cpfl_vport->base;
struct cpfl_tx_queue *cpfl_txq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx.h b/drivers/net/intel/cpfl/cpfl_rxtx.h
index aacd087b56..52cdecac88 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx.h
@@ -7,6 +7,7 @@
#include <idpf_common_rxtx.h>
#include "cpfl_ethdev.h"
+#include "../common/tx.h"
/* In QLEN must be whole number of 32 descriptors. */
#define CPFL_ALIGN_RING_DESC 32
@@ -70,7 +71,7 @@ struct cpfl_txq_hairpin_info {
};
struct cpfl_tx_queue {
- struct idpf_tx_queue base;
+ struct ci_tx_queue base;
struct cpfl_txq_hairpin_info hairpin_info;
};
diff --git a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
index caf02295a3..f1e555b5f8 100644
--- a/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
+++ b/drivers/net/intel/cpfl/cpfl_rxtx_vec_common.h
@@ -49,7 +49,7 @@ cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq)
+cpfl_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return CPFL_SCALAR_PATH;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.c b/drivers/net/intel/idpf/idpf_common_rxtx.c
index a008431bcf..a734637a39 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.c
@@ -95,7 +95,7 @@ idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_txq_mbufs_release)
void
-idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq)
+idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq)
{
uint16_t nb_desc, i;
@@ -218,7 +218,7 @@ idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_descq_reset)
void
-idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
+idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -257,7 +257,7 @@ idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_split_tx_complq_reset)
void
-idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
+idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq)
{
uint32_t i, size;
@@ -276,7 +276,7 @@ idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq)
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_single_tx_queue_reset)
void
-idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq)
+idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txe;
uint32_t i, size;
@@ -347,7 +347,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_tx_queue_release)
void
idpf_qc_tx_queue_release(void *txq)
{
- struct idpf_tx_queue *q = txq;
+ struct ci_tx_queue *q = txq;
if (q == NULL)
return;
@@ -768,13 +768,13 @@ idpf_dp_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline void
-idpf_split_tx_free(struct idpf_tx_queue *cq)
+idpf_split_tx_free(struct ci_tx_queue *cq)
{
volatile struct idpf_splitq_tx_compl_desc *compl_ring = cq->compl_ring;
volatile struct idpf_splitq_tx_compl_desc *txd;
uint16_t next = cq->tx_tail;
struct ci_tx_entry *txe;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t gen, qid, q_head;
uint16_t nb_desc_clean;
uint8_t ctype;
@@ -879,7 +879,7 @@ uint16_t
idpf_dp_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txr;
volatile struct idpf_flex_tx_sched_desc *txd;
struct ci_tx_entry *sw_ring;
@@ -1323,7 +1323,7 @@ idpf_dp_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static inline int
-idpf_xmit_cleanup(struct idpf_tx_queue *txq)
+idpf_xmit_cleanup(struct ci_tx_queue *txq)
{
uint16_t last_desc_cleaned = txq->last_desc_cleaned;
struct ci_tx_entry *sw_ring = txq->sw_ring;
@@ -1373,7 +1373,7 @@ idpf_dp_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
union idpf_tx_offload tx_offload = {0};
struct ci_tx_entry *txe, *txn;
struct ci_tx_entry *sw_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
struct rte_mbuf *tx_pkt;
struct rte_mbuf *m_seg;
uint64_t buf_dma_addr;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx.h b/drivers/net/intel/idpf/idpf_common_rxtx.h
index 30f9e9398d..fc68dddc90 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx.h
+++ b/drivers/net/intel/idpf/idpf_common_rxtx.h
@@ -149,49 +149,6 @@ struct idpf_rx_queue {
uint32_t hw_register_set;
};
-/* Structure associated with each TX queue. */
-struct idpf_tx_queue {
- const struct rte_memzone *mz; /* memzone for Tx ring */
- volatile struct idpf_base_tx_desc *idpf_tx_ring; /* Tx ring virtual address */
- volatile union {
- struct idpf_flex_tx_sched_desc *desc_ring;
- struct idpf_splitq_tx_compl_desc *compl_ring;
- };
- rte_iova_t tx_ring_dma; /* Tx ring DMA address */
- struct ci_tx_entry *sw_ring; /* address array of SW ring */
-
- uint16_t nb_tx_desc; /* ring length */
- uint16_t tx_tail; /* current value of tail */
- volatile uint8_t *qtx_tail; /* register address of tail */
- /* number of used desc since RS bit set */
- uint16_t nb_tx_used;
- uint16_t nb_tx_free;
- uint16_t last_desc_cleaned; /* last desc have been cleaned*/
- uint16_t tx_free_thresh;
-
- uint16_t tx_rs_thresh;
-
- uint16_t port_id;
- uint16_t queue_id;
- uint64_t offloads;
- uint16_t tx_next_dd; /* next to set RS, for VPMD */
- uint16_t tx_next_rs; /* next to check DD, for VPMD */
-
- bool q_set; /* if tx queue has been configured */
- bool q_started; /* if tx queue has been started */
- bool tx_deferred_start; /* don't start this queue in dev start */
- const struct idpf_txq_ops *idpf_ops;
-
- /* only valid for split queue mode */
- uint16_t sw_nb_desc;
- uint16_t sw_tail;
- void **txqs;
- uint32_t tx_start_qid;
- uint8_t expected_gen_id;
- struct idpf_tx_queue *complq;
- uint16_t ctype[IDPF_TX_CTYPE_NUM];
-};
-
/* Offload features */
union idpf_tx_offload {
uint64_t data;
@@ -215,7 +172,7 @@ struct idpf_rxq_ops {
};
struct idpf_txq_ops {
- void (*release_mbufs)(struct idpf_tx_queue *txq);
+ void (*release_mbufs)(struct ci_tx_queue *txq);
};
extern int idpf_timestamp_dynfield_offset;
@@ -229,7 +186,7 @@ int idpf_qc_tx_thresh_check(uint16_t nb_desc, uint16_t tx_rs_thresh,
__rte_internal
void idpf_qc_rxq_mbufs_release(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_txq_mbufs_release(struct idpf_tx_queue *txq);
+void idpf_qc_txq_mbufs_release(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_split_rx_descq_reset(struct idpf_rx_queue *rxq);
__rte_internal
@@ -239,11 +196,11 @@ void idpf_qc_split_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
void idpf_qc_single_rx_queue_reset(struct idpf_rx_queue *rxq);
__rte_internal
-void idpf_qc_split_tx_descq_reset(struct idpf_tx_queue *txq);
+void idpf_qc_split_tx_descq_reset(struct ci_tx_queue *txq);
__rte_internal
-void idpf_qc_split_tx_complq_reset(struct idpf_tx_queue *cq);
+void idpf_qc_split_tx_complq_reset(struct ci_tx_queue *cq);
__rte_internal
-void idpf_qc_single_tx_queue_reset(struct idpf_tx_queue *txq);
+void idpf_qc_single_tx_queue_reset(struct ci_tx_queue *txq);
__rte_internal
void idpf_qc_rx_queue_release(void *rxq);
__rte_internal
@@ -274,9 +231,9 @@ int idpf_qc_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
int idpf_qc_splitq_rx_vec_setup(struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
-int idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq);
+int idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq);
__rte_internal
uint16_t idpf_dp_singleq_recv_pkts_avx512(void *rx_queue,
struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 8481e3b6bb..40a0473116 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -482,7 +482,7 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
}
static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct idpf_tx_queue *txq)
+idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txep;
uint32_t n;
@@ -612,7 +612,7 @@ static inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -631,7 +631,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
tx_id = txq->tx_tail;
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
@@ -652,7 +652,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
/* avoid reach the end of ring */
txdp = &txq->idpf_tx_ring[tx_id];
- txep = (struct ci_tx_entry_vec *)&txq->sw_ring[tx_id];
+ txep = &txq->sw_ring_vec[tx_id];
}
ci_tx_backlog_entry_vec(txep, tx_pkts, nb_commit);
@@ -681,7 +681,7 @@ idpf_dp_singleq_xmit_pkts_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
while (nb_pkts) {
uint16_t ret, num;
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index 4c65386f42..d78b8ad86b 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -999,7 +999,7 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
}
static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1186,7 +1186,7 @@ static __rte_always_inline uint16_t
idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
volatile struct idpf_base_tx_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1257,7 +1257,7 @@ idpf_singleq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
uint16_t nb_tx = 0;
- struct idpf_tx_queue *txq = tx_queue;
+ struct ci_tx_queue *txq = tx_queue;
while (nb_pkts) {
uint16_t ret, num;
@@ -1283,10 +1283,10 @@ idpf_dp_singleq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static __rte_always_inline void
-idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
+idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
{
struct idpf_splitq_tx_compl_desc *compl_ring;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint16_t genid, txq_qid, cq_qid, i;
uint8_t ctype;
@@ -1315,7 +1315,7 @@ idpf_splitq_scan_cq_ring(struct idpf_tx_queue *cq)
}
static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
uint32_t n;
@@ -1490,7 +1490,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
volatile struct idpf_flex_tx_sched_desc *txdp;
struct ci_tx_entry_vec *txep;
uint16_t n, nb_commit, tx_id;
@@ -1554,7 +1554,7 @@ static __rte_always_inline uint16_t
idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
- struct idpf_tx_queue *txq = (struct idpf_tx_queue *)tx_queue;
+ struct ci_tx_queue *txq = (struct ci_tx_queue *)tx_queue;
uint16_t nb_tx = 0;
while (nb_pkts) {
@@ -1587,7 +1587,7 @@ idpf_dp_splitq_xmit_pkts_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
}
static inline void
-idpf_tx_release_mbufs_avx512(struct idpf_tx_queue *txq)
+idpf_tx_release_mbufs_avx512(struct ci_tx_queue *txq)
{
unsigned int i;
const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
@@ -1616,7 +1616,7 @@ static const struct idpf_txq_ops avx512_tx_vec_ops = {
RTE_EXPORT_INTERNAL_SYMBOL(idpf_qc_tx_vec_avx512_setup)
int __rte_cold
-idpf_qc_tx_vec_avx512_setup(struct idpf_tx_queue *txq)
+idpf_qc_tx_vec_avx512_setup(struct ci_tx_queue *txq)
{
if (!txq)
return 0;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.c b/drivers/net/intel/idpf/idpf_common_virtchnl.c
index 1fd6bae02b..bab854e191 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.c
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.c
@@ -1102,7 +1102,7 @@ int idpf_vc_rxq_config_by_info(struct idpf_vport *vport, struct virtchnl2_rxq_in
RTE_EXPORT_INTERNAL_SYMBOL(idpf_vc_txq_config)
int
-idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq)
+idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq)
{
struct idpf_adapter *adapter = vport->adapter;
struct virtchnl2_config_tx_queues *vc_txqs = NULL;
diff --git a/drivers/net/intel/idpf/idpf_common_virtchnl.h b/drivers/net/intel/idpf/idpf_common_virtchnl.h
index d6555978d5..68cba9111c 100644
--- a/drivers/net/intel/idpf/idpf_common_virtchnl.h
+++ b/drivers/net/intel/idpf/idpf_common_virtchnl.h
@@ -50,7 +50,7 @@ int idpf_vc_one_msg_read(struct idpf_adapter *adapter, uint32_t ops,
__rte_internal
int idpf_vc_rxq_config(struct idpf_vport *vport, struct idpf_rx_queue *rxq);
__rte_internal
-int idpf_vc_txq_config(struct idpf_vport *vport, struct idpf_tx_queue *txq);
+int idpf_vc_txq_config(struct idpf_vport *vport, struct ci_tx_queue *txq);
__rte_internal
int idpf_vc_stats_query(struct idpf_vport *vport,
struct virtchnl2_vport_stats **pstats);
diff --git a/drivers/net/intel/idpf/idpf_ethdev.c b/drivers/net/intel/idpf/idpf_ethdev.c
index 62685d3b7e..90720909bf 100644
--- a/drivers/net/intel/idpf/idpf_ethdev.c
+++ b/drivers/net/intel/idpf/idpf_ethdev.c
@@ -710,7 +710,7 @@ static int
idpf_start_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err = 0;
int i;
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index d67526c0fa..bf190b02ee 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -346,17 +346,17 @@ idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
}
static int
-idpf_tx_complq_setup(struct rte_eth_dev *dev, struct idpf_tx_queue *txq,
+idpf_tx_complq_setup(struct rte_eth_dev *dev, struct ci_tx_queue *txq,
uint16_t queue_idx, uint16_t nb_desc,
unsigned int socket_id)
{
struct idpf_vport *vport = dev->data->dev_private;
const struct rte_memzone *mz;
- struct idpf_tx_queue *cq;
+ struct ci_tx_queue *cq;
int ret;
cq = rte_zmalloc_socket("idpf splitq cq",
- sizeof(struct idpf_tx_queue),
+ sizeof(*cq),
RTE_CACHE_LINE_SIZE,
socket_id);
if (cq == NULL) {
@@ -403,7 +403,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t tx_rs_thresh, tx_free_thresh;
struct idpf_hw *hw = &adapter->hw;
const struct rte_memzone *mz;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
uint64_t offloads;
uint16_t len;
bool is_splitq;
@@ -426,7 +426,7 @@ idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
/* Allocate the TX queue data structure. */
txq = rte_zmalloc_socket("idpf txq",
- sizeof(struct idpf_tx_queue),
+ sizeof(struct ci_tx_queue),
RTE_CACHE_LINE_SIZE,
socket_id);
if (txq == NULL) {
@@ -612,7 +612,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
int
idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
if (tx_queue_id >= dev->data->nb_tx_queues)
return -EINVAL;
@@ -629,8 +629,7 @@ int
idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq =
- dev->data->tx_queues[tx_queue_id];
+ struct ci_tx_queue *txq = dev->data->tx_queues[tx_queue_id];
int err = 0;
err = idpf_vc_txq_config(vport, txq);
@@ -698,7 +697,7 @@ int
idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct idpf_vport *vport = dev->data->dev_private;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int err;
if (tx_queue_id >= dev->data->nb_tx_queues)
@@ -742,7 +741,7 @@ void
idpf_stop_queues(struct rte_eth_dev *dev)
{
struct idpf_rx_queue *rxq;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -880,7 +879,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int i;
#endif /* CC_AVX512_SUPPORT */
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index bb9cbf5c02..e444addf85 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -50,7 +50,7 @@ idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
}
static inline int
-idpf_tx_vec_queue_default(struct idpf_tx_queue *txq)
+idpf_tx_vec_queue_default(struct ci_tx_queue *txq)
{
if (txq == NULL)
return IDPF_SCALAR_PATH;
@@ -104,7 +104,7 @@ static inline int
idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
- struct idpf_tx_queue *txq;
+ struct ci_tx_queue *txq;
int ret = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* [PATCH v8 4/4] net/idpf: use common Tx free fn in idpf
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (2 preceding siblings ...)
2025-04-28 9:21 ` [PATCH v8 3/4] net/intel: use common Tx queue structure Shaiq Wani
@ 2025-04-28 9:21 ` Shaiq Wani
2025-05-01 13:57 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Bruce Richardson
4 siblings, 0 replies; 52+ messages in thread
From: Shaiq Wani @ 2025-04-28 9:21 UTC (permalink / raw)
To: dev, bruce.richardson, aman.deep.singh
Switch the idpf driver to use the common Tx free function for
AVX2 and AVX512
Signed-off-by: Shaiq Wani <shaiq.wani@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
.../net/intel/idpf/idpf_common_rxtx_avx2.c | 61 +----
.../net/intel/idpf/idpf_common_rxtx_avx512.c | 230 +-----------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 12 +
3 files changed, 20 insertions(+), 283 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
index 40a0473116..1babc5114b 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx2.c
@@ -7,6 +7,7 @@
#include "idpf_common_rxtx.h"
#include "idpf_common_device.h"
+#include "idpf_rxtx_vec_common.h"
static __rte_always_inline void
idpf_singleq_rx_rearm(struct idpf_rx_queue *rxq)
@@ -481,64 +482,6 @@ idpf_dp_singleq_recv_pkts_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16
return _idpf_singleq_recv_raw_pkts_vec_avx2(rx_queue, rx_pkts, nb_pkts);
}
-static __rte_always_inline int
-idpf_singleq_tx_free_bufs_vec(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -623,7 +566,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_singleq_tx_free_bufs_vec(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
if (unlikely(nb_pkts == 0))
diff --git a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
index d78b8ad86b..15b4c8a68e 100644
--- a/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/net/intel/idpf/idpf_common_rxtx_avx512.c
@@ -6,6 +6,7 @@
#include <rte_vect.h>
#include "idpf_common_device.h"
#include "idpf_common_rxtx.h"
+#include "idpf_rxtx_vec_common.h"
#define IDPF_DESCS_PER_LOOP_AVX 8
#define PKTLEN_SHIFT 10
@@ -998,122 +999,6 @@ idpf_dp_splitq_recv_pkts_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,
nb_pkts);
}
-static __rte_always_inline int
-idpf_tx_singleq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- /* check DD bits on threshold descriptor */
- if ((txq->idpf_tx_ring[txq->tx_next_dd].qw1 &
- rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (cache == NULL || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
-#ifdef RTE_ARCH_64
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
-#else
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 16]);
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 16], b);
-#endif
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m != NULL)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m != NULL)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m != NULL)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static __rte_always_inline void
idpf_singleq_vtx1(volatile struct idpf_base_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -1197,7 +1082,7 @@ idpf_singleq_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pk
nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
if (txq->nb_tx_free < txq->tx_free_thresh)
- idpf_tx_singleq_free_bufs_avx512(txq);
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
nb_commit = nb_pkts;
@@ -1314,110 +1199,6 @@ idpf_splitq_scan_cq_ring(struct ci_tx_queue *cq)
cq->tx_tail = cq_qid;
}
-static __rte_always_inline int
-idpf_tx_splitq_free_bufs_avx512(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry_vec *txep;
- uint32_t n;
- uint32_t i;
- int nb_free = 0;
- struct rte_mbuf *m;
- struct rte_mbuf **free = alloca(sizeof(struct rte_mbuf *) * txq->tx_rs_thresh);
-
- n = txq->tx_rs_thresh;
-
- /* first buffer to free from S/W ring is at index
- * tx_next_dd - (tx_rs_thresh-1)
- */
- txep = (void *)txq->sw_ring;
- txep += txq->tx_next_dd - (n - 1);
-
- if (txq->offloads & IDPF_TX_OFFLOAD_MBUF_FAST_FREE && (n & 31) == 0) {
- struct rte_mempool *mp = txep[0].mbuf->pool;
- struct rte_mempool_cache *cache = rte_mempool_default_cache(mp,
- rte_lcore_id());
- void **cache_objs;
-
- if (!cache || cache->len == 0)
- goto normal;
-
- cache_objs = &cache->objs[cache->len];
-
- if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
- rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
- goto done;
- }
-
- /* The cache follows the following algorithm
- * 1. Add the objects to the cache
- * 2. Anything greater than the cache min value (if it crosses the
- * cache flush threshold) is flushed to the ring.
- */
- /* Add elements back into the cache */
- uint32_t copied = 0;
- /* n is multiple of 32 */
- while (copied < n) {
- const __m512i a = _mm512_loadu_si512(&txep[copied]);
- const __m512i b = _mm512_loadu_si512(&txep[copied + 8]);
- const __m512i c = _mm512_loadu_si512(&txep[copied + 16]);
- const __m512i d = _mm512_loadu_si512(&txep[copied + 24]);
-
- _mm512_storeu_si512(&cache_objs[copied], a);
- _mm512_storeu_si512(&cache_objs[copied + 8], b);
- _mm512_storeu_si512(&cache_objs[copied + 16], c);
- _mm512_storeu_si512(&cache_objs[copied + 24], d);
- copied += 32;
- }
- cache->len += n;
-
- if (cache->len >= cache->flushthresh) {
- rte_mempool_ops_enqueue_bulk(mp,
- &cache->objs[cache->size],
- cache->len - cache->size);
- cache->len = cache->size;
- }
- goto done;
- }
-
-normal:
- m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
- if (likely(m)) {
- free[0] = m;
- nb_free = 1;
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (likely(m)) {
- if (likely(m->pool == free[0]->pool)) {
- free[nb_free++] = m;
- } else {
- rte_mempool_put_bulk(free[0]->pool,
- (void *)free,
- nb_free);
- free[0] = m;
- nb_free = 1;
- }
- }
- }
- rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
- } else {
- for (i = 1; i < n; i++) {
- m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
- if (m)
- rte_mempool_put(m->pool, m);
- }
- }
-
-done:
- /* buffers were freed, update counters */
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
- txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
-
- return txq->tx_rs_thresh;
-}
-
#define IDPF_TXD_FLEX_QW1_TX_BUF_SZ_S 48
static __rte_always_inline void
@@ -1559,11 +1340,12 @@ idpf_splitq_xmit_pkts_vec_avx512_cmn(void *tx_queue, struct rte_mbuf **tx_pkts,
while (nb_pkts) {
uint16_t ret, num;
-
idpf_splitq_scan_cq_ring(txq->complq);
- if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh)
- idpf_tx_splitq_free_bufs_avx512(txq);
+ if (txq->ctype[IDPF_TXD_COMPLT_RS] > txq->tx_free_thresh) {
+ ci_tx_free_bufs_vec(txq, idpf_tx_desc_done, false);
+ txq->ctype[IDPF_TXD_COMPLT_RS] -= txq->tx_rs_thresh;
+ }
num = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);
ret = idpf_splitq_xmit_fixed_burst_vec_avx512(tx_queue,
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index e444addf85..ff3ae56baf 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -28,6 +28,18 @@
RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
+static inline int
+idpf_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+/* Check if the queue is using the splitq model */
+ if (txq->complq != NULL)
+ return 1;
+
+ return (txq->idpf_tx_ring[idx].qw1 &
+ rte_cpu_to_le_64(IDPF_TXD_QW1_DTYPE_M)) ==
+ rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
+}
+
static inline int
idpf_rx_vec_queue_default(struct idpf_rx_queue *rxq)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 52+ messages in thread* Re: [PATCH v8 0/4] net/intel: using common functions in idpf driver
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
` (3 preceding siblings ...)
2025-04-28 9:21 ` [PATCH v8 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
@ 2025-05-01 13:57 ` Bruce Richardson
4 siblings, 0 replies; 52+ messages in thread
From: Bruce Richardson @ 2025-05-01 13:57 UTC (permalink / raw)
To: Shaiq Wani; +Cc: dev, aman.deep.singh
On Mon, Apr 28, 2025 at 02:51:31PM +0530, Shaiq Wani wrote:
> reworked the drivers to use the common functions
> and structures from drivers/net/intel/common.
>
> v8: fixed idpf_desc_done fn.
> v7: rebased on top of latest main branch for a clean apply.
>
> Shaiq Wani (4):
> net/intel: align Tx queue struct field names
> net/intel: use common Tx entry structure
> net/intel: use common Tx queue structure
> net/idpf: use common Tx free fn in idpf
>
Patchset applied to dpdk-next-net-intel.
Thanks,
/Bruce
^ permalink raw reply [flat|nested] 52+ messages in thread
end of thread, other threads:[~2025-05-01 13:58 UTC | newest]
Thread overview: 52+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-12 15:53 [PATCH] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-12 16:38 ` Bruce Richardson
2025-03-24 12:39 ` [PATCH v2 0/4] Use common structures and fns in IDPF and Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 1/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 0/4] using common functions in idpf driver Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 1/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 10:44 ` [PATCH v4 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-03-27 16:04 ` [PATCH v5 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-28 16:57 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 2/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-28 17:22 ` Bruce Richardson
2025-03-28 17:55 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-28 17:17 ` Bruce Richardson
2025-03-27 16:04 ` [PATCH v5 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-03-28 17:25 ` Bruce Richardson
2025-03-28 15:29 ` [PATCH v5 0/4] net/intel: using common functions in idpf driver Bruce Richardson
2025-03-28 15:36 ` David Marchand
2025-03-28 17:58 ` Bruce Richardson
2025-03-27 10:45 ` [PATCH v4 2/4] net/intel: use common Tx queue structure Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-27 10:45 ` [PATCH v4 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 2/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-24 13:16 ` Bruce Richardson
2025-03-24 12:49 ` [PATCH v3 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-24 12:49 ` [PATCH v3 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-03-24 12:39 ` [PATCH v2 2/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-03-24 12:40 ` [PATCH v2 3/4] net/intel: use common Tx entry structure Shaiq Wani
2025-03-24 12:40 ` [PATCH v2 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-03 11:24 ` [PATCH v6 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-08 16:21 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 2/4] net/intel: use common Tx entry structure Shaiq Wani
2025-04-08 16:22 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 3/4] net/intel: use common Tx queue structure Shaiq Wani
2025-04-08 16:49 ` Bruce Richardson
2025-04-03 11:24 ` [PATCH v6 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-04-08 16:50 ` Bruce Richardson
2025-04-08 16:52 ` [PATCH v6 0/4] net/intel: using common functions in idpf driver Bruce Richardson
2025-04-10 5:24 ` [PATCH v7 " Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 2/4] net/intel: use common Tx entry structure Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 3/4] net/intel: use common Tx queue structure Shaiq Wani
2025-04-10 5:24 ` [PATCH v7 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 1/4] net/intel: align Tx queue struct field names Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 2/4] net/intel: use common Tx entry structure Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 3/4] net/intel: use common Tx queue structure Shaiq Wani
2025-04-28 9:21 ` [PATCH v8 4/4] net/idpf: use common Tx free fn in idpf Shaiq Wani
2025-05-01 13:57 ` [PATCH v8 0/4] net/intel: using common functions in idpf driver Bruce Richardson
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