Re: [PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits

[Zhao Liu <zhao1.liu@intel.com>]

Hi Paolo,

On Mon, Mar 25, 2024 at 03:14:22PM +0100, Paolo Bonzini wrote:
> Date: Mon, 25 Mar 2024 15:14:22 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits
> X-Mailer: git-send-email 2.44.0

[snip]

>  static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
>  {
>      X86CPU *cpu = X86_CPU(cs);
>      CPUX86State *env = &cpu->env;
> +    bool ret;
>  
>      /*
>       * The realize order is important, since x86_cpu_realize() checks if
> @@ -50,7 +72,17 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
>                                                     MSR_IA32_UCODE_REV);
>          }
>      }
> -    return host_cpu_realizefn(cs, errp);
> +    ret = host_cpu_realizefn(cs, errp);
> +    if (!ret) {
> +        return ret;
> +    }
> +
> +    if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) &&
> +        cpu->guest_phys_bits == -1) {
> +        kvm_set_guest_phys_bits(cs);
> +    }
> +
> +    return true;
>  }
>

Just nit, it seems the comment about "realize order" in
kvm_cpu_realizefn() should also be updated to include this new
kvm_set_guest_phys_bits().

Or, I feel the guest_phys_bits could also be set in host_cpu_realizefn()
since it also indicates the host support.

Anyway, this won't affect this current series. LGTM,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>