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From: Sudeep Holla <sudeep.holla@arm.com>
To: Yunhui Cui <cuiyunhui@bytedance.com>
Cc: rafael@kernel.org, lenb@kernel.org, linux-acpi@vger.kernel.org,
	linux-kernel@vger.kernel.org, paul.walmsley@sifive.com,
	Sudeep Holla <sudeep.holla@arm.com>,
	palmer@dabbelt.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, bhelgaas@google.com,
	james.morse@arm.com, jhugo@codeaurora.org, jeremy.linton@arm.com,
	john.garry@huawei.com, Jonathan.Cameron@huawei.com,
	pierre.gondois@arm.com, tiantao6@huawei.com
Subject: Re: [PATCH v3 2/3] riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT
Date: Tue, 16 Apr 2024 10:39:57 +0100	[thread overview]
Message-ID: <Zh5HbV_M6wOdf9QN@bogus> (raw)
In-Reply-To: <20240416031438.7637-2-cuiyunhui@bytedance.com>

On Tue, Apr 16, 2024 at 11:14:37AM +0800, Yunhui Cui wrote:
> Before cacheinfo can be built correctly, we need to initialize level
> and type. Since RSIC-V currently does not have a register group that
> describes cache-related attributes like ARM64, we cannot obtain them
> directly, so now we obtain cache leaves from the ACPI PPTT table
> (acpi_get_cache_info()) and set the cache type through split_levels.
>
> Suggested-by: Jeremy Linton <jeremy.linton@arm.com>
> Suggested-by: Sudeep Holla <sudeep.holla@arm.com>

I had already given the reviewed-by for the series, anyways here we go again:

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: Sudeep Holla <sudeep.holla@arm.com>
To: Yunhui Cui <cuiyunhui@bytedance.com>
Cc: rafael@kernel.org, lenb@kernel.org, linux-acpi@vger.kernel.org,
	linux-kernel@vger.kernel.org, paul.walmsley@sifive.com,
	Sudeep Holla <sudeep.holla@arm.com>,
	palmer@dabbelt.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, bhelgaas@google.com,
	james.morse@arm.com, jhugo@codeaurora.org, jeremy.linton@arm.com,
	john.garry@huawei.com, Jonathan.Cameron@huawei.com,
	pierre.gondois@arm.com, tiantao6@huawei.com
Subject: Re: [PATCH v3 2/3] riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT
Date: Tue, 16 Apr 2024 10:39:57 +0100	[thread overview]
Message-ID: <Zh5HbV_M6wOdf9QN@bogus> (raw)
In-Reply-To: <20240416031438.7637-2-cuiyunhui@bytedance.com>

On Tue, Apr 16, 2024 at 11:14:37AM +0800, Yunhui Cui wrote:
> Before cacheinfo can be built correctly, we need to initialize level
> and type. Since RSIC-V currently does not have a register group that
> describes cache-related attributes like ARM64, we cannot obtain them
> directly, so now we obtain cache leaves from the ACPI PPTT table
> (acpi_get_cache_info()) and set the cache type through split_levels.
>
> Suggested-by: Jeremy Linton <jeremy.linton@arm.com>
> Suggested-by: Sudeep Holla <sudeep.holla@arm.com>

I had already given the reviewed-by for the series, anyways here we go again:

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2024-04-16  9:40 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-16  3:14 [PATCH v3 1/3] riscv: cacheinfo: remove the useless parameter (node) of ci_leaf_init() Yunhui Cui
2024-04-16  3:14 ` Yunhui Cui
2024-04-16  3:14 ` [PATCH v3 2/3] riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT Yunhui Cui
2024-04-16  3:14   ` Yunhui Cui
2024-04-16  9:39   ` Sudeep Holla [this message]
2024-04-16  9:39     ` Sudeep Holla
2024-04-16 20:03   ` Jeremy Linton
2024-04-16 20:03     ` Jeremy Linton
2024-04-17  3:15     ` [External] " yunhui cui
2024-04-17  3:15       ` yunhui cui
2024-04-17 14:00       ` Jeremy Linton
2024-04-17 14:00         ` Jeremy Linton
2024-04-18  2:52         ` yunhui cui
2024-04-18  2:52           ` yunhui cui
2024-04-16  3:14 ` [PATCH v3 3/3] RISC-V: Select ACPI PPTT drivers Yunhui Cui
2024-04-16  3:14   ` Yunhui Cui
2024-04-16 19:49 ` [PATCH v3 1/3] riscv: cacheinfo: remove the useless parameter (node) of ci_leaf_init() Jeremy Linton
2024-04-16 19:49   ` Jeremy Linton

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