* [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
@ 2024-04-08 21:40 ` Ilkka Koskinen
0 siblings, 0 replies; 6+ messages in thread
From: Ilkka Koskinen @ 2024-04-08 21:40 UTC (permalink / raw)
To: John Garry, Mike Leach, Leo Yan, Arnaldo Carvalho de Melo,
Namhyung Kim, Ian Rogers
Cc: Will Deacon, James Clark, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Adrian Hunter,
Ilkka Koskinen, linux-arm-kernel, linux-perf-users, linux-kernel
L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
AC04_CPU_1 for more details. Mark the event impacted by the errata.
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
index 7a2b7b200f14..ac75f12e27bf 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
@@ -9,7 +9,9 @@
"ArchStdEvent": "L1D_CACHE_REFILL_RD"
},
{
- "ArchStdEvent": "L1D_CACHE_INVAL"
+ "ArchStdEvent": "L1D_CACHE_INVAL",
+ "Errata": "Errata AC03_CPU_41",
+ "BriefDescription": "L1D cache invalidate. Impacted by errata -"
},
{
"ArchStdEvent": "L1D_TLB_REFILL_RD"
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
index c50d8e930b05..f4bfe7083a6b 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
@@ -9,7 +9,9 @@
"ArchStdEvent": "L1D_CACHE_REFILL_RD"
},
{
- "ArchStdEvent": "L1D_CACHE_INVAL"
+ "ArchStdEvent": "L1D_CACHE_INVAL",
+ "Errata": "Errata AC04_CPU_1",
+ "BriefDescription": "L1D cache invalidate. Impacted by errata -"
},
{
"ArchStdEvent": "L1D_TLB_REFILL_RD"
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
@ 2024-04-08 21:40 ` Ilkka Koskinen
0 siblings, 0 replies; 6+ messages in thread
From: Ilkka Koskinen @ 2024-04-08 21:40 UTC (permalink / raw)
To: John Garry, Mike Leach, Leo Yan, Arnaldo Carvalho de Melo,
Namhyung Kim, Ian Rogers
Cc: Will Deacon, James Clark, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Adrian Hunter,
Ilkka Koskinen, linux-arm-kernel, linux-perf-users, linux-kernel
L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
AC04_CPU_1 for more details. Mark the event impacted by the errata.
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
index 7a2b7b200f14..ac75f12e27bf 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
@@ -9,7 +9,9 @@
"ArchStdEvent": "L1D_CACHE_REFILL_RD"
},
{
- "ArchStdEvent": "L1D_CACHE_INVAL"
+ "ArchStdEvent": "L1D_CACHE_INVAL",
+ "Errata": "Errata AC03_CPU_41",
+ "BriefDescription": "L1D cache invalidate. Impacted by errata -"
},
{
"ArchStdEvent": "L1D_TLB_REFILL_RD"
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
index c50d8e930b05..f4bfe7083a6b 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
@@ -9,7 +9,9 @@
"ArchStdEvent": "L1D_CACHE_REFILL_RD"
},
{
- "ArchStdEvent": "L1D_CACHE_INVAL"
+ "ArchStdEvent": "L1D_CACHE_INVAL",
+ "Errata": "Errata AC04_CPU_1",
+ "BriefDescription": "L1D cache invalidate. Impacted by errata -"
},
{
"ArchStdEvent": "L1D_TLB_REFILL_RD"
--
2.43.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
2024-04-08 21:40 ` Ilkka Koskinen
@ 2024-04-09 13:33 ` James Clark
-1 siblings, 0 replies; 6+ messages in thread
From: James Clark @ 2024-04-09 13:33 UTC (permalink / raw)
To: Ilkka Koskinen
Cc: Will Deacon, Peter Zijlstra, Ingo Molnar, Mark Rutland,
Alexander Shishkin, Jiri Olsa, Adrian Hunter, linux-arm-kernel,
linux-perf-users, linux-kernel, John Garry, Mike Leach, Leo Yan,
Arnaldo Carvalho de Melo, Namhyung Kim, Ian Rogers
On 08/04/2024 22:40, Ilkka Koskinen wrote:
> L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
> AC04_CPU_1 for more details. Mark the event impacted by the errata.
>
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> ---
> tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
> tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> index 7a2b7b200f14..ac75f12e27bf 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> @@ -9,7 +9,9 @@
> "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> },
> {
> - "ArchStdEvent": "L1D_CACHE_INVAL"
> + "ArchStdEvent": "L1D_CACHE_INVAL",
> + "Errata": "Errata AC03_CPU_41",
> + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> },
> {
> "ArchStdEvent": "L1D_TLB_REFILL_RD"
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> index c50d8e930b05..f4bfe7083a6b 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> @@ -9,7 +9,9 @@
> "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> },
> {
> - "ArchStdEvent": "L1D_CACHE_INVAL"
> + "ArchStdEvent": "L1D_CACHE_INVAL",
> + "Errata": "Errata AC04_CPU_1",
> + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> },
> {
> "ArchStdEvent": "L1D_TLB_REFILL_RD"
Reviewed-by: James Clark <james.clark@arm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
@ 2024-04-09 13:33 ` James Clark
0 siblings, 0 replies; 6+ messages in thread
From: James Clark @ 2024-04-09 13:33 UTC (permalink / raw)
To: Ilkka Koskinen
Cc: Will Deacon, Peter Zijlstra, Ingo Molnar, Mark Rutland,
Alexander Shishkin, Jiri Olsa, Adrian Hunter, linux-arm-kernel,
linux-perf-users, linux-kernel, John Garry, Mike Leach, Leo Yan,
Arnaldo Carvalho de Melo, Namhyung Kim, Ian Rogers
On 08/04/2024 22:40, Ilkka Koskinen wrote:
> L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
> AC04_CPU_1 for more details. Mark the event impacted by the errata.
>
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> ---
> tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
> tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> index 7a2b7b200f14..ac75f12e27bf 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> @@ -9,7 +9,9 @@
> "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> },
> {
> - "ArchStdEvent": "L1D_CACHE_INVAL"
> + "ArchStdEvent": "L1D_CACHE_INVAL",
> + "Errata": "Errata AC03_CPU_41",
> + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> },
> {
> "ArchStdEvent": "L1D_TLB_REFILL_RD"
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> index c50d8e930b05..f4bfe7083a6b 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> @@ -9,7 +9,9 @@
> "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> },
> {
> - "ArchStdEvent": "L1D_CACHE_INVAL"
> + "ArchStdEvent": "L1D_CACHE_INVAL",
> + "Errata": "Errata AC04_CPU_1",
> + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> },
> {
> "ArchStdEvent": "L1D_TLB_REFILL_RD"
Reviewed-by: James Clark <james.clark@arm.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
2024-04-09 13:33 ` James Clark
@ 2024-04-17 15:51 ` Arnaldo Carvalho de Melo
-1 siblings, 0 replies; 6+ messages in thread
From: Arnaldo Carvalho de Melo @ 2024-04-17 15:51 UTC (permalink / raw)
To: James Clark
Cc: Ilkka Koskinen, Will Deacon, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Adrian Hunter,
linux-arm-kernel, linux-perf-users, linux-kernel, John Garry,
Mike Leach, Leo Yan, Namhyung Kim, Ian Rogers
On Tue, Apr 09, 2024 at 02:33:18PM +0100, James Clark wrote:
> On 08/04/2024 22:40, Ilkka Koskinen wrote:
> > L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
> > AC04_CPU_1 for more details. Mark the event impacted by the errata.
> >
> > Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> > ---
> > tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
> > tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
> > 2 files changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > index 7a2b7b200f14..ac75f12e27bf 100644
> > --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > @@ -9,7 +9,9 @@
> > "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> > },
> > {
> > - "ArchStdEvent": "L1D_CACHE_INVAL"
> > + "ArchStdEvent": "L1D_CACHE_INVAL",
> > + "Errata": "Errata AC03_CPU_41",
> > + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> > },
> > {
> > "ArchStdEvent": "L1D_TLB_REFILL_RD"
> > diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > index c50d8e930b05..f4bfe7083a6b 100644
> > --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > @@ -9,7 +9,9 @@
> > "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> > },
> > {
> > - "ArchStdEvent": "L1D_CACHE_INVAL"
> > + "ArchStdEvent": "L1D_CACHE_INVAL",
> > + "Errata": "Errata AC04_CPU_1",
> > + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> > },
> > {
> > "ArchStdEvent": "L1D_TLB_REFILL_RD"
> Reviewed-by: James Clark <james.clark@arm.com>
Thanks, applied to perf-tools-next,
- Arnaldo
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata
@ 2024-04-17 15:51 ` Arnaldo Carvalho de Melo
0 siblings, 0 replies; 6+ messages in thread
From: Arnaldo Carvalho de Melo @ 2024-04-17 15:51 UTC (permalink / raw)
To: James Clark
Cc: Ilkka Koskinen, Will Deacon, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Adrian Hunter,
linux-arm-kernel, linux-perf-users, linux-kernel, John Garry,
Mike Leach, Leo Yan, Namhyung Kim, Ian Rogers
On Tue, Apr 09, 2024 at 02:33:18PM +0100, James Clark wrote:
> On 08/04/2024 22:40, Ilkka Koskinen wrote:
> > L1D_CACHE_INVAL overcounts in certain situations. See AC03_CPU_41 and
> > AC04_CPU_1 for more details. Mark the event impacted by the errata.
> >
> > Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> > ---
> > tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 4 +++-
> > tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json | 4 +++-
> > 2 files changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > index 7a2b7b200f14..ac75f12e27bf 100644
> > --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> > @@ -9,7 +9,9 @@
> > "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> > },
> > {
> > - "ArchStdEvent": "L1D_CACHE_INVAL"
> > + "ArchStdEvent": "L1D_CACHE_INVAL",
> > + "Errata": "Errata AC03_CPU_41",
> > + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> > },
> > {
> > "ArchStdEvent": "L1D_TLB_REFILL_RD"
> > diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > index c50d8e930b05..f4bfe7083a6b 100644
> > --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json
> > @@ -9,7 +9,9 @@
> > "ArchStdEvent": "L1D_CACHE_REFILL_RD"
> > },
> > {
> > - "ArchStdEvent": "L1D_CACHE_INVAL"
> > + "ArchStdEvent": "L1D_CACHE_INVAL",
> > + "Errata": "Errata AC04_CPU_1",
> > + "BriefDescription": "L1D cache invalidate. Impacted by errata -"
> > },
> > {
> > "ArchStdEvent": "L1D_TLB_REFILL_RD"
> Reviewed-by: James Clark <james.clark@arm.com>
Thanks, applied to perf-tools-next,
- Arnaldo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-04-17 15:52 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-04-08 21:40 [PATCH] perf vendor events arm64: AmpereOne/AmpereOneX: Mark L1D_CACHE_INVAL impacted by errata Ilkka Koskinen
2024-04-08 21:40 ` Ilkka Koskinen
2024-04-09 13:33 ` James Clark
2024-04-09 13:33 ` James Clark
2024-04-17 15:51 ` Arnaldo Carvalho de Melo
2024-04-17 15:51 ` Arnaldo Carvalho de Melo
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.