From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Stewart Hildebrand <stewart.hildebrand@amd.com>
Cc: xen-devel@lists.xenproject.org,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>,
Bertrand Marquis <bertrand.marquis@arm.com>,
Michal Orzel <michal.orzel@amd.com>
Subject: Re: [PATCH v16 1/5] arm/vpci: honor access size when returning an error
Date: Thu, 23 May 2024 09:55:56 +0200 [thread overview]
Message-ID: <Zk72jPtd9iXhChbc@macbook> (raw)
In-Reply-To: <20240522225927.77398-2-stewart.hildebrand@amd.com>
On Wed, May 22, 2024 at 06:59:20PM -0400, Stewart Hildebrand wrote:
> From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
>
> Guest can try to read config space using different access sizes: 8,
> 16, 32, 64 bits. We need to take this into account when we are
> returning an error back to MMIO handler, otherwise it is possible to
> provide more data than requested: i.e. guest issues LDRB instruction
> to read one byte, but we are writing 0xFFFFFFFFFFFFFFFF in the target
> register.
Shouldn't this be taken care of in the trap handler subsystem, rather
than forcing each handler to ensure the returned data matches the
access size?
IOW, something like:
diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c
index 96c740d5636c..b7e12df85f87 100644
--- a/xen/arch/arm/io.c
+++ b/xen/arch/arm/io.c
@@ -37,6 +37,7 @@ static enum io_state handle_read(const struct mmio_handler *handler,
return IO_ABORT;
r = sign_extend(dabt, r);
+ r = r & GENMASK_ULL((1U << dabt.size) * 8 - 1, 0);
set_user_reg(regs, dabt.reg, r);
(not even build tested)
Thanks, Roger.
next prev parent reply other threads:[~2024-05-23 7:56 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-22 22:59 [PATCH v16 0/5] PCI devices passthrough on Arm, part 3 Stewart Hildebrand
2024-05-22 22:59 ` [PATCH v16 1/5] arm/vpci: honor access size when returning an error Stewart Hildebrand
2024-05-22 23:04 ` Stewart Hildebrand
2024-05-23 7:55 ` Roger Pau Monné [this message]
2024-05-27 21:14 ` Julien Grall
2024-05-28 7:11 ` Roger Pau Monné
2024-05-28 9:18 ` Julien Grall
2024-05-22 22:59 ` [PATCH v16 2/5] vpci/header: emulate PCI_COMMAND register for guests Stewart Hildebrand
2024-05-22 22:59 ` [PATCH v16 3/5] vpci: add initial support for virtual PCI bus topology Stewart Hildebrand
2024-05-23 7:30 ` Roger Pau Monné
2024-05-22 22:59 ` [PATCH v16 4/5] xen/arm: translate virtual PCI bus topology for guests Stewart Hildebrand
2024-05-23 7:48 ` Roger Pau Monné
2024-05-24 13:21 ` Julien Grall
2024-05-27 7:45 ` Roger Pau Monné
2025-03-06 19:36 ` Stewart Hildebrand
2024-05-22 22:59 ` [PATCH v16 5/5] xen/arm: account IO handlers for emulated PCI MSI-X Stewart Hildebrand
2024-05-23 7:59 ` Roger Pau Monné
2025-02-28 14:40 ` [PATCH v16 0/5] PCI devices passthrough on Arm, part 3 Mykyta Poturai
2025-03-02 16:01 ` Stewart Hildebrand
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