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From: Ethan Chen via <qemu-riscv@nongnu.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: <qemu-devel@nongnu.org>, <pbonzini@redhat.com>,
	<palmer@dabbelt.com>, <alistair.francis@wdc.com>,
	<bin.meng@windriver.com>, <liwei1518@gmail.com>,
	<zhiwei_liu@linux.alibaba.com>, <qemu-riscv@nongnu.org>
Subject: Re: [PATCH v6 0/3] Support RISC-V IOPMP
Date: Mon, 3 Jun 2024 11:12:44 +0800	[thread overview]
Message-ID: <Zl00rIvxrkLohQi6@ethan84-VirtualBox> (raw)
In-Reply-To: <6e46adc9-9e0a-4488-938f-fbf781e72996@ventanamicro.com>

Hi Dainel,

Sorry for the delayed response. I've been busy over the past two months.
I plan to submit the next version of the patch within two weeks.

Thanks,
Ethan Chen

On Mon, May 27, 2024 at 09:09:49AM -0300, Daniel Henrique Barboza wrote:
> Hi Ethan,
> 
> 
> Did you send v7 already and I somehow missed it? This is the latest version I
> have for this IOPMP work in my inbox.
> 
> If this is the latest, do you plan to send a new version? Most of the comments
> made in patche 2 are simple code style changes and there's no technical reason to
> not get this work merged for this release.
> 
> 
> Thanks,
> 
> Daniel
> 
> On 2/7/24 06:34, Ethan Chen wrote:
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model and add
> > IOPMP device to RISC-V virt machine.
> > 
> > Patch 1 add config STREAM make other device can reuse /hw/core/stream.c, IOPMP
> > implementation will use it. Patch 2 implement IOPMP deivce. Patch 3 add IOPMP
> > device to RISC-V virt machine.
> > 
> > The IOPMP specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
> > 
> > Changes for v6:
> >    - Rebased
> >    - IOPMP: Fix MDLCK_MD and ENTRYLCK_F did not lock correspond registers
> >             Fix iopmp_write for ENTRY_ADDRH and ENTRYLCK_L
> >    - Refine coding style (Daniel Henrique Barboza)
> > 
> > Thanks,
> > Ethan Chen
> > 
> > Ethan Chen (3):
> >    hw/core: Add config stream
> >    Add RISC-V IOPMP support
> >    hw/riscv/virt: Add IOPMP support
> > 
> >   docs/system/riscv/virt.rst                    |   12 +
> >   hw/Kconfig                                    |    1 +
> >   hw/core/Kconfig                               |    3 +
> >   hw/core/meson.build                           |    2 +-
> >   hw/misc/Kconfig                               |    4 +
> >   hw/misc/meson.build                           |    1 +
> >   hw/misc/riscv_iopmp.c                         | 1202 +++++++++++++++++
> >   hw/misc/trace-events                          |    4 +
> >   hw/riscv/Kconfig                              |    1 +
> >   hw/riscv/virt.c                               |  110 +-
> >   include/hw/misc/riscv_iopmp.h                 |  187 +++
> >   .../hw/misc/riscv_iopmp_transaction_info.h    |   28 +
> >   include/hw/riscv/virt.h                       |    8 +-
> >   13 files changed, 1559 insertions(+), 4 deletions(-)
> >   create mode 100644 hw/misc/riscv_iopmp.c
> >   create mode 100644 include/hw/misc/riscv_iopmp.h
> >   create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h
> > 
> 


WARNING: multiple messages have this Message-ID (diff)
From: Ethan Chen via <qemu-devel@nongnu.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: <qemu-devel@nongnu.org>, <pbonzini@redhat.com>,
	<palmer@dabbelt.com>, <alistair.francis@wdc.com>,
	<bin.meng@windriver.com>, <liwei1518@gmail.com>,
	<zhiwei_liu@linux.alibaba.com>, <qemu-riscv@nongnu.org>
Subject: Re: [PATCH v6 0/3] Support RISC-V IOPMP
Date: Mon, 3 Jun 2024 11:12:44 +0800	[thread overview]
Message-ID: <Zl00rIvxrkLohQi6@ethan84-VirtualBox> (raw)
In-Reply-To: <6e46adc9-9e0a-4488-938f-fbf781e72996@ventanamicro.com>

Hi Dainel,

Sorry for the delayed response. I've been busy over the past two months.
I plan to submit the next version of the patch within two weeks.

Thanks,
Ethan Chen

On Mon, May 27, 2024 at 09:09:49AM -0300, Daniel Henrique Barboza wrote:
> Hi Ethan,
> 
> 
> Did you send v7 already and I somehow missed it? This is the latest version I
> have for this IOPMP work in my inbox.
> 
> If this is the latest, do you plan to send a new version? Most of the comments
> made in patche 2 are simple code style changes and there's no technical reason to
> not get this work merged for this release.
> 
> 
> Thanks,
> 
> Daniel
> 
> On 2/7/24 06:34, Ethan Chen wrote:
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model and add
> > IOPMP device to RISC-V virt machine.
> > 
> > Patch 1 add config STREAM make other device can reuse /hw/core/stream.c, IOPMP
> > implementation will use it. Patch 2 implement IOPMP deivce. Patch 3 add IOPMP
> > device to RISC-V virt machine.
> > 
> > The IOPMP specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
> > 
> > Changes for v6:
> >    - Rebased
> >    - IOPMP: Fix MDLCK_MD and ENTRYLCK_F did not lock correspond registers
> >             Fix iopmp_write for ENTRY_ADDRH and ENTRYLCK_L
> >    - Refine coding style (Daniel Henrique Barboza)
> > 
> > Thanks,
> > Ethan Chen
> > 
> > Ethan Chen (3):
> >    hw/core: Add config stream
> >    Add RISC-V IOPMP support
> >    hw/riscv/virt: Add IOPMP support
> > 
> >   docs/system/riscv/virt.rst                    |   12 +
> >   hw/Kconfig                                    |    1 +
> >   hw/core/Kconfig                               |    3 +
> >   hw/core/meson.build                           |    2 +-
> >   hw/misc/Kconfig                               |    4 +
> >   hw/misc/meson.build                           |    1 +
> >   hw/misc/riscv_iopmp.c                         | 1202 +++++++++++++++++
> >   hw/misc/trace-events                          |    4 +
> >   hw/riscv/Kconfig                              |    1 +
> >   hw/riscv/virt.c                               |  110 +-
> >   include/hw/misc/riscv_iopmp.h                 |  187 +++
> >   .../hw/misc/riscv_iopmp_transaction_info.h    |   28 +
> >   include/hw/riscv/virt.h                       |    8 +-
> >   13 files changed, 1559 insertions(+), 4 deletions(-)
> >   create mode 100644 hw/misc/riscv_iopmp.c
> >   create mode 100644 include/hw/misc/riscv_iopmp.h
> >   create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h
> > 
> 


  reply	other threads:[~2024-06-03  3:47 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-07  9:34 [PATCH v6 0/3] Support RISC-V IOPMP Ethan Chen via
2024-02-07  9:34 ` Ethan Chen via
2024-02-07  9:34 ` [PATCH v6 1/3] hw/core: Add config stream Ethan Chen via
2024-02-07  9:34   ` Ethan Chen via
2024-02-07  9:34 ` [PATCH v6 2/3] Add RISC-V IOPMP support Ethan Chen via
2024-02-07  9:34   ` Ethan Chen via
2024-02-14 14:34   ` Daniel Henrique Barboza
2024-02-16  1:43     ` Ethan Chen via
2024-02-16  1:43       ` Ethan Chen via
2024-02-07  9:34 ` [PATCH v6 3/3] hw/riscv/virt: Add " Ethan Chen via
2024-02-07  9:34   ` Ethan Chen via
2024-02-14 14:03   ` Daniel Henrique Barboza
2024-05-27 12:09 ` [PATCH v6 0/3] Support RISC-V IOPMP Daniel Henrique Barboza
2024-06-03  3:12   ` Ethan Chen via [this message]
2024-06-03  3:12     ` Ethan Chen via

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