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From: Andrea Parri <parri.andrea@gmail.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Leonardo Bras <leobras@redhat.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH -fixes] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations
Date: Thu, 30 May 2024 16:09:17 +0200	[thread overview]
Message-ID: <ZliIjQvbQRGq+oL0@andrea> (raw)
In-Reply-To: <CAHVXubi+XW=v=MKDov5j0v2QG-cAMjWxdqMRhgfLmo1JhCkryQ@mail.gmail.com>

> And you already told me that privately...Sorry, my mind has been
> elsewhere lately...I'll fix that right now.

Np.  While at it, one nit below.


> >  #define arch_xchg_relaxed(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", "")
> > +       _arch_xchg(ptr, x, "", "", "", "", "")
> >
> >  #define arch_xchg_acquire(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER)
> > +       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER, RISCV_ACQUIRE_BARRIER)
> >
> >  #define arch_xchg_release(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "")
> > +       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "", "")
> >
> >  #define arch_xchg(ptr, x)                                              \
> > -       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n")
> > +       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n", "")

The plain string can be replaced with RISCV_FULL_BARRIER (cf. asm/fence.h)
to match the style/approach used elsewhere in this file.

  Andrea

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http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrea Parri <parri.andrea@gmail.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Leonardo Bras <leobras@redhat.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH -fixes] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations
Date: Thu, 30 May 2024 16:09:17 +0200	[thread overview]
Message-ID: <ZliIjQvbQRGq+oL0@andrea> (raw)
In-Reply-To: <CAHVXubi+XW=v=MKDov5j0v2QG-cAMjWxdqMRhgfLmo1JhCkryQ@mail.gmail.com>

> And you already told me that privately...Sorry, my mind has been
> elsewhere lately...I'll fix that right now.

Np.  While at it, one nit below.


> >  #define arch_xchg_relaxed(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", "")
> > +       _arch_xchg(ptr, x, "", "", "", "", "")
> >
> >  #define arch_xchg_acquire(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER)
> > +       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER, RISCV_ACQUIRE_BARRIER)
> >
> >  #define arch_xchg_release(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "")
> > +       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "", "")
> >
> >  #define arch_xchg(ptr, x)                                              \
> > -       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n")
> > +       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n", "")

The plain string can be replaced with RISCV_FULL_BARRIER (cf. asm/fence.h)
to match the style/approach used elsewhere in this file.

  Andrea

  reply	other threads:[~2024-05-30 14:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30  7:54 [PATCH -fixes] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations Alexandre Ghiti
2024-05-30  7:54 ` Alexandre Ghiti
2024-05-30 11:54 ` Andrea Parri
2024-05-30 11:54   ` Andrea Parri
2024-05-30 12:05   ` Alexandre Ghiti
2024-05-30 12:05     ` Alexandre Ghiti
2024-05-30 14:09     ` Andrea Parri [this message]
2024-05-30 14:09       ` Andrea Parri

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