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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 2/6] meson: assume x86-64-v2 baseline ISA
Date: Sun, 2 Jun 2024 17:41:31 +0800	[thread overview]
Message-ID: <Zlw+S1RlXwxLovGu@intel.com> (raw)
In-Reply-To: <20240531091457.42200-3-pbonzini@redhat.com>

On Fri, May 31, 2024 at 11:14:53AM +0200, Paolo Bonzini wrote:
> Date: Fri, 31 May 2024 11:14:53 +0200
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH 2/6] meson: assume x86-64-v2 baseline ISA
> X-Mailer: git-send-email 2.45.1
> 
> x86-64-v2 processors were released in 2008, assume that we have one.
> Unfortunately there is no GCC flag to enable all the features
> without disabling what came after; so enable them one by one.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  meson.build | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/meson.build b/meson.build
> index 63866071445..19d1fc1f33b 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -336,9 +336,13 @@ if host_arch == 'i386' and not cc.links('''
>    qemu_common_flags = ['-march=i486'] + qemu_common_flags
>  endif
>  
> -# ??? Only extremely old AMD cpus do not have cmpxchg16b.
> -# If we truly care, we should simply detect this case at
> -# runtime and generate the fallback to serial emulation.
> +# Assume x86-64-v2 (minus CMPXCHG16B for 32-bit code)

Is it necessary to state the requirement (x86-64-v2) for x86 host in
some doc?

e.g., docs/system/target-i386.rst.

> +if host_arch == 'i386'
> +  qemu_common_flags = ['-mfpmath=sse'] + qemu_common_flags
> +endif
> +if host_arch in ['i386', 'x86_64']
> +  qemu_common_flags = ['-mpopcnt', '-msse4.2'] + qemu_common_flags
> +endif
>  if host_arch == 'x86_64'
>    qemu_common_flags = ['-mcx16'] + qemu_common_flags
>  endif
> -- 
> 2.45.1

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>




  reply	other threads:[~2024-06-02  9:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-31  9:14 [PATCH 0/6] host/i386: require x86-64-v2 ISA Paolo Bonzini
2024-05-31  9:14 ` [PATCH 1/6] host/i386: nothing looks at CPUINFO_SSE4 Paolo Bonzini
2024-05-31 12:55   ` Philippe Mathieu-Daudé
2024-06-02  9:28   ` Zhao Liu
2024-05-31  9:14 ` [PATCH 2/6] meson: assume x86-64-v2 baseline ISA Paolo Bonzini
2024-06-02  9:41   ` Zhao Liu [this message]
2024-05-31  9:14 ` [PATCH 3/6] host/i386: assume presence of CMOV Paolo Bonzini
2024-06-02  9:29   ` Zhao Liu
2024-05-31  9:14 ` [PATCH 4/6] host/i386: assume presence of SSE2 Paolo Bonzini
2024-06-02  9:30   ` Zhao Liu
2024-05-31  9:14 ` [PATCH 5/6] host/i386: assume presence of SSSE3 Paolo Bonzini
2024-06-02  9:32   ` Zhao Liu
2024-05-31  9:14 ` [PATCH 6/6] host/i386: assume presence of POPCNT Paolo Bonzini
2024-06-02  9:35   ` Zhao Liu
2024-05-31 17:43 ` [PATCH 0/6] host/i386: require x86-64-v2 ISA Richard Henderson
2024-06-06 16:52 ` Alexander Monakov

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