From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 6/6] host/i386: assume presence of POPCNT
Date: Sun, 2 Jun 2024 17:35:23 +0800 [thread overview]
Message-ID: <Zlw8267/tlzICJhT@intel.com> (raw)
In-Reply-To: <20240531091457.42200-7-pbonzini@redhat.com>
On Fri, May 31, 2024 at 11:14:57AM +0200, Paolo Bonzini wrote:
> Date: Fri, 31 May 2024 11:14:57 +0200
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH 6/6] host/i386: assume presence of POPCNT
> X-Mailer: git-send-email 2.45.1
>
> QEMU now requires an x86-64-v2 host, which has the POPCNT instruction.
> Use it freely in TCG-generated code.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> tcg/i386/tcg-target.h | 5 ++---
> util/cpuinfo-i386.c | 1 -
> 3 files changed, 2 insertions(+), 5 deletions(-)
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
next prev parent reply other threads:[~2024-06-02 9:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-31 9:14 [PATCH 0/6] host/i386: require x86-64-v2 ISA Paolo Bonzini
2024-05-31 9:14 ` [PATCH 1/6] host/i386: nothing looks at CPUINFO_SSE4 Paolo Bonzini
2024-05-31 12:55 ` Philippe Mathieu-Daudé
2024-06-02 9:28 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 2/6] meson: assume x86-64-v2 baseline ISA Paolo Bonzini
2024-06-02 9:41 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 3/6] host/i386: assume presence of CMOV Paolo Bonzini
2024-06-02 9:29 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 4/6] host/i386: assume presence of SSE2 Paolo Bonzini
2024-06-02 9:30 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 5/6] host/i386: assume presence of SSSE3 Paolo Bonzini
2024-06-02 9:32 ` Zhao Liu
2024-05-31 9:14 ` [PATCH 6/6] host/i386: assume presence of POPCNT Paolo Bonzini
2024-06-02 9:35 ` Zhao Liu [this message]
2024-05-31 17:43 ` [PATCH 0/6] host/i386: require x86-64-v2 ISA Richard Henderson
2024-06-06 16:52 ` Alexander Monakov
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