From: Namhyung Kim <namhyung@kernel.org>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Ian Rogers <irogers@google.com>,
Segher Boessenkool <segher@kernel.crashing.org>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
LKML <linux-kernel@vger.kernel.org>,
linux-perf-users <linux-perf-users@vger.kernel.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
akanksha@linux.ibm.com, Madhavan Srinivasan <maddy@linux.ibm.com>,
Kajol Jain <kjain@linux.ibm.com>,
Disha Goel <disgoel@linux.vnet.ibm.com>
Subject: Re: [V4 05/16] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc
Date: Wed, 26 Jun 2024 14:17:08 -0700 [thread overview]
Message-ID: <ZnyFVE22bcdilUyL@google.com> (raw)
In-Reply-To: <40DB645D-BFA7-44EA-B937-ADE81EEC1316@linux.vnet.ibm.com>
Hello,
On Wed, Jun 26, 2024 at 09:38:28AM +0530, Athira Rajeev wrote:
>
>
> > On 26 Jun 2024, at 12:15 AM, Namhyung Kim <namhyung@kernel.org> wrote:
> >
> > On Tue, Jun 25, 2024 at 06:12:51PM +0530, Athira Rajeev wrote:
> >>
> >>
> >>> On 25 Jun 2024, at 11:09 AM, Namhyung Kim <namhyung@kernel.org> wrote:
> >>>
> >>> On Fri, Jun 14, 2024 at 10:56:20PM +0530, Athira Rajeev wrote:
> >>>> Currently, the perf tool infrastructure disasm_line__parse function to
> >>>> parse disassembled line.
> >>>>
> >>>> Example snippet from objdump:
> >>>> objdump --start-address=<address> --stop-address=<address> -d --no-show-raw-insn -C <vmlinux>
> >>>>
> >>>> c0000000010224b4: lwz r10,0(r9)
> >>>>
> >>>> This line "lwz r10,0(r9)" is parsed to extract instruction name,
> >>>> registers names and offset. In powerpc, the approach for data type
> >>>> profiling uses raw instruction instead of result from objdump to identify
> >>>> the instruction category and extract the source/target registers.
> >>>>
> >>>> Example: 38 01 81 e8 ld r4,312(r1)
> >>>>
> >>>> Here "38 01 81 e8" is the raw instruction representation. Add function
> >>>> "disasm_line__parse_powerpc" to handle parsing of raw instruction.
> >>>> Also update "struct disasm_line" to save the binary code/
> >>>> With the change, function captures:
> >>>>
> >>>> line -> "38 01 81 e8 ld r4,312(r1)"
> >>>> raw instruction "38 01 81 e8"
> >>>>
> >>>> Raw instruction is used later to extract the reg/offset fields. Macros
> >>>> are added to extract opcode and register fields. "struct disasm_line"
> >>>> is updated to carry union of "bytes" and "raw_insn" of 32 bit to carry raw
> >>>> code (raw). Function "disasm_line__parse_powerpc fills the raw
> >>>> instruction hex value and can use macros to get opcode. There is no
> >>>> changes in existing code paths, which parses the disassembled code.
> >>>> The architecture using the instruction name and present approach is
> >>>> not altered. Since this approach targets powerpc, the macro
> >>>> implementation is added for powerpc as of now.
> >>>>
> >>>> Since the disasm_line__parse is used in other cases (perf annotate) and
> >>>> not only data tye profiling, the powerpc callback includes changes to
> >>>> work with binary code as well as mneumonic representation. Also in case
> >>>> if the DSO read fails and libcapstone is not supported, the approach
> >>>> fallback to use objdump as option. Hence as option, patch has changes to
> >>>> ensure objdump option also works well.
> >>>>
> >>>> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
> >>>> ---
[SNIP]
> >>>> +/*
> >>>> + * Parses the result captured from symbol__disassemble_*
> >>>> + * Example, line read from DSO file in powerpc:
> >>>> + * line: 38 01 81 e8
> >>>> + * opcode: fetched from arch specific get_opcode_insn
> >>>> + * rawp_insn: e8810138
> >>>> + *
> >>>> + * rawp_insn is used later to extract the reg/offset fields
> >>>> + */
> >>>> +#define PPC_OP(op) (((op) >> 26) & 0x3F)
> >>>> +
> >>>> +static int disasm_line__parse_powerpc(struct disasm_line *dl)
> >>>> +{
> >>>> + char *line = dl->al.line;
> >>>> + const char **namep = &dl->ins.name;
> >>>> + char **rawp = &dl->ops.raw;
> >>>> + char tmp, *tmp_raw_insn, *name_raw_insn = skip_spaces(line);
> >>>> + char *name = skip_spaces(name_raw_insn + 11);
> >>>> + int objdump = 0;
> >>>> +
> >>>> + if (strlen(line) > 11)
> >>>> + objdump = 1;
> >>>> +
> >>>> + if (name_raw_insn[0] == '\0')
> >>>> + return -1;
> >>>> +
> >>>> + if (objdump) {
> >>>> + *rawp = name + 1;
> >>>> + while ((*rawp)[0] != '\0' && !isspace((*rawp)[0]))
> >>>> + ++*rawp;
> >>>> + tmp = (*rawp)[0];
> >>>> + (*rawp)[0] = '\0';
> >>>> +
> >>>> + *namep = strdup(name);
> >>>> + if (*namep == NULL)
> >>>> + return -1;
> >>>> +
> >>>> + (*rawp)[0] = tmp;
> >>>> + *rawp = strim(*rawp);
> >>>> + } else
> >>>> + *namep = "";
> >
> > Then can you handle this logic under if (annotate_opts.show_raw_insn)
> > in disasm_line__parse() instead of adding a new function?
> >
> > Thanks,
> > Namhyung
>
> Hi Namhyung,
>
> We discussed to have a per-arch disasm_line_parse() here:
> https://lore.kernel.org/all/CAM9d7ci1LDa7moT2qDr2qK+DTNLU6ZBkmROnbdozAjuQLQfNog@mail.gmail.com/#t
>
> So I added it as a new function : disasm_line__parse_powerpc
> Since it is not used by other archs, we can go with having new function ?
Ok, I thought it'd be quite different from disasm_line__parse() but it
seems that it's mostly similar except for the raw insn. So I think it's
better to add the logic to the generic disasm_line__parse(). Sorry for
the inconvenience.
Thanks,
Namhyung
> >>>> +
> >>>> + tmp_raw_insn = strdup(name_raw_insn);
> >>>> + tmp_raw_insn[11] = '\0';
> >>>> + remove_spaces(tmp_raw_insn);
> >>>> +
> >>>> + dl->raw.raw_insn = strtol(tmp_raw_insn, NULL, 16);
> >>>> + if (objdump)
> >>>> + dl->raw.raw_insn = be32_to_cpu(strtol(tmp_raw_insn, NULL, 16));
> >>>
> >>> Hmm.. can you use a sscanf() instead?
> >>>
> >>> sscanf(line, "%x %x %x %x", &dl->raw.bytes[0], &dl->raw.bytes[1], ...)
> >>>
> >>> Thanks,
> >>> Namhyung
> >>>
> >> Sure will address in V5
> >>
> >> Thanks
> >> Athira
> >>>> +
> >>>> + return 0;
> >>>> +}
WARNING: multiple messages have this Message-ID (diff)
From: Namhyung Kim <namhyung@kernel.org>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: Ian Rogers <irogers@google.com>,
Disha Goel <disgoel@linux.vnet.ibm.com>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Kajol Jain <kjain@linux.ibm.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
LKML <linux-kernel@vger.kernel.org>,
linux-perf-users <linux-perf-users@vger.kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Jiri Olsa <jolsa@kernel.org>,
akanksha@linux.ibm.com,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [V4 05/16] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc
Date: Wed, 26 Jun 2024 14:17:08 -0700 [thread overview]
Message-ID: <ZnyFVE22bcdilUyL@google.com> (raw)
In-Reply-To: <40DB645D-BFA7-44EA-B937-ADE81EEC1316@linux.vnet.ibm.com>
Hello,
On Wed, Jun 26, 2024 at 09:38:28AM +0530, Athira Rajeev wrote:
>
>
> > On 26 Jun 2024, at 12:15 AM, Namhyung Kim <namhyung@kernel.org> wrote:
> >
> > On Tue, Jun 25, 2024 at 06:12:51PM +0530, Athira Rajeev wrote:
> >>
> >>
> >>> On 25 Jun 2024, at 11:09 AM, Namhyung Kim <namhyung@kernel.org> wrote:
> >>>
> >>> On Fri, Jun 14, 2024 at 10:56:20PM +0530, Athira Rajeev wrote:
> >>>> Currently, the perf tool infrastructure disasm_line__parse function to
> >>>> parse disassembled line.
> >>>>
> >>>> Example snippet from objdump:
> >>>> objdump --start-address=<address> --stop-address=<address> -d --no-show-raw-insn -C <vmlinux>
> >>>>
> >>>> c0000000010224b4: lwz r10,0(r9)
> >>>>
> >>>> This line "lwz r10,0(r9)" is parsed to extract instruction name,
> >>>> registers names and offset. In powerpc, the approach for data type
> >>>> profiling uses raw instruction instead of result from objdump to identify
> >>>> the instruction category and extract the source/target registers.
> >>>>
> >>>> Example: 38 01 81 e8 ld r4,312(r1)
> >>>>
> >>>> Here "38 01 81 e8" is the raw instruction representation. Add function
> >>>> "disasm_line__parse_powerpc" to handle parsing of raw instruction.
> >>>> Also update "struct disasm_line" to save the binary code/
> >>>> With the change, function captures:
> >>>>
> >>>> line -> "38 01 81 e8 ld r4,312(r1)"
> >>>> raw instruction "38 01 81 e8"
> >>>>
> >>>> Raw instruction is used later to extract the reg/offset fields. Macros
> >>>> are added to extract opcode and register fields. "struct disasm_line"
> >>>> is updated to carry union of "bytes" and "raw_insn" of 32 bit to carry raw
> >>>> code (raw). Function "disasm_line__parse_powerpc fills the raw
> >>>> instruction hex value and can use macros to get opcode. There is no
> >>>> changes in existing code paths, which parses the disassembled code.
> >>>> The architecture using the instruction name and present approach is
> >>>> not altered. Since this approach targets powerpc, the macro
> >>>> implementation is added for powerpc as of now.
> >>>>
> >>>> Since the disasm_line__parse is used in other cases (perf annotate) and
> >>>> not only data tye profiling, the powerpc callback includes changes to
> >>>> work with binary code as well as mneumonic representation. Also in case
> >>>> if the DSO read fails and libcapstone is not supported, the approach
> >>>> fallback to use objdump as option. Hence as option, patch has changes to
> >>>> ensure objdump option also works well.
> >>>>
> >>>> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
> >>>> ---
[SNIP]
> >>>> +/*
> >>>> + * Parses the result captured from symbol__disassemble_*
> >>>> + * Example, line read from DSO file in powerpc:
> >>>> + * line: 38 01 81 e8
> >>>> + * opcode: fetched from arch specific get_opcode_insn
> >>>> + * rawp_insn: e8810138
> >>>> + *
> >>>> + * rawp_insn is used later to extract the reg/offset fields
> >>>> + */
> >>>> +#define PPC_OP(op) (((op) >> 26) & 0x3F)
> >>>> +
> >>>> +static int disasm_line__parse_powerpc(struct disasm_line *dl)
> >>>> +{
> >>>> + char *line = dl->al.line;
> >>>> + const char **namep = &dl->ins.name;
> >>>> + char **rawp = &dl->ops.raw;
> >>>> + char tmp, *tmp_raw_insn, *name_raw_insn = skip_spaces(line);
> >>>> + char *name = skip_spaces(name_raw_insn + 11);
> >>>> + int objdump = 0;
> >>>> +
> >>>> + if (strlen(line) > 11)
> >>>> + objdump = 1;
> >>>> +
> >>>> + if (name_raw_insn[0] == '\0')
> >>>> + return -1;
> >>>> +
> >>>> + if (objdump) {
> >>>> + *rawp = name + 1;
> >>>> + while ((*rawp)[0] != '\0' && !isspace((*rawp)[0]))
> >>>> + ++*rawp;
> >>>> + tmp = (*rawp)[0];
> >>>> + (*rawp)[0] = '\0';
> >>>> +
> >>>> + *namep = strdup(name);
> >>>> + if (*namep == NULL)
> >>>> + return -1;
> >>>> +
> >>>> + (*rawp)[0] = tmp;
> >>>> + *rawp = strim(*rawp);
> >>>> + } else
> >>>> + *namep = "";
> >
> > Then can you handle this logic under if (annotate_opts.show_raw_insn)
> > in disasm_line__parse() instead of adding a new function?
> >
> > Thanks,
> > Namhyung
>
> Hi Namhyung,
>
> We discussed to have a per-arch disasm_line_parse() here:
> https://lore.kernel.org/all/CAM9d7ci1LDa7moT2qDr2qK+DTNLU6ZBkmROnbdozAjuQLQfNog@mail.gmail.com/#t
>
> So I added it as a new function : disasm_line__parse_powerpc
> Since it is not used by other archs, we can go with having new function ?
Ok, I thought it'd be quite different from disasm_line__parse() but it
seems that it's mostly similar except for the raw insn. So I think it's
better to add the logic to the generic disasm_line__parse(). Sorry for
the inconvenience.
Thanks,
Namhyung
> >>>> +
> >>>> + tmp_raw_insn = strdup(name_raw_insn);
> >>>> + tmp_raw_insn[11] = '\0';
> >>>> + remove_spaces(tmp_raw_insn);
> >>>> +
> >>>> + dl->raw.raw_insn = strtol(tmp_raw_insn, NULL, 16);
> >>>> + if (objdump)
> >>>> + dl->raw.raw_insn = be32_to_cpu(strtol(tmp_raw_insn, NULL, 16));
> >>>
> >>> Hmm.. can you use a sscanf() instead?
> >>>
> >>> sscanf(line, "%x %x %x %x", &dl->raw.bytes[0], &dl->raw.bytes[1], ...)
> >>>
> >>> Thanks,
> >>> Namhyung
> >>>
> >> Sure will address in V5
> >>
> >> Thanks
> >> Athira
> >>>> +
> >>>> + return 0;
> >>>> +}
next prev parent reply other threads:[~2024-06-26 21:17 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-14 17:26 [V4 00/16] Add data type profiling support for powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 01/16] tools/perf: Move the data structures related to register type to header file Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 5:15 ` Namhyung Kim
2024-06-25 5:15 ` Namhyung Kim
2024-06-25 10:54 ` Athira Rajeev
2024-06-25 10:54 ` Athira Rajeev
2024-06-14 17:26 ` [V4 02/16] tools/perf: Add "update_insn_state" callback function to handle arch specific instruction tracking Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 03/16] tools/perf: Add support to capture and parse raw instruction in powerpc using dso__data_read_offset utility Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 5:29 ` Namhyung Kim
2024-06-25 5:29 ` Namhyung Kim
2024-06-25 12:38 ` Athira Rajeev
2024-06-25 12:38 ` Athira Rajeev
2024-06-25 18:39 ` Namhyung Kim
2024-06-25 18:39 ` Namhyung Kim
2024-06-26 4:09 ` Athira Rajeev
2024-06-26 4:09 ` Athira Rajeev
2024-06-14 17:26 ` [V4 04/16] tools/perf: Use sort keys to determine whether to pick objdump to disassemble Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 5:32 ` Namhyung Kim
2024-06-25 5:32 ` Namhyung Kim
2024-06-14 17:26 ` [V4 05/16] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 5:39 ` Namhyung Kim
2024-06-25 5:39 ` Namhyung Kim
2024-06-25 12:42 ` Athira Rajeev
2024-06-25 12:42 ` Athira Rajeev
2024-06-25 18:45 ` Namhyung Kim
2024-06-25 18:45 ` Namhyung Kim
2024-06-26 4:08 ` Athira Rajeev
2024-06-26 4:08 ` Athira Rajeev
2024-06-26 21:17 ` Namhyung Kim [this message]
2024-06-26 21:17 ` Namhyung Kim
2024-06-27 9:28 ` Athira Rajeev
2024-06-27 9:28 ` Athira Rajeev
2024-06-30 11:10 ` Athira Rajeev
2024-06-30 11:10 ` Athira Rajeev
2024-06-14 17:26 ` [V4 06/16] tools/perf: Update parameters for reg extract functions to use raw instruction on powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 6:00 ` Namhyung Kim
2024-06-25 6:00 ` Namhyung Kim
2024-06-25 12:43 ` Athira Rajeev
2024-06-25 12:43 ` Athira Rajeev
2024-06-14 17:26 ` [V4 07/16] tools/perf: Add support to identify memory instructions of opcode 31 in powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 08/16] tools/perf: Add some of the arithmetic instructions to support instruction tracking " Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 09/16] tools/perf: Add more instructions for instruction tracking Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 10/16] tools/perf: Update instruction tracking for powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 11/16] tools/perf: Make capstone_init non-static so that it can be used during symbol disassemble Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 12/16] tools/perf: Use capstone_init and remove open_capstone_handle from disasm.c Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 13/16] tools/perf: Add support to use libcapstone in powerpc Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 6:08 ` Namhyung Kim
2024-06-25 6:08 ` Namhyung Kim
2024-06-25 12:44 ` Athira Rajeev
2024-06-25 12:44 ` Athira Rajeev
2024-06-14 17:26 ` [V4 14/16] tools/perf: Add support to find global register variables using find_data_type_global_reg Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-25 6:17 ` Namhyung Kim
2024-06-25 6:17 ` Namhyung Kim
2024-06-25 12:45 ` Athira Rajeev
2024-06-25 12:45 ` Athira Rajeev
2024-06-14 17:26 ` [V4 15/16] tools/perf: Add support for global_die to capture name of variable in case of register defined variable Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-14 17:26 ` [V4 16/16] tools/perf: Set instruction name to be used with insn-stat when using raw instruction Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev
2024-06-20 15:31 ` [V4 00/16] Add data type profiling support for powerpc Athira Rajeev
2024-06-20 15:31 ` Athira Rajeev
2024-06-22 0:06 ` Namhyung Kim
2024-06-22 0:06 ` Namhyung Kim
2024-06-25 11:48 ` Athira Rajeev
2024-06-25 11:48 ` Athira Rajeev
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