[PATCH v5 0/8] Enable eQEP DT support for Sitara K3 platforms

[PATCH v5 0/8] Enable eQEP DT support for Sitara K3 platforms

[Judith Mendez]

This patch series adds eQEP DT nodes for K3 Sitara devices:
- AM62x
- AM62ax
- AM62px
- AM64x

The series also allows the eQEP driver to be built for K3
architecture.

Changes since v3:
- Drop the new example from binding (patch 1/8)

v4: https://lore.kernel.org/linux-devicetree/20240610144637.477954-1-jm@ti.com/
v3: https://lore.kernel.org/linux-devicetree/20240607162755.366144-1-jm@ti.com/
v2: https://lore.kernel.org/linux-devicetree/20240523231516.545085-1-jm@ti.com/
v1: https://lore.kernel.org/linux-devicetree/20240418221417.1592787-1-jm@ti.com/


Judith Mendez (8):
  dt-bindings: counter: Add new ti,am62-eqep compatible
  counter/ti-eqep: Add new ti-am62-eqep compatible
  arm64: dts: ti: k3-am62-main: Add eQEP nodes
  arm64: dts: ti: k3-am62a-main: Add eQEP nodes
  arm64: dts: ti: k3-am62p-main: Add eQEP nodes
  arm64: dts: ti: k3-am64-main: Add eQEP nodes
  arm64: dts: ti: k3-am64x-sk: Enable eQEP
  counter: ti-eqep: Allow eQEP driver to be built for K3 devices

 .../devicetree/bindings/counter/ti-eqep.yaml  | 27 +++++++++++++++----
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi      | 27 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi     | 27 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi     | 27 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi      | 27 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am642-sk.dts        | 17 ++++++++++++
 drivers/counter/Kconfig                       |  2 +-
 drivers/counter/ti-eqep.c                     |  1 +
 8 files changed, 149 insertions(+), 6 deletions(-)


base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
-- 
2.45.1

[PATCH v5 1/8] dt-bindings: counter: Add new ti,am62-eqep compatible

[Judith Mendez]

Add new compatible ti,am62-eqep for TI K3 devices. If a device
uses this compatible, require power-domains property.

Since there is only one functional and interface clock for eqep,
clock-names is not really required, so removed from required
section, make it optional for ti,am3352-eqep compatible, and
update the example.

The clock-name also changed for TI K3 SoCs so do not allow
clock-names property for the new compatible.

Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: David Lechner <david@lechnology.com>
---
Changes since v4:
- Drop the new example from binding
---
 .../devicetree/bindings/counter/ti-eqep.yaml  | 27 +++++++++++++++----
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
index 85f1ff83afe72..c882ab5fcf1f2 100644
--- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
+++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
@@ -11,7 +11,9 @@ maintainers:
 
 properties:
   compatible:
-    const: ti,am3352-eqep
+    enum:
+      - ti,am3352-eqep
+      - ti,am62-eqep
 
   reg:
     maxItems: 1
@@ -21,19 +23,35 @@ properties:
     maxItems: 1
 
   clocks:
-    description: The clock that determines the SYSCLKOUT rate for the eQEP
-      peripheral.
+    description: The functional and interface clock that determines the clock
+      rate for the eQEP peripheral.
     maxItems: 1
 
   clock-names:
     const: sysclkout
 
+  power-domains:
+    maxItems: 1
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - ti,am62-eqep
+    then:
+      properties:
+        clock-names: false
+
+      required:
+        - power-domains
+
 required:
   - compatible
   - reg
   - interrupts
   - clocks
-  - clock-names
 
 additionalProperties: false
 
@@ -43,7 +61,6 @@ examples:
         compatible = "ti,am3352-eqep";
         reg = <0x180 0x80>;
         clocks = <&l4ls_gclk>;
-        clock-names = "sysclkout";
         interrupts = <79>;
     };
 
-- 
2.45.1

[PATCH v5 2/8] counter/ti-eqep: Add new ti-am62-eqep compatible

[Judith Mendez]

Add new compatible for ti-am62-eqep for TI K3 SoC's.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
---
Changes since v4:
- No change
---
 drivers/counter/ti-eqep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c
index 072b11fd6b32e..cd50f267cf6fb 100644
--- a/drivers/counter/ti-eqep.c
+++ b/drivers/counter/ti-eqep.c
@@ -437,6 +437,7 @@ static void ti_eqep_remove(struct platform_device *pdev)
 
 static const struct of_device_id ti_eqep_of_match[] = {
 	{ .compatible = "ti,am3352-eqep", },
+	{ .compatible = "ti,am62-eqep", },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, ti_eqep_of_match);
-- 
2.45.1

[PATCH v5 3/8] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Judith Mendez]

Add eQEP device tree nodes 0-2 for AM625 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 448a59dc53a77..525997456adaa 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -846,6 +846,33 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.45.1

[PATCH v5 4/8] arm64: dts: ti: k3-am62a-main: Add eQEP nodes

[Judith Mendez]

Add eQEP device tree nodes 0-2 for AM62A7 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index bf9c2d9c6439a..6c32c0c0d8dcc 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -909,6 +909,33 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	mcasp0: audio-controller@2b00000 {
 		compatible = "ti,am33xx-mcasp-audio";
 		reg = <0x00 0x02b00000 0x00 0x2000>,
-- 
2.45.1

[PATCH v5 5/8] arm64: dts: ti: k3-am62p-main: Add eQEP nodes

[Judith Mendez]

Add eQEP device tree nodes 0-2 for AM62P5 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 900d1f9530a2a..ede7351a4d864 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -857,6 +857,33 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.45.1

[PATCH v5 6/8] arm64: dts: ti: k3-am64-main: Add eQEP nodes

[Judith Mendez]

Add eQEP device tree nodes 0-2 for AM642 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 6f9aa5e02138f..6be710138dded 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1171,6 +1171,33 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am62-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_rti0: watchdog@e000000 {
 		compatible = "ti,j7-rti-wdt";
 		reg = <0x00 0xe000000 0x00 0x100>;
-- 
2.45.1

[PATCH v5 7/8] arm64: dts: ti: k3-am64x-sk: Enable eQEP

[Judith Mendez]

There are 3 instances of eQEP on AM64x. Only EQEP0 signals
can be routed to the user expansion so enable only EQEP0
in k3-am642-sk.dts.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
 arch/arm64/boot/dts/ti/k3-am642-sk.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 5b028b3a3192f..1992444953745 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -357,6 +357,16 @@ main_ecap0_pins_default: main-ecap0-default-pins {
 			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
 		>;
 	};
+
+	main_eqep0_pins_default: main-eqep0-default-pins {
+		pinctrl-single,pins = <
+			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
+			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
+			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
+			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
+		>;
+	};
+
 	main_wlan_en_pins_default: main-wlan-en-default-pins {
 		pinctrl-single,pins = <
 			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
@@ -672,3 +682,10 @@ &ecap0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
+
+&eqep0 {
+	status = "okay";
+	/* EQEP0 A & B available on pins 18 & 22 of J4 header */
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_eqep0_pins_default>;
+};
-- 
2.45.1

[PATCH v5 8/8] counter: ti-eqep: Allow eQEP driver to be built for K3 devices

[Judith Mendez]

TI K3 SoC's support eQEP hardware, so add ARCH_K3 to the depends
so the TI eQEP driver can be built for K3 devices.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
---
Changes since v4:
- No change
---
 drivers/counter/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
index 497bc05dca4df..d30d22dfe5774 100644
--- a/drivers/counter/Kconfig
+++ b/drivers/counter/Kconfig
@@ -138,7 +138,7 @@ config TI_ECAP_CAPTURE
 
 config TI_EQEP
 	tristate "TI eQEP counter driver"
-	depends on (SOC_AM33XX || COMPILE_TEST)
+	depends on SOC_AM33XX || ARCH_K3 || COMPILE_TEST
 	select REGMAP_MMIO
 	help
 	  Select this option to enable the Texas Instruments Enhanced Quadrature
-- 
2.45.1

Re: [PATCH v5 1/8] dt-bindings: counter: Add new ti,am62-eqep compatible

[William Breathitt Gray]

[-- Attachment #1: Type: text/plain, Size: 882 bytes --]

On Wed, Jun 12, 2024 at 08:55:31AM -0500, Judith Mendez wrote:
> Add new compatible ti,am62-eqep for TI K3 devices. If a device
> uses this compatible, require power-domains property.
> 
> Since there is only one functional and interface clock for eqep,
> clock-names is not really required, so removed from required
> section, make it optional for ti,am3352-eqep compatible, and
> update the example.
> 
> The clock-name also changed for TI K3 SoCs so do not allow
> clock-names property for the new compatible.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: David Lechner <david@lechnology.com>
> ---
> Changes since v4:
> - Drop the new example from binding
> ---

Hi Krzysztof,

Are you satisfied with the changes made for this version of the patch?

Thanks,

William Breathitt Gray

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v5 1/8] dt-bindings: counter: Add new ti,am62-eqep compatible

[Krzysztof Kozlowski]

On 27/06/2024 00:42, William Breathitt Gray wrote:
> On Wed, Jun 12, 2024 at 08:55:31AM -0500, Judith Mendez wrote:
>> Add new compatible ti,am62-eqep for TI K3 devices. If a device
>> uses this compatible, require power-domains property.
>>
>> Since there is only one functional and interface clock for eqep,
>> clock-names is not really required, so removed from required
>> section, make it optional for ti,am3352-eqep compatible, and
>> update the example.
>>
>> The clock-name also changed for TI K3 SoCs so do not allow
>> clock-names property for the new compatible.
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>> Reviewed-by: David Lechner <david@lechnology.com>
>> ---
>> Changes since v4:
>> - Drop the new example from binding
>> ---
> 
> Hi Krzysztof,
> 
> Are you satisfied with the changes made for this version of the patch?

I did not check, because it already has an Ack from Conor. I am usually
not double-acking, but FWIW:

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v5 0/8] Enable eQEP DT support for Sitara K3 platforms

[William Breathitt Gray]

On Wed, 12 Jun 2024 08:55:30 -0500, Judith Mendez wrote:
> This patch series adds eQEP DT nodes for K3 Sitara devices:
> - AM62x
> - AM62ax
> - AM62px
> - AM64x
> 
> The series also allows the eQEP driver to be built for K3
> architecture.
> 
> [...]

Applied, thanks!

[1/8] dt-bindings: counter: Add new ti,am62-eqep compatible
      commit: 151ebcf0797b1a3ba53c8843dc21748c80e098c7
[2/8] counter/ti-eqep: Add new ti-am62-eqep compatible
      commit: 210457b651acd61fced405cf7fef12a482932ca1
[3/8] arm64: dts: ti: k3-am62-main: Add eQEP nodes
      commit: e2e1fce199b0db4fd4eba99ff6ef779826a55731
[4/8] arm64: dts: ti: k3-am62a-main: Add eQEP nodes
      commit: ba5a251b1d539a82970823dd510ee25be06d6ca7
[5/8] arm64: dts: ti: k3-am62p-main: Add eQEP nodes
      commit: 131eaf47c4c5ad444e3a0547960daacd3a40f82d
[6/8] arm64: dts: ti: k3-am64-main: Add eQEP nodes
      commit: afdfe6439a6d28a3062d576705b203da0857699f
[7/8] arm64: dts: ti: k3-am64x-sk: Enable eQEP
      commit: 7fb9d8854fcf23b7882a34a4cf247a7f60d02fef
[8/8] counter: ti-eqep: Allow eQEP driver to be built for K3 devices
      commit: 474bbfc637c719daebffb5cabcf914dd749cf393

Best regards,
-- 
William Breathitt Gray <wbg@kernel.org>