From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Manna, Animesh" <animesh.manna@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 09/14] drm/i915/dsb: Introduce intel_dsb_wait_scanline_{in, out}()
Date: Wed, 3 Jul 2024 15:10:00 +0300 [thread overview]
Message-ID: <ZoU_mFGYoi4yYPKo@intel.com> (raw)
In-Reply-To: <ZoU-6IcMrtXa3FC_@intel.com>
On Wed, Jul 03, 2024 at 03:07:04PM +0300, Ville Syrjälä wrote:
> On Wed, Jul 03, 2024 at 11:37:33AM +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> > > Syrjala
> > > Sent: Tuesday, June 25, 2024 12:40 AM
> > > To: intel-gfx@lists.freedesktop.org
> > > Subject: [PATCH 09/14] drm/i915/dsb: Introduce
> > > intel_dsb_wait_scanline_{in, out}()
> > >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Add functions to emit a DSB scanline window wait instructions.
> > > We can either wait for the scanline to be IN the window or OUT of the
> > > window.
> > >
> > > The hardware doesn't handle wraparound so we must manually deal with it
> > > by swapping the IN range to the inverse OUT range, or vice versa.
> > >
> > > Also add a bit of paranoia to catch the edge case of waiting for the entire
> > > frame. That doesn't make sense since an IN wait would be a nop, and an
> > > OUT wait would imply waiting forever. Most of the time this also results in
> > > both scanline ranges (original and inverted) to have lower=upper+1 which is
> > > nonsense from the hw POV.
> > >
> > > For now we are only handling the case where the scanline wait happens prior
> > > to latching the double buffered registers during the commit (which might
> > > change the timings due to LRR/VRR/etc.)
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dsb.c | 73 ++++++++++++++++++++++++
> > > drivers/gpu/drm/i915/display/intel_dsb.h | 6 ++
> > > 2 files changed, 79 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > index 81937908c798..092cf082ac39 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > @@ -362,6 +362,79 @@ void intel_dsb_nonpost_end(struct intel_dsb *dsb)
> > > intel_dsb_noop(dsb, 4);
> > > }
> > >
> > > +static void intel_dsb_emit_wait_dsl(struct intel_dsb *dsb,
> > > + u32 opcode, int lower, int upper) {
> > > + u64 window = ((u64)upper << DSB_SCANLINE_UPPER_SHIFT) |
> > > + ((u64)lower << DSB_SCANLINE_LOWER_SHIFT);
> > > +
> > > + intel_dsb_emit(dsb, lower_32_bits(window),
> > > + (opcode << DSB_OPCODE_SHIFT) |
> > > + upper_32_bits(window));
> > > +}
> > > +
> > > +static void intel_dsb_wait_dsl(struct intel_atomic_state *state,
> > > + struct intel_dsb *dsb,
> > > + int lower_in, int upper_in,
> >
> > Lower/upper keyword maybe confusing for during intel_dsb_wait_scanline_out(), maybe good to have name like in_start and in_end, similarly out_start and out_end.
>
> lower/upper are what bspec calls them. I decided to stick to that
> terminology in lower level parts of the code where we actually
> deal with hw units. I used start/end in the user facing api to
> make it a bit clearer that having start > end is perfectly
> valid.
I suppose one could argue intel_dsb_wait_dsl() should still
use the start/end terminology as the input are not yet
in hw units. Shrug.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2024-07-03 12:10 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-24 19:10 [PATCH 00/14] drm/i915/dsb: Use chained DSBs for LUT programming Ville Syrjala
2024-06-24 19:10 ` [PATCH 01/14] drm/i915: Calculate vblank delay more accurately Ville Syrjala
2024-06-28 8:16 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 02/14] drm/i915: Make vrr_{enabling, disabling}() usable outside intel_display.c Ville Syrjala
2024-06-28 8:18 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 03/14] drm/i915/dsb: Hook up DSB error interrupts Ville Syrjala
2024-06-25 7:58 ` Jani Nikula
2024-06-25 13:58 ` [PATCH v2 " Ville Syrjala
2024-08-27 14:10 ` Manna, Animesh
2024-06-28 9:21 ` [PATCH " Manna, Animesh
2024-06-28 11:04 ` Ville Syrjälä
2024-06-24 19:10 ` [PATCH 04/14] drm/i915/dsb: Convert dewake_scanline to a hw scanline number earlier Ville Syrjala
2024-06-24 19:10 ` [PATCH 05/14] drm/i915/dsb: Shuffle code around Ville Syrjala
2024-07-03 5:49 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 06/14] drm/i915/dsb: Fix dewake scanline Ville Syrjala
2024-07-03 5:59 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 07/14] drm/i915/dsb: Account for VRR properly in DSB scanline stuff Ville Syrjala
2024-07-03 8:23 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 08/14] drm/i915/dsb: Precompute DSB_CHICKEN Ville Syrjala
2024-07-03 8:48 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 09/14] drm/i915/dsb: Introduce intel_dsb_wait_scanline_{in, out}() Ville Syrjala
2024-07-03 11:37 ` Manna, Animesh
2024-07-03 12:07 ` Ville Syrjälä
2024-07-03 12:10 ` Ville Syrjälä [this message]
2024-08-27 6:30 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 10/14] drm/i915/dsb: Introduce intel_dsb_chain() Ville Syrjala
2024-07-03 12:10 ` Manna, Animesh
2024-07-03 12:20 ` Ville Syrjälä
2024-08-21 15:05 ` Manna, Animesh
2024-08-23 12:45 ` Ville Syrjälä
2024-08-27 6:19 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 11/14] drm/i915/dsb: Allow intel_dsb_chain() to use DSB_WAIT_FOR_VBLANK Ville Syrjala
2024-07-05 15:58 ` Manna, Animesh
2024-07-05 16:09 ` Manna, Animesh
2024-07-05 17:36 ` Ville Syrjälä
2024-07-05 17:39 ` Ville Syrjälä
2024-08-21 14:58 ` Manna, Animesh
2024-08-23 12:44 ` Ville Syrjälä
2024-08-27 6:23 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 12/14] drm/i915/dsb: Clear DSB_ENABLE_DEWAKE once the DSB is done Ville Syrjala
2024-07-05 17:26 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 13/14] drm/i915/dsb: s/dsb/dsb_color_vblank/ Ville Syrjala
2024-07-05 17:28 ` Manna, Animesh
2024-06-24 19:10 ` [PATCH 14/14] drm/i915/dsb: Use chained DSBs for LUT programming Ville Syrjala
2024-08-27 6:25 ` Manna, Animesh
2024-06-24 19:54 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2024-06-24 19:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-24 20:01 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-25 14:42 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsb: Use chained DSBs for LUT programming (rev2) Patchwork
2024-06-25 14:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-25 14:55 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-26 2:30 ` ✗ Fi.CI.IGT: failure for drm/i915/dsb: Use chained DSBs for LUT programming Patchwork
2024-06-26 9:57 ` ✗ Fi.CI.IGT: failure for drm/i915/dsb: Use chained DSBs for LUT programming (rev2) Patchwork
2024-08-28 12:06 ` ✗ Fi.CI.BUILD: warning for drm/i915/dsb: Use chained DSBs for LUT programming (rev3) Patchwork
2024-08-28 12:06 ` ✗ Fi.CI.CHECKPATCH: " Patchwork
2024-08-28 12:07 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-08-28 12:27 ` ✓ Fi.CI.BAT: success " Patchwork
2024-08-29 8:56 ` ✗ Fi.CI.IGT: failure " Patchwork
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