* [PATCH 1/4] dt-bindings: arm: qcom: Add Surface Laptop 7 devices
2024-08-09 1:43 [PATCH 0/4] X1E Surface Laptop 7 support Konrad Dybcio
@ 2024-08-09 1:43 ` Konrad Dybcio
2024-08-09 6:11 ` Krzysztof Kozlowski
2024-08-09 1:43 ` [PATCH 2/4] firmware: qcom: scm: Allow QSEECOM on Surface Laptop 7 models Konrad Dybcio
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 1:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
From: Konrad Dybcio <quic_kdybcio@quicinc.com>
Document the X1E80100-based Microsoft laptops.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 4ef456cefd6c..686f44d82cf5 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1052,6 +1052,8 @@ properties:
- enum:
- asus,vivobook-s15
- lenovo,yoga-slim7x
+ - microsoft,romulus13
+ - microsoft,romulus15
- qcom,x1e80100-crd
- qcom,x1e80100-qcp
- const: qcom,x1e80100
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] dt-bindings: arm: qcom: Add Surface Laptop 7 devices
2024-08-09 1:43 ` [PATCH 1/4] dt-bindings: arm: qcom: Add Surface Laptop 7 devices Konrad Dybcio
@ 2024-08-09 6:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2024-08-09 6:11 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On 09/08/2024 03:43, Konrad Dybcio wrote:
> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
>
> Document the X1E80100-based Microsoft laptops.
>
> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
> ---
> Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/4] firmware: qcom: scm: Allow QSEECOM on Surface Laptop 7 models
2024-08-09 1:43 [PATCH 0/4] X1E Surface Laptop 7 support Konrad Dybcio
2024-08-09 1:43 ` [PATCH 1/4] dt-bindings: arm: qcom: Add Surface Laptop 7 devices Konrad Dybcio
@ 2024-08-09 1:43 ` Konrad Dybcio
2024-08-09 1:43 ` [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2 Konrad Dybcio
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 1:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
From: Konrad Dybcio <quic_kdybcio@quicinc.com>
Add the aforementioned machines to the list to get e.g. efivars up.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
---
drivers/firmware/qcom/qcom_scm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index e60bef68401c..2c39ae1e840d 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -1726,6 +1726,8 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = {
{ .compatible = "lenovo,flex-5g" },
{ .compatible = "lenovo,thinkpad-t14s" },
{ .compatible = "lenovo,thinkpad-x13s", },
+ { .compatible = "microsoft,romulus13", },
+ { .compatible = "microsoft,romulus15", },
{ .compatible = "qcom,sc8180x-primus" },
{ .compatible = "qcom,x1e80100-crd" },
{ .compatible = "qcom,x1e80100-qcp" },
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2
2024-08-09 1:43 [PATCH 0/4] X1E Surface Laptop 7 support Konrad Dybcio
2024-08-09 1:43 ` [PATCH 1/4] dt-bindings: arm: qcom: Add Surface Laptop 7 devices Konrad Dybcio
2024-08-09 1:43 ` [PATCH 2/4] firmware: qcom: scm: Allow QSEECOM on Surface Laptop 7 models Konrad Dybcio
@ 2024-08-09 1:43 ` Konrad Dybcio
2024-08-09 8:41 ` Stephan Gerhold
2024-08-09 1:43 ` [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices Konrad Dybcio
2024-08-12 15:09 ` [PATCH 0/4] X1E Surface Laptop 7 support Rob Herring (Arm)
4 siblings, 1 reply; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 1:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
From: Konrad Dybcio <quic_kdybcio@quicinc.com>
GENI SE2 within QUP0 is used as UART on some devices, describe it.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 52 ++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 326283822aee..a2a011702752 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2142,6 +2142,28 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
status = "disabled";
};
+ uart2: serial@b88000 {
+ compatible = "qcom,geni-uart";
+ reg = <0 0x00b88000 0 0x4000>;
+
+ interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+ clock-names = "se";
+
+ interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
+ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "qup-core",
+ "qup-config";
+
+ pinctrl-0 = <&qup_uart2_default>;
+ pinctrl-names = "default";
+
+ status = "disabled";
+ };
+
spi2: spi@b88000 {
compatible = "qcom,geni-spi";
reg = <0 0x00b88000 0 0x4000>;
@@ -5365,6 +5387,36 @@ qup_spi23_data_clk: qup-spi23-data-clk-state {
bias-disable;
};
+ qup_uart2_default: qup-uart2-default-state {
+ cts-pins {
+ pins = "gpio8";
+ function = "qup0_se2";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rts-pins {
+ pins = "gpio9";
+ function = "qup0_se2";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tx-pins {
+ pins = "gpio10";
+ function = "qup0_se2";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx-pins {
+ pins = "gpio11";
+ function = "qup0_se2";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
qup_uart21_default: qup-uart21-default-state {
/* TX, RX */
pins = "gpio86", "gpio87";
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2
2024-08-09 1:43 ` [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2 Konrad Dybcio
@ 2024-08-09 8:41 ` Stephan Gerhold
2024-08-09 10:24 ` Konrad Dybcio
0 siblings, 1 reply; 12+ messages in thread
From: Stephan Gerhold @ 2024-08-09 8:41 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On Fri, Aug 09, 2024 at 03:43:22AM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
>
> GENI SE2 within QUP0 is used as UART on some devices, describe it.
>
> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 52 ++++++++++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 326283822aee..a2a011702752 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2142,6 +2142,28 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
> status = "disabled";
> };
>
> + uart2: serial@b88000 {
> + compatible = "qcom,geni-uart";
> + reg = <0 0x00b88000 0 0x4000>;
> +
> + interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
> + clock-names = "se";
> +
> + interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
> + &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
> + &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "qup-core",
> + "qup-config";
> +
> + pinctrl-0 = <&qup_uart2_default>;
> + pinctrl-names = "default";
> +
> + status = "disabled";
> + };
> +
> spi2: spi@b88000 {
> compatible = "qcom,geni-spi";
> reg = <0 0x00b88000 0 0x4000>;
> @@ -5365,6 +5387,36 @@ qup_spi23_data_clk: qup-spi23-data-clk-state {
> bias-disable;
> };
>
> + qup_uart2_default: qup-uart2-default-state {
> + cts-pins {
> + pins = "gpio8";
> + function = "qup0_se2";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + rts-pins {
> + pins = "gpio9";
> + function = "qup0_se2";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + tx-pins {
> + pins = "gpio10";
> + function = "qup0_se2";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + rx-pins {
> + pins = "gpio11";
> + function = "qup0_se2";
> + drive-strength = <2>;
> + bias-disable;
> + };
Can you combine these into a single entry, i.e.
pins = "gpio8", "gpio9", "gpio10", "gpio11";
if they are all the same?
Thanks,
Stephan
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2
2024-08-09 8:41 ` Stephan Gerhold
@ 2024-08-09 10:24 ` Konrad Dybcio
2024-08-09 10:27 ` Stephan Gerhold
0 siblings, 1 reply; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 10:24 UTC (permalink / raw)
To: Stephan Gerhold, Konrad Dybcio
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On 9.08.2024 10:41 AM, Stephan Gerhold wrote:
> On Fri, Aug 09, 2024 at 03:43:22AM +0200, Konrad Dybcio wrote:
>> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
>>
>> GENI SE2 within QUP0 is used as UART on some devices, describe it.
>>
>> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
>> ---
[...]
>
> Can you combine these into a single entry, i.e.
>
> pins = "gpio8", "gpio9", "gpio10", "gpio11";
>
> if they are all the same?
Keeping it as-is gives us
a) better hw description
b) an easier ability to add a label and change e.g. the bias
Konrad
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2
2024-08-09 10:24 ` Konrad Dybcio
@ 2024-08-09 10:27 ` Stephan Gerhold
0 siblings, 0 replies; 12+ messages in thread
From: Stephan Gerhold @ 2024-08-09 10:27 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Marijn Suijten, linux-arm-msm, devicetree,
linux-kernel, Konrad Dybcio
On Fri, Aug 09, 2024 at 12:24:03PM +0200, Konrad Dybcio wrote:
> On 9.08.2024 10:41 AM, Stephan Gerhold wrote:
> > On Fri, Aug 09, 2024 at 03:43:22AM +0200, Konrad Dybcio wrote:
> >> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
> >>
> >> GENI SE2 within QUP0 is used as UART on some devices, describe it.
> >>
> >> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
> >> ---
>
> [...]
>
> >
> > Can you combine these into a single entry, i.e.
> >
> > pins = "gpio8", "gpio9", "gpio10", "gpio11";
> >
> > if they are all the same?
>
> Keeping it as-is gives us
>
> a) better hw description
> b) an easier ability to add a label and change e.g. the bias
>
Ok, but it's inconsistent with what we have for qup_uart21_default right
now. I think you should either change that as well, or follow the same
pattern. :-)
Thanks,
Stephan
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices
2024-08-09 1:43 [PATCH 0/4] X1E Surface Laptop 7 support Konrad Dybcio
` (2 preceding siblings ...)
2024-08-09 1:43 ` [PATCH 3/4] arm64: dts: qcom: x1e80100: Add UART2 Konrad Dybcio
@ 2024-08-09 1:43 ` Konrad Dybcio
2024-08-09 9:07 ` Stephan Gerhold
2024-08-12 15:09 ` [PATCH 0/4] X1E Surface Laptop 7 support Rob Herring (Arm)
4 siblings, 1 reply; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 1:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
From: Konrad Dybcio <quic_kdybcio@quicinc.com>
Add support for Surface Laptop 7 machines, based on X1E80100.
The feature status is mostly on par with other X Elite machines,
notably lacking:
- USB-A and probably USB-over-Surface-connector
- SD card reader (Realtek RTS5261 connected over PCIe)
- Touchscreen and touchpad support (hid-over-SPI [1])
- Keyboard support (low-hanging fruit, works with pending Surface EC
changes)
- Audio (a quick look suggests the setup is very close to the one in
X1E CRD)
The two Surface Laptop 7 SKUs (13.8" and 15") only have very minor
differences, amounting close to none on the software side. Even the
MBN firmware files and ACPI tables are shared between the two machines.
With that in mind, support is added for both, although only the larger
one was physically tested. Display differences will be taken care of
through fused-in EDID and other matters should be solved within the
EC and boot firmware.
[1] https://www.microsoft.com/en-us/download/details.aspx?id=103325
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
---
arch/arm64/boot/dts/qcom/Makefile | 2 +
.../boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 818 +++++++++++++++++++++
.../boot/dts/qcom/x1e80100-microsoft-romulus13.dts | 13 +
.../boot/dts/qcom/x1e80100-microsoft-romulus15.dts | 13 +
arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 8 +
5 files changed, 854 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index e534442620a1..820b768cdb71 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -270,4 +270,6 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-lenovo-yoga-slim7x.dtb
+dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus13.dtb
+dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus15.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
new file mode 100644
index 000000000000..3f6d4b93db50
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
@@ -0,0 +1,818 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+
+#include "x1e80100.dtsi"
+#include "x1e80100-pmics.dtsi"
+
+/ {
+ aliases {
+ serial0 = &uart2;
+ i2c0 = &i2c0;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c7 = &i2c7;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pmk8550_pwm 0 5000000>;
+ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
+ /* TODO: power-supply? */
+
+ pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
+ pinctrl-names = "default";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam_indicator_en>;
+
+ led-camera-indicator {
+ label = "white:camera-indicator";
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&tlmm 225 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ /* Reuse as a panic indicator until we get a "camera on" trigger */
+ panic-indicator;
+ };
+ };
+
+ pmic-glink {
+ compatible = "qcom,x1e80100-pmic-glink",
+ "qcom,sm8550-pmic-glink",
+ "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
+ <&tlmm 123 GPIO_ACTIVE_HIGH>;
+
+ /* Left-side rear port */
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss0_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss0_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ /* Left-side front port */
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss1_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss1_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
+ };
+ };
+ };
+ };
+ };
+
+ reserved-memory {
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x8000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vreg_edp_3p3: regulator-edp-3p3 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VREG_EDP_3P3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-0 = <&edp_reg_en>;
+ pinctrl-names = "default";
+
+ regulator-boot-on;
+ };
+
+ vreg_nvme: regulator-nvme {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VREG_NVME_3P3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-0 = <&nvme_reg_en>;
+ pinctrl-names = "default";
+ };
+};
+
+&apps_rsc {
+ regulators-0 {
+ compatible = "qcom,pm8550-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ vdd-bob1-supply = <&vph_pwr>;
+ vdd-bob2-supply = <&vph_pwr>;
+ vdd-l1-l4-l10-supply = <&vreg_s4c>;
+ vdd-l2-l13-l14-supply = <&vreg_bob1>;
+ vdd-l5-l16-supply = <&vreg_bob1>;
+ vdd-l6-l7-supply = <&vreg_bob2>;
+ vdd-l8-l9-supply = <&vreg_bob1>;
+ vdd-l12-supply = <&vreg_s5j>;
+ vdd-l15-supply = <&vreg_s4c>;
+ vdd-l17-supply = <&vreg_bob2>;
+
+ vreg_bob1: bob1 {
+ regulator-name = "vreg_bob1";
+ regulator-min-microvolt = <3008000>;
+ regulator-max-microvolt = <3960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob2: bob2 {
+ regulator-name = "vreg_bob2";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <3008000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1b: ldo1 {
+ regulator-name = "vreg_l1b";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2b: ldo2 {
+ regulator-name = "vreg_l2b";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l4b: ldo4 {
+ regulator-name = "vreg_l4b";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5b: ldo5 {
+ regulator-name = "vreg_l5b";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l6b: ldo6 {
+ regulator-name = "vreg_l6b";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7b: ldo7 {
+ regulator-name = "vreg_l7b";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8b: ldo8 {
+ regulator-name = "vreg_l8b";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9b: ldo9 {
+ regulator-name = "vreg_l9b";
+ regulator-min-microvolt = <2960000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10b: ldo10 {
+ regulator-name = "vreg_l10b";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12b: ldo12 {
+ regulator-name = "vreg_l12b";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l13b: ldo13 {
+ regulator-name = "vreg_l13b";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l14b: ldo14 {
+ regulator-name = "vreg_l14b";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l15b: ldo15 {
+ regulator-name = "vreg_l15b";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l16b: ldo16 {
+ regulator-name = "vreg_l16b";
+ regulator-min-microvolt = <2912000>;
+ regulator-max-microvolt = <2912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l17b: ldo17 {
+ regulator-name = "vreg_l17b";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2504000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-l1-supply = <&vreg_s5j>;
+ vdd-l2-supply = <&vreg_s1f>;
+ vdd-l3-supply = <&vreg_s1f>;
+ vdd-s4-supply = <&vph_pwr>;
+
+ vreg_s4c: smps4 {
+ regulator-name = "vreg_s4c";
+ regulator-min-microvolt = <1856000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1c: ldo1 {
+ regulator-name = "vreg_l1c";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2c: ldo2 {
+ regulator-name = "vreg_l2c";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3c: ldo3 {
+ regulator-name = "vreg_l3c";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-2 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "d";
+
+ vdd-l1-supply = <&vreg_s1f>;
+ vdd-l2-supply = <&vreg_s1f>;
+ vdd-l3-supply = <&vreg_s4c>;
+ vdd-s1-supply = <&vph_pwr>;
+
+ vreg_l1d: ldo1 {
+ regulator-name = "vreg_l1d";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2d: ldo2 {
+ regulator-name = "vreg_l2d";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3d: ldo3 {
+ regulator-name = "vreg_l3d";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-3 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-l2-supply = <&vreg_s1f>;
+ vdd-l3-supply = <&vreg_s5j>;
+
+ vreg_l2e: ldo2 {
+ regulator-name = "vreg_l2e";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3e: ldo3 {
+ regulator-name = "vreg_l3e";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-4 {
+ compatible = "qcom,pmc8380-rpmh-regulators";
+ qcom,pmic-id = "f";
+
+ vdd-l1-supply = <&vreg_s5j>;
+ vdd-l2-supply = <&vreg_s5j>;
+ vdd-l3-supply = <&vreg_s5j>;
+ vdd-s1-supply = <&vph_pwr>;
+
+ vreg_s1f: smps1 {
+ regulator-name = "vreg_s1f";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1f: ldo1 {
+ regulator-name = "vreg_l1f";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2f: ldo2 {
+ regulator-name = "vreg_l2f";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3f: ldo3 {
+ regulator-name = "vreg_l3f";
+ regulator-min-microvolt = <1024000>;
+ regulator-max-microvolt = <1024000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-6 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "i";
+
+ vdd-l1-supply = <&vreg_s4c>;
+ vdd-l2-supply = <&vreg_s5j>;
+ vdd-l3-supply = <&vreg_s1f>;
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+
+ vreg_s1i: smps1 {
+ regulator-name = "vreg_s1i";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s2i: smps2 {
+ regulator-name = "vreg_s2i";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1i: ldo1 {
+ regulator-name = "vreg_l1i";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2i: ldo2 {
+ regulator-name = "vreg_l2i";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3i: ldo3 {
+ regulator-name = "vreg_l3i";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-7 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "j";
+
+ vdd-l1-supply = <&vreg_s1f>;
+ vdd-l2-supply = <&vreg_s5j>;
+ vdd-l3-supply = <&vreg_s1f>;
+ vdd-s5-supply = <&vph_pwr>;
+
+ vreg_s5j: smps5 {
+ regulator-name = "vreg_s5j";
+ regulator-min-microvolt = <1256000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1j: ldo1 {
+ regulator-name = "vreg_l1j";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2j: ldo2 {
+ regulator-name = "vreg_l2j";
+ regulator-min-microvolt = <1256000>;
+ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3j: ldo3 {
+ regulator-name = "vreg_l3j";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_microcode_mem>;
+ firmware-name = "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn";
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+
+ status = "okay";
+
+ /* Something @39, @3e, @44 */
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ /* PS8830 USB retimer @8 */
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ /* Something @18, @2c, @2e */
+};
+
+&i2c5 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ /* Something @4f */
+};
+
+&i2c7 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ /* PS8830 USB retimer @8 */
+};
+
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dp3 {
+ compatible = "qcom,x1e80100-dp";
+ /delete-property/ #sound-dai-cells;
+
+ status = "okay";
+
+ aux-bus {
+ panel {
+ compatible = "edp-panel";
+
+ backlight = <&backlight>;
+ power-supply = <&vreg_edp_3p3>;
+
+ port {
+ edp_panel_in: endpoint {
+ remote-endpoint = <&mdss_dp3_out>;
+ };
+ };
+ };
+ };
+
+ ports {
+ port@1 {
+ reg = <1>;
+
+ mdss_dp3_out: endpoint {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+
+ remote-endpoint = <&edp_panel_in>;
+ };
+ };
+ };
+};
+
+&mdss_dp3_phy {
+ vdda-phy-supply = <&vreg_l3j>;
+ vdda-pll-supply = <&vreg_l2j>;
+
+ status = "okay";
+};
+
+&pcie4 {
+ status = "okay";
+};
+
+&pcie4_phy {
+ vdda-phy-supply = <&vreg_l3i>;
+ vdda-pll-supply = <&vreg_l3e>;
+
+ status = "okay";
+};
+
+&pcie6a {
+ perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+
+ vddpe-3v3-supply = <&vreg_nvme>;
+
+ pinctrl-0 = <&pcie6a_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie6a_phy {
+ vdda-phy-supply = <&vreg_l1d>;
+ vdda-pll-supply = <&vreg_l2j>;
+
+ status = "okay";
+};
+
+&pmc8380_3_gpios {
+ edp_bl_en: edp-bl-en-state {
+ pins = "gpio4";
+ function = "normal";
+ power-source = <1>; /* 1.8V */
+ input-disable;
+ output-enable;
+ };
+};
+
+&pmk8550_pwm {
+ status = "okay";
+};
+
+&pmk8550_gpios {
+ edp_bl_pwm: edp-bl-pwm-state {
+ pins = "gpio5";
+ function = "func3";
+ };
+};
+
+&qupv3_0 {
+ status = "okay";
+};
+
+&qupv3_1 {
+ status = "okay";
+};
+
+&qupv3_2 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/x1e80100/microsoft/Romulus/qcadsp8380.mbn",
+ "qcom/x1e80100/microsoft/Romulus/adsp_dtb.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/x1e80100/microsoft/Romulus/qccdsp8380.mbn",
+ "qcom/x1e80100/microsoft/Romulus/cdsp_dtb.mbn";
+
+ status = "okay";
+};
+
+&smb2360_0_eusb2_repeater {
+ vdd18-supply = <&vreg_l3d>;
+ vdd3-supply = <&vreg_l2b>;
+};
+
+&smb2360_1_eusb2_repeater {
+ vdd18-supply = <&vreg_l3d>;
+ vdd3-supply = <&vreg_l14b>;
+};
+
+&tlmm {
+ gpio-reserved-ranges = <44 4>, /* SPI (TPM) */
+ <238 1>; /* UFS Reset */
+
+ nvme_reg_en: nvme-reg-en-state {
+ pins = "gpio18";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ edp_reg_en: edp-reg-en-state {
+ pins = "gpio70";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ pcie6a_default: pcie6a-default-state {
+ perst-n-pins {
+ pins = "gpio152";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ clkreq-n-pins {
+ pins = "gpio153";
+ function = "pcie6a_clk";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ wake-n-pins {
+ pins = "gpio154";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ cam_indicator_en: cam-indicator-en-state {
+ pins = "gpio225";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_1_ss0_hsphy {
+ vdd-supply = <&vreg_l3j>;
+ vdda12-supply = <&vreg_l2j>;
+
+ phys = <&smb2360_0_eusb2_repeater>;
+
+ status = "okay";
+};
+
+&usb_1_ss0_qmpphy {
+ vdda-phy-supply = <&vreg_l3e>;
+ vdda-pll-supply = <&vreg_l1j>;
+
+ status = "okay";
+};
+
+&usb_1_ss0 {
+ status = "okay";
+};
+
+&usb_1_ss0_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_1_ss0_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss0_hs_in>;
+};
+
+&usb_1_ss0_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss0_ss_in>;
+};
+
+&usb_1_ss1_hsphy {
+ vdd-supply = <&vreg_l3j>;
+ vdda12-supply = <&vreg_l2j>;
+
+ phys = <&smb2360_1_eusb2_repeater>;
+
+ status = "okay";
+};
+
+&usb_1_ss1_qmpphy {
+ vdda-phy-supply = <&vreg_l3e>;
+ vdda-pll-supply = <&vreg_l2d>;
+
+ status = "okay";
+};
+
+&usb_1_ss1 {
+ status = "okay";
+};
+
+&usb_1_ss1_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_1_ss1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss1_hs_in>;
+};
+
+&usb_1_ss1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss1_ss_in>;
+};
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dts b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dts
new file mode 100644
index 000000000000..eb7580dd9684
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "x1e80100-microsoft-romulus.dtsi"
+
+/ {
+ model = "Microsoft Surface Laptop 7 (13.8 inch)";
+ compatible = "microsoft,romulus13", "qcom,x1e80100";
+};
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dts b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dts
new file mode 100644
index 000000000000..4751ad9b510b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "x1e80100-microsoft-romulus.dtsi"
+
+/ {
+ model = "Microsoft Surface Laptop 7 (15 inch)";
+ compatible = "microsoft,romulus15", "qcom,x1e80100";
+};
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
index a5ca0fa4e5ae..5b54ee79f048 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
@@ -249,6 +249,14 @@ pmk8550_gpios: gpio@8800 {
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ pmk8550_pwm: pwm {
+ compatible = "qcom,pmk8550-pwm";
+
+ #pwm-cells = <2>;
+
+ status = "disabled";
+ };
};
/* PMC8380C */
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices
2024-08-09 1:43 ` [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices Konrad Dybcio
@ 2024-08-09 9:07 ` Stephan Gerhold
2024-08-09 10:22 ` Konrad Dybcio
0 siblings, 1 reply; 12+ messages in thread
From: Stephan Gerhold @ 2024-08-09 9:07 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On Fri, Aug 09, 2024 at 03:43:23AM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
>
> Add support for Surface Laptop 7 machines, based on X1E80100.
>
> The feature status is mostly on par with other X Elite machines,
> notably lacking:
>
> - USB-A and probably USB-over-Surface-connector
> - SD card reader (Realtek RTS5261 connected over PCIe)
> - Touchscreen and touchpad support (hid-over-SPI [1])
> - Keyboard support (low-hanging fruit, works with pending Surface EC
> changes)
> - Audio (a quick look suggests the setup is very close to the one in
> X1E CRD)
>
> The two Surface Laptop 7 SKUs (13.8" and 15") only have very minor
> differences, amounting close to none on the software side. Even the
> MBN firmware files and ACPI tables are shared between the two machines.
>
> With that in mind, support is added for both, although only the larger
> one was physically tested. Display differences will be taken care of
> through fused-in EDID and other matters should be solved within the
> EC and boot firmware.
>
> [1] https://www.microsoft.com/en-us/download/details.aspx?id=103325
>
> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 2 +
> .../boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 818 +++++++++++++++++++++
> .../boot/dts/qcom/x1e80100-microsoft-romulus13.dts | 13 +
> .../boot/dts/qcom/x1e80100-microsoft-romulus15.dts | 13 +
> arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 8 +
> 5 files changed, 854 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index e534442620a1..820b768cdb71 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -270,4 +270,6 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-lenovo-yoga-slim7x.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus13.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += x1e80100-microsoft-romulus15.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
> new file mode 100644
> index 000000000000..3f6d4b93db50
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
> @@ -0,0 +1,818 @@
> [...]
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pmk8550_pwm 0 5000000>;
> + enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
> + /* TODO: power-supply? */
There seems to be something at <&pmc8380_3_gpios 10>, any idea what?
> [...]
> +&pmk8550_gpios {
> + edp_bl_pwm: edp-bl-pwm-state {
> + pins = "gpio5";
> + function = "func3";
Can you add the power-source here to make this more complete?
> + };
> +
> [...]
> +
> +&uart2 {
> + status = "okay";
> +};
Any idea what this UART is used for?
> [...]
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
> index a5ca0fa4e5ae..5b54ee79f048 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
> @@ -249,6 +249,14 @@ pmk8550_gpios: gpio@8800 {
> interrupt-controller;
> #interrupt-cells = <2>;
> };
> +
> + pmk8550_pwm: pwm {
> + compatible = "qcom,pmk8550-pwm";
> +
> + #pwm-cells = <2>;
> +
> + status = "disabled";
> + };
I don't mind personally but usually we would have this non-device
addition in a separate patch. :-)
Thanks,
Stephan
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices
2024-08-09 9:07 ` Stephan Gerhold
@ 2024-08-09 10:22 ` Konrad Dybcio
0 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2024-08-09 10:22 UTC (permalink / raw)
To: Stephan Gerhold
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On 9.08.2024 11:07 AM, Stephan Gerhold wrote:
> On Fri, Aug 09, 2024 at 03:43:23AM +0200, Konrad Dybcio wrote:
>> From: Konrad Dybcio <quic_kdybcio@quicinc.com>
>>
>> Add support for Surface Laptop 7 machines, based on X1E80100.
>>
>> The feature status is mostly on par with other X Elite machines,
>> notably lacking:
>>
>> - USB-A and probably USB-over-Surface-connector
>> - SD card reader (Realtek RTS5261 connected over PCIe)
>> - Touchscreen and touchpad support (hid-over-SPI [1])
>> - Keyboard support (low-hanging fruit, works with pending Surface EC
>> changes)
>> - Audio (a quick look suggests the setup is very close to the one in
>> X1E CRD)
>>
>> The two Surface Laptop 7 SKUs (13.8" and 15") only have very minor
>> differences, amounting close to none on the software side. Even the
>> MBN firmware files and ACPI tables are shared between the two machines.
>>
>> With that in mind, support is added for both, although only the larger
>> one was physically tested. Display differences will be taken care of
>> through fused-in EDID and other matters should be solved within the
>> EC and boot firmware.
>>
>> [1] https://www.microsoft.com/en-us/download/details.aspx?id=103325
>>
>> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
>> ---
[...]
>> + backlight: backlight {
>> + compatible = "pwm-backlight";
>> + pwms = <&pmk8550_pwm 0 5000000>;
>> + enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
>> + /* TODO: power-supply? */
>
> There seems to be something at <&pmc8380_3_gpios 10>, any idea what?
Yeah I looked at it, but switching it hi/lo made absolutely no difference
>
>> [...]
>> +&pmk8550_gpios {
>> + edp_bl_pwm: edp-bl-pwm-state {
>> + pins = "gpio5";
>> + function = "func3";
>
> Can you add the power-source here to make this more complete?
The bootloader leaves it with power-source = <1>, I'll add it..
>
>> + };
>> +
>> [...]
>> +
>> +&uart2 {
>> + status = "okay";
>> +};
>
> Any idea what this UART is used for?
The EC :) Since I believe the required patches will get in promptly,
(and had to tear down my tree into something submittable), I didn't
add a comment here..
>
>> [...]
>> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
>> index a5ca0fa4e5ae..5b54ee79f048 100644
>> --- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi
>> @@ -249,6 +249,14 @@ pmk8550_gpios: gpio@8800 {
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> };
>> +
>> + pmk8550_pwm: pwm {
>> + compatible = "qcom,pmk8550-pwm";
>> +
>> + #pwm-cells = <2>;
>> +
>> + status = "disabled";
>> + };
>
> I don't mind personally but usually we would have this non-device
> addition in a separate patch. :-)
Yeah I can do that
Konrad
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] X1E Surface Laptop 7 support
2024-08-09 1:43 [PATCH 0/4] X1E Surface Laptop 7 support Konrad Dybcio
` (3 preceding siblings ...)
2024-08-09 1:43 ` [PATCH 4/4] arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices Konrad Dybcio
@ 2024-08-12 15:09 ` Rob Herring (Arm)
4 siblings, 0 replies; 12+ messages in thread
From: Rob Herring (Arm) @ 2024-08-12 15:09 UTC (permalink / raw)
To: Konrad Dybcio
Cc: linux-kernel, Conor Dooley, devicetree, Bjorn Andersson,
Marijn Suijten, Konrad Dybcio, linux-arm-msm, Krzysztof Kozlowski
On Fri, 09 Aug 2024 03:43:19 +0200, Konrad Dybcio wrote:
> This series brings support for X Elite-based Surface Laptop 7 devices.
>
> See patch 4 for a more detailed status explanation
>
> Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
> ---
> Konrad Dybcio (4):
> dt-bindings: arm: qcom: Add Surface Laptop 7 devices
> firmware: qcom: scm: Allow QSEECOM on Surface Laptop 7 models
> arm64: dts: qcom: x1e80100: Add UART2
> arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices
>
> Documentation/devicetree/bindings/arm/qcom.yaml | 2 +
> arch/arm64/boot/dts/qcom/Makefile | 2 +
> .../boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 818 +++++++++++++++++++++
> .../boot/dts/qcom/x1e80100-microsoft-romulus13.dts | 13 +
> .../boot/dts/qcom/x1e80100-microsoft-romulus15.dts | 13 +
> arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 8 +
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 52 ++
> drivers/firmware/qcom/qcom_scm.c | 2 +
> 8 files changed, 910 insertions(+)
> ---
> base-commit: 1e391b34f6aa043c7afa40a2103163a0ef06d179
> change-id: 20240809-topic-sl7-db3eef0ada6d
>
> Best regards,
> --
> Konrad Dybcio <quic_kdybcio@quicinc.com>
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y qcom/x1e80100-microsoft-romulus13.dtb qcom/x1e80100-microsoft-romulus15.dtb' for 20240809-topic-sl7-v1-0-2090433d8dfc@quicinc.com:
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: domain-idle-states: cluster-sleep-1: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: domain-idle-states: cluster-sleep-1: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: pci@1bf8000: Unevaluated properties are not allowed ('vddpe-3v3-supply' was unexpected)
from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: pci@1bf8000: Unevaluated properties are not allowed ('vddpe-3v3-supply' was unexpected)
from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: usb@a2f8800: interrupt-names: ['pwr_event', 'dp_hs_phy_irq', 'dm_hs_phy_irq'] is too short
from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: usb@a2f8800: interrupt-names: ['pwr_event', 'dp_hs_phy_irq', 'dm_hs_phy_irq'] is too short
from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
^ permalink raw reply [flat|nested] 12+ messages in thread