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From: Yao Zi <ziyao@disroot.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Celeste Liu <CoelacanthusHex@gmail.com>
Subject: Re: [PATCH 2/8] dt-bindings: reset: Add reset ID definition for Rockchip RK3528
Date: Wed, 2 Oct 2024 09:54:14 +0000	[thread overview]
Message-ID: <Zv0YRkabzDTARc-L@pineapple> (raw)
In-Reply-To: <kg7lh6gafeegmljsygukhfjiztx5wbothngtxrcreccao3itpy@f4bxf4w346ky>

On Wed, Oct 02, 2024 at 08:31:53AM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 01, 2024 at 04:23:56AM +0000, Yao Zi wrote:
> > +/*
> > + * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
> > + * Copyright (c) 2024 Yao Zi <ziyao@disroot.org>
> > + * Author: Joseph Chen <chenjh@rock-chips.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> > +#define _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> > +
> > +// CRU_SOFTRST_CON03 (Offset: 0xA0C)
> > +#define SRST_CORE0_PO			0x00000030
> > +#define SRST_CORE1_PO			0x00000031
> > +#define SRST_CORE2_PO			0x00000032
> > +#define SRST_CORE3_PO			0x00000033
> > +#define SRST_CORE0			0x00000034
> > +#define SRST_CORE1			0x00000035
> > +#define SRST_CORE2			0x00000036
> > +#define SRST_CORE3			0x00000037
> > +#define SRST_NL2			0x00000038
> > +#define SRST_CORE_BIU			0x00000039
> > +#define SRST_CORE_CRYPTO		0x0000003A
> > +
> > +// CRU_SOFTRST_CON05 (Offset: 0xA14)
> > +#define SRST_P_DBG			0x0000005D
> > +#define SRST_POT_DBG			0x0000005E
> > +#define SRST_NT_DBG			0x0000005F
> 
> What are all these? Registers? Not a binding.
> 
> Binding constants are numerical values from 0, incremented by one,

Do we have related documentation about this, or I just miss it?

> serving as abstraction layer between DTS and driver.
>
> None of these here are bindings.

Thanks for explaination. Will fix it in next revision.

Best regards,
Yao Zi

WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <ziyao@disroot.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Celeste Liu <CoelacanthusHex@gmail.com>
Subject: Re: [PATCH 2/8] dt-bindings: reset: Add reset ID definition for Rockchip RK3528
Date: Wed, 2 Oct 2024 09:54:14 +0000	[thread overview]
Message-ID: <Zv0YRkabzDTARc-L@pineapple> (raw)
In-Reply-To: <kg7lh6gafeegmljsygukhfjiztx5wbothngtxrcreccao3itpy@f4bxf4w346ky>

On Wed, Oct 02, 2024 at 08:31:53AM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 01, 2024 at 04:23:56AM +0000, Yao Zi wrote:
> > +/*
> > + * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
> > + * Copyright (c) 2024 Yao Zi <ziyao@disroot.org>
> > + * Author: Joseph Chen <chenjh@rock-chips.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> > +#define _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> > +
> > +// CRU_SOFTRST_CON03 (Offset: 0xA0C)
> > +#define SRST_CORE0_PO			0x00000030
> > +#define SRST_CORE1_PO			0x00000031
> > +#define SRST_CORE2_PO			0x00000032
> > +#define SRST_CORE3_PO			0x00000033
> > +#define SRST_CORE0			0x00000034
> > +#define SRST_CORE1			0x00000035
> > +#define SRST_CORE2			0x00000036
> > +#define SRST_CORE3			0x00000037
> > +#define SRST_NL2			0x00000038
> > +#define SRST_CORE_BIU			0x00000039
> > +#define SRST_CORE_CRYPTO		0x0000003A
> > +
> > +// CRU_SOFTRST_CON05 (Offset: 0xA14)
> > +#define SRST_P_DBG			0x0000005D
> > +#define SRST_POT_DBG			0x0000005E
> > +#define SRST_NT_DBG			0x0000005F
> 
> What are all these? Registers? Not a binding.
> 
> Binding constants are numerical values from 0, incremented by one,

Do we have related documentation about this, or I just miss it?

> serving as abstraction layer between DTS and driver.
>
> None of these here are bindings.

Thanks for explaination. Will fix it in next revision.

Best regards,
Yao Zi

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2024-10-02  9:54 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-01  4:23 [PATCH 0/8] Support clock and reset unit of Rockchip RK3528 Yao Zi
2024-10-01  4:23 ` Yao Zi
2024-10-01  4:23 ` [PATCH 1/8] dt-bindings: clock: Add clock ID definition for " Yao Zi
2024-10-01  4:23   ` Yao Zi
2024-10-02  6:32   ` Krzysztof Kozlowski
2024-10-02  6:32     ` Krzysztof Kozlowski
2024-10-02  9:24     ` Yao Zi
2024-10-02  9:24       ` Yao Zi
2024-10-01  4:23 ` [PATCH 2/8] dt-bindings: reset: Add reset " Yao Zi
2024-10-01  4:23   ` Yao Zi
2024-10-01 16:29   ` Conor Dooley
2024-10-01 16:29     ` Conor Dooley
2024-10-02  6:31   ` Krzysztof Kozlowski
2024-10-02  6:31     ` Krzysztof Kozlowski
2024-10-02  9:54     ` Yao Zi [this message]
2024-10-02  9:54       ` Yao Zi
2024-10-02 10:07       ` Heiko Stübner
2024-10-02 10:07         ` Heiko Stübner
2024-10-02 10:19         ` Yao Zi
2024-10-02 10:19           ` Yao Zi
2024-10-01  4:23 ` [PATCH 3/8] dt-bindings: clock: Add rockchip,rk3528-cru Yao Zi
2024-10-01  4:23   ` Yao Zi
2024-10-01 16:29   ` Conor Dooley
2024-10-01 16:29     ` Conor Dooley
2024-10-01 21:18     ` Yao Zi
2024-10-01 21:18       ` Yao Zi
2024-10-02  8:49       ` Conor Dooley
2024-10-02  8:49         ` Conor Dooley
2024-10-02 10:02         ` Yao Zi
2024-10-02 10:02           ` Yao Zi
2024-10-01  4:23 ` [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE Yao Zi
2024-10-01  4:23   ` Yao Zi
2024-10-02  8:16   ` Heiko Stübner
2024-10-02  8:16     ` Heiko Stübner
2024-10-02 10:08     ` Yao Zi
2024-10-02 10:08       ` Yao Zi
2024-10-02 10:12       ` Heiko Stübner
2024-10-02 10:12         ` Heiko Stübner
2024-10-02 10:22         ` Yao Zi
2024-10-02 10:22           ` Yao Zi
2024-10-01  4:23 ` [PATCH 5/8] clk: rockchip: Add clock type GATE_NO_SET_RATE Yao Zi
2024-10-01  4:23   ` Yao Zi
2024-10-02  8:08   ` Heiko Stübner
2024-10-02  8:08     ` Heiko Stübner
2024-10-02 10:30     ` Yao Zi
2024-10-02 10:30       ` Yao Zi
2024-10-01  4:24 ` [PATCH 6/8] clk: rockchip: Add clock controller driver for RK3528 SoC Yao Zi
2024-10-01  4:24   ` Yao Zi
2024-10-02 10:21   ` Heiko Stübner
2024-10-02 10:21     ` Heiko Stübner
2024-10-02 10:38     ` Yao Zi
2024-10-02 10:38       ` Yao Zi
2024-10-01  4:38 ` [PATCH 7/8] arm64: dts: rockchip: Add clock generators " Yao Zi
2024-10-01  4:38   ` Yao Zi
2024-10-01  4:38 ` [PATCH 8/8] arm64: dts: rockchip: Add UART clocks " Yao Zi
2024-10-01  4:38   ` Yao Zi

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