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From: Zhao Liu <zhao1.liu@intel.com>
To: Alireza Sanaee <alireza.sanaee@huawei.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	zhenyu.z.wang@intel.com, dapeng1.mi@linux.intel.com,
	yongwei.ma@intel.com, armbru@redhat.com, farman@linux.ibm.com,
	peter.maydell@linaro.org, mst@redhat.com, anisinha@redhat.com,
	shannon.zhaosl@gmail.com, imammedo@redhat.com,
	mtosatti@redhat.com, berrange@redhat.com,
	richard.henderson@linaro.org, linuxarm@huawei.com,
	shameerali.kolothum.thodi@huawei.com,
	Jonathan.Cameron@huawei.com, jiangkunkun@huawei.com,
	yangyicong@hisilicon.com
Subject: Re: [PATCH v3 2/6] i386/cpu: add IsDefined flag to smp-cache property
Date: Sat, 12 Oct 2024 17:50:26 +0800	[thread overview]
Message-ID: <ZwpGYtqS9AJ96G8+@intel.com> (raw)
In-Reply-To: <20241010111822.345-3-alireza.sanaee@huawei.com>

Hi Alireze,

On Thu, Oct 10, 2024 at 12:18:18PM +0100, Alireza Sanaee wrote:
> Date: Thu, 10 Oct 2024 12:18:18 +0100
> From: Alireza Sanaee <alireza.sanaee@huawei.com>
> Subject: [PATCH v3 2/6] i386/cpu: add IsDefined flag to smp-cache property
> X-Mailer: git-send-email 2.34.1
> 
> This commit adds IsDefined flag to the object and this helps in avoiding
> extra checks for every single layer of caches in both x86 and ARM.
> 
> Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> ---
>  hw/core/machine-smp.c | 2 ++
>  include/hw/boards.h   | 1 +
>  2 files changed, 3 insertions(+)
> 
> diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
> index 9a28194676..5a02bbf584 100644
> --- a/hw/core/machine-smp.c
> +++ b/hw/core/machine-smp.c
> @@ -371,6 +371,8 @@ bool machine_parse_smp_cache(MachineState *ms,
>          return false;
>      }
>  
> +    ms->smp_cache.IsDefined = true;
> +
>      return true;
>  }
>  
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index db2aa2b706..2883a57084 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -373,6 +373,7 @@ typedef struct CpuTopology {
>  
>  typedef struct SmpCache {
>      SmpCacheProperties props[CACHE_LEVEL_AND_TYPE__MAX];
> +    bool IsDefined;
>  } SmpCache;
>  
>  /**

Thanks for your patch, now I've added this commit in my series to
resolve my TODO, which can also help your series be more ARM-focused :).

I will post my next version soon.

Thanks,
Zhao



  reply	other threads:[~2024-10-12  9:34 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-10 11:18 [RFC PATCH v3 0/6] Specifying cache topology on ARM Alireza Sanaee via
2024-10-10 11:18 ` [PATCH v3 1/6] bios-tables-test: prepare to change ARM ACPI virt PPTT Alireza Sanaee via
2024-10-10 11:18   ` Alireza Sanaee via
2024-10-10 11:18 ` [PATCH v3 2/6] i386/cpu: add IsDefined flag to smp-cache property Alireza Sanaee via
2024-10-10 11:18   ` Alireza Sanaee via
2024-10-12  9:50   ` Zhao Liu [this message]
2024-10-10 11:18 ` [PATCH v3 3/6] target/arm/tcg: increase cache level for cpu=max Alireza Sanaee via
2024-10-10 11:18   ` Alireza Sanaee via
2024-10-10 11:18 ` [PATCH v3 4/6] hw/acpi: add cache hierarchy node to pptt table Alireza Sanaee via
2024-10-10 11:18   ` Alireza Sanaee via
2024-10-10 11:18 ` [PATCH v3 5/6] tests/qtest/bios-table-test: testing new ARM ACPI PPTT topology Alireza Sanaee via
2024-10-10 11:18 ` [PATCH v3 6/6] Update the ACPI tables according to the acpi aml_build change, also empty bios-tables-test-allowed-diff.h Alireza Sanaee via
2024-10-10 11:18   ` Alireza Sanaee via

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