Re: [PATCH v7 5/7] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC

From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: manivannan.sadhasivam@linaro.org, vkoul@kernel.org,
	kishon@kernel.org, robh@kernel.org, andersson@kernel.org,
	konradybcio@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	mturquette@baylibre.com, sboyd@kernel.org, abel.vesa@linaro.org,
	quic_msarkar@quicinc.com, quic_devipriy@quicinc.com,
	dmitry.baryshkov@linaro.org, kw@linux.com, lpieralisi@kernel.org,
	neil.armstrong@linaro.org, linux-arm-msm@vger.kernel.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, johan+linaro@kernel.org
Subject: Re: [PATCH v7 5/7] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC
Date: Fri, 18 Oct 2024 15:51:57 +0200	[thread overview]
Message-ID: <ZxJn_Xf4NO3eAfey@hovoldconsulting.com> (raw)
In-Reply-To: <20241017030412.265000-6-quic_qianyu@quicinc.com>

On Wed, Oct 16, 2024 at 08:04:10PM -0700, Qiang Yu wrote:
> On SC8280X family SoC, PCIe controllers are connected to SMMUv3, hence
> they don't need the config_sid() callback in ops_1_9_0 struct. Fix it by
> introducing a new ops struct, namely ops_1_21_0 which is same as ops_1_9_0
> without config_sid() callback so that BDF2SID mapping won't be configured
> during init.

The sc8280xp PCIe devicetree nodes do not specify an 'iommu-map' so the
config_sid() callback is effectively a no-op. Please rephrase this so
that it becomes obvious that this is a clean up rather than fix.

> Fixes: 70574511f3fc ("PCI: qcom: Add support for SC8280XP")

And drop the Fixes tag.

> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 88a98be930e3..468bd4242e61 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1367,6 +1367,16 @@ static const struct qcom_pcie_ops ops_2_9_0 = {
>  	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
>  };
>  
> +/* Qcom IP rev.: 1.21.0 */

Is this the actual IP revision on sc8280xp (and not just the revision
used on x1e80100)?

Please also provide the Synopsis IP rev like the other configs do.

> +static const struct qcom_pcie_ops ops_1_21_0 = {
> +	.get_resources = qcom_pcie_get_resources_2_7_0,
> +	.init = qcom_pcie_init_2_7_0,
> +	.post_init = qcom_pcie_post_init_2_7_0,
> +	.host_post_init = qcom_pcie_host_post_init_2_7_0,
> +	.deinit = qcom_pcie_deinit_2_7_0,
> +	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
> +};
> +
>  static const struct qcom_pcie_cfg cfg_1_0_0 = {
>  	.ops = &ops_1_0_0,
>  };

And try to keep these structs sorted by revision. At least put this one
after ops_1_9_0.

Johan