From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: "Chen Wang" <unicorn_wang@outlook.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Inochi Amaoto" <inochiama@outlook.com>,
"Yixun Lan" <dlan@gentoo.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk
Date: Mon, 21 Oct 2024 11:29:08 +0300 [thread overview]
Message-ID: <ZxYQ1FKtloHPnjb_@smile.fi.intel.com> (raw)
In-Reply-To: <20241021072606.585878-3-inochiama@gmail.com>
On Mon, Oct 21, 2024 at 03:26:06PM +0800, Inochi Amaoto wrote:
> SG2044 relys on an internal divisor when calculating bitrate, which
> means a wrong clock for the most common bitrates. So add a quirk for
> this uart device to skip the set rate call and only relys on the
> internal UART divisor.
Assuming DT bindings are okay,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
--
With Best Regards,
Andy Shevchenko
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: "Chen Wang" <unicorn_wang@outlook.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Inochi Amaoto" <inochiama@outlook.com>,
"Yixun Lan" <dlan@gentoo.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk
Date: Mon, 21 Oct 2024 11:29:08 +0300 [thread overview]
Message-ID: <ZxYQ1FKtloHPnjb_@smile.fi.intel.com> (raw)
In-Reply-To: <20241021072606.585878-3-inochiama@gmail.com>
On Mon, Oct 21, 2024 at 03:26:06PM +0800, Inochi Amaoto wrote:
> SG2044 relys on an internal divisor when calculating bitrate, which
> means a wrong clock for the most common bitrates. So add a quirk for
> this uart device to skip the set rate call and only relys on the
> internal UART divisor.
Assuming DT bindings are okay,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2024-10-21 8:30 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 7:26 [PATCH v2 0/2] serial: 8250_dw: Introduce SG2044 uart support Inochi Amaoto
2024-10-21 7:26 ` Inochi Amaoto
2024-10-21 7:26 ` [PATCH v2 1/2] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts Inochi Amaoto
2024-10-21 7:26 ` Inochi Amaoto
2024-10-21 12:10 ` Conor Dooley
2024-10-21 12:10 ` Conor Dooley
2024-10-21 12:18 ` Inochi Amaoto
2024-10-21 12:18 ` Inochi Amaoto
2024-10-21 12:21 ` Conor Dooley
2024-10-21 12:21 ` Conor Dooley
2024-10-21 12:23 ` Inochi Amaoto
2024-10-21 12:23 ` Inochi Amaoto
2024-10-22 17:25 ` Conor Dooley
2024-10-22 17:25 ` Conor Dooley
2024-10-23 0:32 ` Inochi Amaoto
2024-10-23 0:32 ` Inochi Amaoto
2024-10-23 18:53 ` Conor Dooley
2024-10-23 18:53 ` Conor Dooley
2024-10-21 18:00 ` Rob Herring
2024-10-21 18:00 ` Rob Herring
2024-10-21 7:26 ` [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk Inochi Amaoto
2024-10-21 7:26 ` Inochi Amaoto
2024-10-21 8:29 ` Andy Shevchenko [this message]
2024-10-21 8:29 ` Andy Shevchenko
2024-10-21 8:52 ` Ilpo Järvinen
2024-10-21 8:52 ` Ilpo Järvinen
2024-10-21 10:08 ` Inochi Amaoto
2024-10-21 10:08 ` Inochi Amaoto
2024-10-21 10:17 ` Ilpo Järvinen
2024-10-21 10:17 ` Ilpo Järvinen
2024-10-21 12:03 ` Andy Shevchenko
2024-10-21 12:03 ` Andy Shevchenko
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