From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Stewart Hildebrand <stewart.hildebrand@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Julien Grall <julien@xen.org>,
Stefano Stabellini <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v6 1/3] x86/msi: harden stale pdev handling
Date: Mon, 28 Oct 2024 18:53:48 +0100 [thread overview]
Message-ID: <Zx_PrF9_ITzfcCcI@macbook> (raw)
In-Reply-To: <fdb156eb-ea82-4afa-afa6-105e605eba6d@suse.com>
On Mon, Oct 28, 2024 at 05:58:28PM +0100, Jan Beulich wrote:
> On 18.10.2024 22:39, Stewart Hildebrand wrote:
> > Dom0 normally informs Xen of PCI device removal via
> > PHYSDEVOP_pci_device_remove, e.g. in response to SR-IOV disable or
> > hot-unplug. We might find ourselves with stale pdevs if a buggy dom0
> > fails to report removal via PHYSDEVOP_pci_device_remove. In this case,
> > attempts to access the config space of the stale pdevs would be invalid
> > and return all 1s.
> >
> > Some possible conditions leading to this are:
> >
> > 1. Dom0 disables SR-IOV without reporting VF removal to Xen.
> >
> > The Linux SR-IOV subsystem normally reports VF removal when a PF driver
> > disables SR-IOV. In case of a buggy dom0 SR-IOV subsystem, SR-IOV could
> > become disabled with stale dangling VF pdevs in both dom0 Linux and Xen.
> >
> > 2. Dom0 reporting PF removal without reporting VF removal.
> >
> > During SR-IOV PF removal (hot-unplug), a buggy PF driver may fail to
> > disable SR-IOV, thus failing to remove the VFs, leaving stale dangling
> > VFs behind in both Xen and Linux. At least Linux warns in this case:
> >
> > [ 100.000000] 0000:01:00.0: driver left SR-IOV enabled after remove
> >
> > In either case, Xen is left with stale VF pdevs, risking invalid PCI
> > config space accesses.
> >
> > When Xen is built with CONFIG_DEBUG=y, the following Xen crashes were
> > observed when dom0 attempted to access the config space of a stale VF:
> >
> > (XEN) Assertion 'pos' failed at arch/x86/msi.c:1274
> > (XEN) ----[ Xen-4.20-unstable x86_64 debug=y Tainted: C ]----
> > ...
> > (XEN) Xen call trace:
> > (XEN) [<ffff82d040346834>] R pci_msi_conf_write_intercept+0xa2/0x1de
> > (XEN) [<ffff82d04035d6b4>] F pci_conf_write_intercept+0x68/0x78
> > (XEN) [<ffff82d0403264e5>] F arch/x86/pv/emul-priv-op.c#pci_cfg_ok+0xa0/0x114
> > (XEN) [<ffff82d04032660e>] F arch/x86/pv/emul-priv-op.c#guest_io_write+0xb5/0x1c8
> > (XEN) [<ffff82d0403267bb>] F arch/x86/pv/emul-priv-op.c#write_io+0x9a/0xe0
> > (XEN) [<ffff82d04037c77a>] F x86_emulate+0x100e5/0x25f1e
> > (XEN) [<ffff82d0403941a8>] F x86_emulate_wrapper+0x29/0x64
> > (XEN) [<ffff82d04032802b>] F pv_emulate_privileged_op+0x12e/0x217
> > (XEN) [<ffff82d040369f12>] F do_general_protection+0xc2/0x1b8
> > (XEN) [<ffff82d040201aa7>] F x86_64/entry.S#handle_exception_saved+0x2b/0x8c
> >
> > (XEN) Assertion 'pos' failed at arch/x86/msi.c:1246
> > (XEN) ----[ Xen-4.20-unstable x86_64 debug=y Tainted: C ]----
> > ...
> > (XEN) Xen call trace:
> > (XEN) [<ffff82d040346b0a>] R pci_reset_msix_state+0x47/0x50
> > (XEN) [<ffff82d040287eec>] F pdev_msix_assign+0x19/0x35
> > (XEN) [<ffff82d040286184>] F drivers/passthrough/pci.c#assign_device+0x181/0x471
> > (XEN) [<ffff82d040287c36>] F iommu_do_pci_domctl+0x248/0x2ec
> > (XEN) [<ffff82d040284e1f>] F iommu_do_domctl+0x26/0x44
> > (XEN) [<ffff82d0402483b8>] F do_domctl+0x8c1/0x1660
> > (XEN) [<ffff82d04032977e>] F pv_hypercall+0x5ce/0x6af
> > (XEN) [<ffff82d0402012d3>] F lstar_enter+0x143/0x150
> >
> > These ASSERTs triggered because the MSI-X capability position can't be
> > found for a stale pdev.
> >
> > Latch the capability positions of MSI and MSI-X during device init, and
> > replace instances of pci_find_cap_offset(..., PCI_CAP_ID_MSI{,X}) with
> > the stored value. Introduce one additional ASSERT, while the two
> > existing ASSERTs in question continue to work as intended, even with a
> > stale pdev.
> >
> > Fixes: 484d7c852e4f ("x86/MSI-X: track host and guest mask-all requests separately")
> > Fixes: 575e18d54d19 ("pci: clear {host/guest}_maskall field on assign")
> > Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com>
>
> Looks largely okay to me now, just two type selection aspects:
>
> > --- a/xen/arch/x86/msi.c
> > +++ b/xen/arch/x86/msi.c
> > @@ -278,23 +278,21 @@ void __msi_set_enable(u16 seg, u8 bus, u8 slot, u8 func, int pos, int enable)
> >
> > static void msi_set_enable(struct pci_dev *dev, int enable)
> > {
> > - int pos;
> > + int pos = dev->msi_pos;
>
> This and ...
>
> > u16 seg = dev->seg;
> > u8 bus = dev->bus;
> > u8 slot = PCI_SLOT(dev->devfn);
> > u8 func = PCI_FUNC(dev->devfn);
> >
> > - pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSI);
> > if ( pos )
> > __msi_set_enable(seg, bus, slot, func, pos, enable);
> > }
> >
> > static void msix_set_enable(struct pci_dev *dev, int enable)
> > {
> > - int pos;
> > + int pos = dev->msix_pos;
>
> ... this want to become unsigned int at this occasion, imo. Like we have ...
>
> > @@ -764,7 +762,7 @@ static int msix_capability_init(struct pci_dev *dev,
> > u8 slot = PCI_SLOT(dev->devfn);
> > u8 func = PCI_FUNC(dev->devfn);
> > bool maskall = msix->host_maskall, zap_on_error = false;
> > - unsigned int pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
> > + unsigned int pos = dev->msix_pos;
>
> ... e.g. here already.
>
> > --- a/xen/include/xen/pci.h
> > +++ b/xen/include/xen/pci.h
> > @@ -113,6 +113,9 @@ struct pci_dev {
> > pci_sbdf_t sbdf;
> > };
> >
> > + unsigned int msi_pos;
> > + unsigned int msix_pos;
> > +
> > uint8_t msi_maxvec;
> > uint8_t phantom_stride;
>
> As can be seen from the subsequent members, we're trying to be space
> conserving here. Both fields won't require more than 8 bits, so uint8_t
> or unsigned char would be the better type to use. Again imo. Preferably
> with those adjustments (which could likely be done while committing)
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
uint8_t would seem preferable here, as it's fixed-size width clearly
related to the offset into the PCI configuration space for a device.
It might also be worth noting in the commit message that having the
position cached should be a small perf improvement, by not having to
walk the capability list each time.
Anyway, no strong opinion about the commit message adjustment, so with
the type changed:
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Thanks, Roger.
next prev parent reply other threads:[~2024-10-28 17:54 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-18 20:39 [PATCH v6 0/3] xen: SR-IOV fixes Stewart Hildebrand
2024-10-18 20:39 ` [PATCH v6 1/3] x86/msi: harden stale pdev handling Stewart Hildebrand
2024-10-28 16:58 ` Jan Beulich
2024-10-28 17:53 ` Roger Pau Monné [this message]
2024-10-31 11:29 ` Jan Beulich
2024-10-18 20:39 ` [PATCH v6 2/3] xen/pci: introduce PF<->VF links Stewart Hildebrand
2024-10-28 17:02 ` Jan Beulich
2024-11-01 20:16 ` Stewart Hildebrand
2024-11-02 15:18 ` Daniel P. Smith
2024-11-04 11:45 ` Alejandro Vallejo
2024-11-05 9:08 ` Roger Pau Monné
2024-11-06 16:20 ` Daniel P. Smith
2024-11-06 17:04 ` Daniel P. Smith
2024-11-05 9:03 ` Roger Pau Monné
2024-11-06 16:31 ` Daniel P. Smith
2024-11-04 7:44 ` Jan Beulich
2024-11-07 14:32 ` Stewart Hildebrand
2024-11-08 12:42 ` Alejandro Vallejo
2024-11-08 13:17 ` Jan Beulich
2024-11-08 15:19 ` Roger Pau Monné
2024-11-08 16:29 ` Stewart Hildebrand
2024-11-11 6:40 ` Jan Beulich
2024-11-12 9:05 ` Roger Pau Monné
2024-10-28 18:41 ` Roger Pau Monné
2024-11-11 20:07 ` Stewart Hildebrand
2024-11-12 9:02 ` Roger Pau Monné
2024-11-12 9:39 ` Jan Beulich
2024-11-12 17:41 ` Stewart Hildebrand
2024-11-12 9:42 ` Jan Beulich
2024-10-18 20:39 ` [PATCH v6 3/3] x86/msi: fix locking for SR-IOV devices Stewart Hildebrand
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Zx_PrF9_ITzfcCcI@macbook \
--to=roger.pau@citrix.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=julien@xen.org \
--cc=sstabellini@kernel.org \
--cc=stewart.hildebrand@amd.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.