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From: Kevin Wolf <kwolf@redhat.com>
To: Jamin Lin <jamin_lin@aspeedtech.com>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Hanna Reitz" <hreitz@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:Block layer core" <qemu-block@nongnu.org>,
	troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v2 01/18] aspeed/smc: Fix write incorrect data into flash in user mode
Date: Tue, 22 Oct 2024 12:49:57 +0200	[thread overview]
Message-ID: <ZxeDVTBwLZsOEDvE@redhat.com> (raw)
In-Reply-To: <20241022094110.1574011-2-jamin_lin@aspeedtech.com>

Am 22.10.2024 um 11:40 hat Jamin Lin geschrieben:
> According to the design of ASPEED SPI controllers user mode, users write the
> data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1
> enter user mode. Then, SPI drivers send flash commands for writing data.
> Finally, SPI drivers set the Control Register (0x10) bit 2 to stop
> active control and restore bit 0 and 1.
> 
> According to the design of ASPEED SMC model, firmware writes the
> Control Register and the "aspeed_smc_flash_update_ctrl" function is called.
> Then, this function verify Control Register(0x10) bit 0 and 1. If it set user
> mode, the value of s->snoop_index is SNOOP_START else SNOOP_OFF.
> If s->snoop_index is SNOOP_START, the "aspeed_smc_do_snoop" function verify
> the first incomming data is a new flash command and writes the corresponding
> dummy bytes if need.
> 
> However, it did not check the current unselect status. If current unselect
> status is "false" and firmware set the IO MODE by Control Register bit 31:28,
> the value of s->snoop_index will be changed to SNOOP_START again and
> "aspeed_smc_do_snoop" misunderstand that the incomming data is the new flash
> command and it causes writing unexpected data into flash.
> 
> Example:
> 1. Firmware set user mode by Control Register bit 0 and 1(0x03)
> 2. SMC model set s->snoop SNOOP_START
> 3. Firmware set Quad Page Program with 4-Byte Address command (0x34)
> 4. SMC model verify this flash command and it needs 4 dummy bytes.
> 5. Firmware send 4 bytes address.
> 6. SMC model receives 4 bytes address
> 7. Firmware set QPI IO MODE by Control Register bit 31. (0x80000003)
> 8. SMC model verify new user mode by Control Register bit 0 and 1.
>    Then, set s->snoop SNOOP_START again. (It is the wrong behavior.)
> 9. Firmware send 0xebd8c134 data and it should be written into flash.
>    However, SMC model misunderstand that the first incoming data, 0x34,
>    is the new command because the value of s->snoop is changed to SNOOP_START.
>    Finally, SMC sned the incorrect data to flash model.
> 
> Introduce a new unselect attribute in AspeedSMCState to save the current
> unselect status for user mode and set it "true" by default.
> Update "aspeed_smc_flash_update_ctrl" function to check the previous unselect
> status. If both new unselect status and previous unselect status is different,
> update s->snoop_index value and call "aspeed_smc_flash_do_select".
> 
> Increase VMStateDescription version.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>

> @@ -1261,12 +1276,13 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
>  
>  static const VMStateDescription vmstate_aspeed_smc = {
>      .name = "aspeed.smc",
> -    .version_id = 2,
> +    .version_id = 3,
>      .minimum_version_id = 2,
>      .fields = (const VMStateField[]) {
>          VMSTATE_UINT32_ARRAY(regs, AspeedSMCState, ASPEED_SMC_R_MAX),
>          VMSTATE_UINT8(snoop_index, AspeedSMCState),
>          VMSTATE_UINT8(snoop_dummies, AspeedSMCState),
> +        VMSTATE_BOOL(unselect, AspeedSMCState),
>          VMSTATE_END_OF_LIST()
>      }
>  };

I think this will break migration compatibility. In order to enable
at least forward migration, it should be:

    VMSTATE_BOOL_V(unselect, AspeedSMCState, 3),

For allowing backwards migration, too, we should consider making it a
subsection instead that allows migration in the default case of an idle
device.

Kevin


  parent reply	other threads:[~2024-10-22 10:50 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-22  9:40 [PATCH v2 00/18] Fix write incorrect data into flash in user mode Jamin Lin via
2024-10-22  9:40 ` Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 01/18] aspeed/smc: " Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22 10:48   ` Cédric Le Goater
2024-10-22 10:49   ` Kevin Wolf [this message]
2024-10-22 13:40     ` Cédric Le Goater
2024-10-22 15:23       ` Kevin Wolf
2024-10-24  6:06         ` Cédric Le Goater
2024-10-23  1:41       ` Jamin Lin
2024-10-24  6:13         ` Cédric Le Goater
2024-10-22  9:40 ` [PATCH v2 02/18] hw/block:m25p80: Fix coding style Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-11-15 16:44   ` Philippe Mathieu-Daudé
2024-10-22  9:40 ` [PATCH v2 03/18] hw/block:m25p80: Support write status register 2 command (0x31) for w25q01jvq Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 04/18] hw/block/m25p80: Add SFDP table for w25q80bl flash Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 05/18] hw/arm/aspeed: Correct spi_model w25q256 for ast1030-a1 EVB Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 06/18] hw/arm/aspeed: Correct fmc_model w25q80bl " Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 07/18] aspeed: Fix hardcode attach flash model of spi controllers Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22 10:48   ` Cédric Le Goater
2024-10-22 14:10     ` Cédric Le Goater
2024-10-23  2:46       ` Jamin Lin
2024-11-26 16:39         ` Cédric Le Goater
2024-11-27  1:13           ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 08/18] test/qtest/aspeed_smc-test: Fix coding style Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 09/18] test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 10/18] test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 11/18] test/qtest/aspeed_smc-test: Support to test all CE pins Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 12/18] test/qtest/aspeed_smc-test: Introducing a "page_addr" data field Jamin Lin via
2024-10-22 13:48   ` Cédric Le Goater
2024-10-23  1:40     ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 13/18] test/qtest/aspeed_smc-test: Support to test AST2500 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 14/18] test/qtest/aspeed_smc-test: Support to test AST2600 Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 15/18] test/qtest/aspeed_smc-test: Support to test AST1030 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 16/18] test/qtest/aspeed_smc-test: Support write page command with QPI mode Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 17/18] test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases Jamin Lin via
2024-11-25 13:43   ` Cédric Le Goater
2024-11-26  3:07     ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 18/18] test/qtest/ast2700-smc-test: Support to test AST2700 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-24  6:11 ` [PATCH v2 00/18] Fix write incorrect data into flash in user mode Cédric Le Goater
2024-10-24  6:14   ` Jamin Lin
2024-11-14  5:30     ` Jamin Lin
2024-11-14  7:38       ` Cédric Le Goater
2024-11-14  8:50         ` Jamin Lin

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