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From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Kevin Wolf" <kwolf@redhat.com>,
	"Hanna Reitz" <hreitz@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:Block layer core" <qemu-block@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<yunlin.tang@aspeedtech.com>
Subject: [PATCH v2 07/18] aspeed: Fix hardcode attach flash model of spi controllers
Date: Tue, 22 Oct 2024 17:40:59 +0800	[thread overview]
Message-ID: <20241022094110.1574011-8-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20241022094110.1574011-1-jamin_lin@aspeedtech.com>

It only attached flash model of fmc and spi[0] in aspeed_machine_init function.
However, AST2500 and AST2600 have one fmc and two spi(spi1 and spi2)
controllers; AST2700 have one fmc and 3 spi(spi0, spi1 and spi2) controllers.

Besides, it used hardcode to attach flash model of fmc, spi[0] and spi[1] in
aspeed_minibmc_machine_init for AST1030.

To make both functions more flexible and support all ASPEED SOCs spi
controllers, adds a for loop with sc->spis_num to attach flash model of
all supported spi controllers. The sc->spis_num is from AspeedSoCClass.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/arm/aspeed.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index b4b1ce9efb..7ac01a3562 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -419,9 +419,11 @@ static void aspeed_machine_init(MachineState *machine)
         aspeed_board_init_flashes(&bmc->soc->fmc,
                               bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
                               amc->num_cs, 0);
-        aspeed_board_init_flashes(&bmc->soc->spi[0],
-                              bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              1, amc->num_cs);
+        for (i = 0; i < sc->spis_num; i++) {
+            aspeed_board_init_flashes(&bmc->soc->spi[i],
+                            bmc->spi_model ? bmc->spi_model : amc->spi_model,
+                            amc->num_cs, amc->num_cs + (amc->num_cs * i));
+        }
     }
 
     if (machine->kernel_filename && sc->num_cpus > 1) {
@@ -1579,7 +1581,9 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
 {
     AspeedMachineState *bmc = ASPEED_MACHINE(machine);
     AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
+    AspeedSoCClass *sc;
     Clock *sysclk;
+    int i;
 
     sysclk = clock_new(OBJECT(machine), "SYSCLK");
     clock_set_hz(sysclk, SYSCLK_FRQ);
@@ -1587,6 +1591,7 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
     bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
     object_unref(OBJECT(bmc->soc));
+    sc = ASPEED_SOC_GET_CLASS(bmc->soc);
     qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
 
     object_property_set_link(OBJECT(bmc->soc), "memory",
@@ -1599,13 +1604,11 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
                               amc->num_cs,
                               0);
 
-    aspeed_board_init_flashes(&bmc->soc->spi[0],
-                              bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              amc->num_cs, amc->num_cs);
-
-    aspeed_board_init_flashes(&bmc->soc->spi[1],
+    for (i = 0; i < sc->spis_num; i++) {
+        aspeed_board_init_flashes(&bmc->soc->spi[i],
                               bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              amc->num_cs, (amc->num_cs * 2));
+                              amc->num_cs, amc->num_cs + (amc->num_cs * i));
+    }
 
     if (amc->i2c_init) {
         amc->i2c_init(bmc);
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Kevin Wolf" <kwolf@redhat.com>,
	"Hanna Reitz" <hreitz@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:Block layer core" <qemu-block@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<yunlin.tang@aspeedtech.com>
Subject: [PATCH v2 07/18] aspeed: Fix hardcode attach flash model of spi controllers
Date: Tue, 22 Oct 2024 17:40:59 +0800	[thread overview]
Message-ID: <20241022094110.1574011-8-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20241022094110.1574011-1-jamin_lin@aspeedtech.com>

It only attached flash model of fmc and spi[0] in aspeed_machine_init function.
However, AST2500 and AST2600 have one fmc and two spi(spi1 and spi2)
controllers; AST2700 have one fmc and 3 spi(spi0, spi1 and spi2) controllers.

Besides, it used hardcode to attach flash model of fmc, spi[0] and spi[1] in
aspeed_minibmc_machine_init for AST1030.

To make both functions more flexible and support all ASPEED SOCs spi
controllers, adds a for loop with sc->spis_num to attach flash model of
all supported spi controllers. The sc->spis_num is from AspeedSoCClass.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/arm/aspeed.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index b4b1ce9efb..7ac01a3562 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -419,9 +419,11 @@ static void aspeed_machine_init(MachineState *machine)
         aspeed_board_init_flashes(&bmc->soc->fmc,
                               bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
                               amc->num_cs, 0);
-        aspeed_board_init_flashes(&bmc->soc->spi[0],
-                              bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              1, amc->num_cs);
+        for (i = 0; i < sc->spis_num; i++) {
+            aspeed_board_init_flashes(&bmc->soc->spi[i],
+                            bmc->spi_model ? bmc->spi_model : amc->spi_model,
+                            amc->num_cs, amc->num_cs + (amc->num_cs * i));
+        }
     }
 
     if (machine->kernel_filename && sc->num_cpus > 1) {
@@ -1579,7 +1581,9 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
 {
     AspeedMachineState *bmc = ASPEED_MACHINE(machine);
     AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
+    AspeedSoCClass *sc;
     Clock *sysclk;
+    int i;
 
     sysclk = clock_new(OBJECT(machine), "SYSCLK");
     clock_set_hz(sysclk, SYSCLK_FRQ);
@@ -1587,6 +1591,7 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
     bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
     object_unref(OBJECT(bmc->soc));
+    sc = ASPEED_SOC_GET_CLASS(bmc->soc);
     qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
 
     object_property_set_link(OBJECT(bmc->soc), "memory",
@@ -1599,13 +1604,11 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
                               amc->num_cs,
                               0);
 
-    aspeed_board_init_flashes(&bmc->soc->spi[0],
-                              bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              amc->num_cs, amc->num_cs);
-
-    aspeed_board_init_flashes(&bmc->soc->spi[1],
+    for (i = 0; i < sc->spis_num; i++) {
+        aspeed_board_init_flashes(&bmc->soc->spi[i],
                               bmc->spi_model ? bmc->spi_model : amc->spi_model,
-                              amc->num_cs, (amc->num_cs * 2));
+                              amc->num_cs, amc->num_cs + (amc->num_cs * i));
+    }
 
     if (amc->i2c_init) {
         amc->i2c_init(bmc);
-- 
2.34.1



  parent reply	other threads:[~2024-10-22  9:43 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-22  9:40 [PATCH v2 00/18] Fix write incorrect data into flash in user mode Jamin Lin via
2024-10-22  9:40 ` Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 01/18] aspeed/smc: " Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22 10:48   ` Cédric Le Goater
2024-10-22 10:49   ` Kevin Wolf
2024-10-22 13:40     ` Cédric Le Goater
2024-10-22 15:23       ` Kevin Wolf
2024-10-24  6:06         ` Cédric Le Goater
2024-10-23  1:41       ` Jamin Lin
2024-10-24  6:13         ` Cédric Le Goater
2024-10-22  9:40 ` [PATCH v2 02/18] hw/block:m25p80: Fix coding style Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-11-15 16:44   ` Philippe Mathieu-Daudé
2024-10-22  9:40 ` [PATCH v2 03/18] hw/block:m25p80: Support write status register 2 command (0x31) for w25q01jvq Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 04/18] hw/block/m25p80: Add SFDP table for w25q80bl flash Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 05/18] hw/arm/aspeed: Correct spi_model w25q256 for ast1030-a1 EVB Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22  9:40 ` [PATCH v2 06/18] hw/arm/aspeed: Correct fmc_model w25q80bl " Jamin Lin via
2024-10-22  9:40   ` Jamin Lin via
2024-10-22  9:40 ` Jamin Lin via [this message]
2024-10-22  9:40   ` [PATCH v2 07/18] aspeed: Fix hardcode attach flash model of spi controllers Jamin Lin via
2024-10-22 10:48   ` Cédric Le Goater
2024-10-22 14:10     ` Cédric Le Goater
2024-10-23  2:46       ` Jamin Lin
2024-11-26 16:39         ` Cédric Le Goater
2024-11-27  1:13           ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 08/18] test/qtest/aspeed_smc-test: Fix coding style Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 09/18] test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 10/18] test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 11/18] test/qtest/aspeed_smc-test: Support to test all CE pins Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 12/18] test/qtest/aspeed_smc-test: Introducing a "page_addr" data field Jamin Lin via
2024-10-22 13:48   ` Cédric Le Goater
2024-10-23  1:40     ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 13/18] test/qtest/aspeed_smc-test: Support to test AST2500 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 14/18] test/qtest/aspeed_smc-test: Support to test AST2600 Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 15/18] test/qtest/aspeed_smc-test: Support to test AST1030 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 16/18] test/qtest/aspeed_smc-test: Support write page command with QPI mode Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-22  9:41 ` [PATCH v2 17/18] test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases Jamin Lin via
2024-11-25 13:43   ` Cédric Le Goater
2024-11-26  3:07     ` Jamin Lin
2024-10-22  9:41 ` [PATCH v2 18/18] test/qtest/ast2700-smc-test: Support to test AST2700 Jamin Lin via
2024-10-22  9:41   ` Jamin Lin via
2024-10-24  6:11 ` [PATCH v2 00/18] Fix write incorrect data into flash in user mode Cédric Le Goater
2024-10-24  6:14   ` Jamin Lin
2024-11-14  5:30     ` Jamin Lin
2024-11-14  7:38       ` Cédric Le Goater
2024-11-14  8:50         ` Jamin Lin

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