From: Heiner Kallweit <hkallweit1@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>, Andrew Lunn <andrew@lunn.ch>
Cc: David Miller <davem@davemloft.net>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH net-next 3/3] net: phy: realtek: add support for the 2.5Gbps PHY in RTL8125
Date: Mon, 2 Sep 2019 08:07:01 +0200 [thread overview]
Message-ID: <a37799d5-e2e0-7987-9f9d-0186060963a7@gmail.com> (raw)
In-Reply-To: <fafc1c05-d7ac-f108-74f9-207617773968@gmail.com>
On 02.09.2019 04:07, Florian Fainelli wrote:
>
>
> On 8/8/2019 1:24 PM, Heiner Kallweit wrote:
>> On 08.08.2019 22:20, Andrew Lunn wrote:
>>>> I have a contact in Realtek who provided the information about
>>>> the vendor-specific registers used in the patch. I also asked for
>>>> a method to auto-detect 2.5Gbps support but have no feedback so far.
>>>> What may contribute to the problem is that also the integrated 1Gbps
>>>> PHY's (all with the same PHY ID) differ significantly from each other,
>>>> depending on the network chip version.
>>>
>>> Hi Heiner
>>>
>>> Some of the PHYs embedded in Marvell switches have an OUI, but no
>>> product ID. We work around this brokenness by trapping the reads to
>>> the ID registers in the MDIO bus controller driver and inserting the
>>> switch product ID. The Marvell PHY driver then recognises these IDs
>>> and does the right thing.
>>>
>>> Maybe you can do something similar here?
>>>
>> Yes, this would be an idea. Let me check.
>
> Since this is an integrated PHY you could have the MAC driver pass a
> specific phydev->dev_flag bit that indicates that this is RTL8215, since
> I am assuming that PCI IDs for those different chipsets do have to be
> allocated, right?
>
Hi Florian,
thanks for the feedback. In the meantime Realtek provided a method to
identify NBaseT-capable PHY's, and the respective match_phy_device
callback implementations had been done in
5181b473d64e ("net: phy: realtek: add NBase-T PHY auto-detection").
Heiner
prev parent reply other threads:[~2019-09-02 6:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-08 19:02 [PATCH net-next 0/3] net: phy: realtek: add support for integrated 2.5Gbps PHY in RTL8125 Heiner Kallweit
2019-08-08 19:03 ` [PATCH net-next 1/3] net: phy: prepare phylib to deal with PHY's extending Clause 22 Heiner Kallweit
2019-08-08 19:32 ` Andrew Lunn
2019-08-08 20:09 ` Heiner Kallweit
2019-08-08 19:04 ` [PATCH net-next 2/3] net: phy: add phy_modify_paged_changed Heiner Kallweit
2019-08-08 19:05 ` [PATCH net-next 3/3] net: phy: realtek: add support for the 2.5Gbps PHY in RTL8125 Heiner Kallweit
2019-08-08 19:37 ` Andrew Lunn
2019-08-08 19:46 ` Heiner Kallweit
2019-08-08 20:20 ` Andrew Lunn
2019-08-08 20:24 ` Heiner Kallweit
2019-09-02 2:07 ` Florian Fainelli
2019-09-02 6:07 ` Heiner Kallweit [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a37799d5-e2e0-7987-9f9d-0186060963a7@gmail.com \
--to=hkallweit1@gmail.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=f.fainelli@gmail.com \
--cc=netdev@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.