Re: [PATCH 1/2] ARM: dts: imx6dl-phytec-mira-nand: Enable all peripherals

[Primoz Fiser <primoz.fiser@norik.com>]

Hi,

On 9/30/26 12:40, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] dts: imx6dl-phytec-mira: missing m25p80 SPI NOR flash enablement
> --
> 
> commit 1324c8cd36593c2b5134e1d0d30d31d809ac1bc1
> Author: Primoz Fiser <primoz.fiser@norik.com>
> 
> ARM: dts: imx6dl-phytec-mira-nand: Enable all peripherals
> 
> This commit syncs the i.MX6 DL NAND variant device tree to match the Full
> Featured (FF) variants. It enables peripherals including CAN and PCIe, and
> removes the speed limit on the Ethernet PHY.
> 
>> diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-mira-rdk-nand.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-mira-rdk-nand.dts
>> index d906a7f05aaad..1f827ad2ff5ee 100644
>> --- a/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-mira-rdk-nand.dts
>> +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-mira-rdk-nand.dts
> 
> [ ... ]
> 
>> @@ -50,6 +50,10 @@ &i2c_rtc {
>>  	status = "okay";
>>  };
>>  
>> +&pcie {
>> +	status = "okay";
>> +};
>> +
> 
> [Severity: Medium]
> Did this omit the SPI NOR flash enablement?
> 
> The commit message states the intent to sync the i.MX6 DL NAND variant to
> match the Full Featured (FF) boards by enabling all peripherals.
> 
> The FF Quad variant (imx6q-phytec-mira-rdk-nand.dts) enables the SPI NOR flash
> by including &m25p80 { status = "okay"; };. While &can1, &pcie, and the
> unrestricted &ethphy are enabled, the &m25p80 node is missing here.
> 
> Does this leave the board missing its SPI flash feature and partially
> unsynchronized compared to the other FF variants?

I re-checked and this patch is actually wrong.

There was never i.MX6DL som with NAND + FF set board.

I will drop this patch in v2.

BR,
Primoz

> 
>>  &uart3 {
>>  	status = "okay";
>>  };
> 

-- 
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@norik.com
--
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