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From: Florian Fainelli <f.fainelli@gmail.com>
To: Jim Quinlan <james.quinlan@broadcom.com>,
	linux-pci@vger.kernel.org, Christoph Hellwig <hch@lst.de>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	bcm-kernel-feedback-list@broadcom.com
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
	<linux-rpi-kernel@lists.infradead.org>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 12/13] PCI: brcmstb: Set bus max burst size by chip type
Date: Wed, 3 Jun 2020 13:06:05 -0700	[thread overview]
Message-ID: <a3ec9783-5859-9729-e79a-e42b3ca02242@gmail.com> (raw)
In-Reply-To: <20200603192058.35296-13-james.quinlan@broadcom.com>



On 6/3/2020 12:20 PM, Jim Quinlan wrote:
> From: Jim Quinlan <jquinlan@broadcom.com>
> 
> The proper value of the parameter SCB_MAX_BURST_SIZE varies per chip.  The
> 2711 family requires 128B whereas other devices can employ 512.  The
> assignment is complicated by the fact that the values for this two-bit
> field have different meanings;
> 
>   Value   Type_Generic    Type_7278

It looks like Type_Generic and Type_7278 should be swapped in this
description. Other than that:

Acked-by: Florian Fainelli <f.fainelli@gmail.com>

> 
>      00       Reserved         128B
>      01           128B         256B
>      10           256B         512B
>      11           512B     Reserved
-- 
Florian

WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: Jim Quinlan <james.quinlan@broadcom.com>,
	linux-pci@vger.kernel.org, Christoph Hellwig <hch@lst.de>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	bcm-kernel-feedback-list@broadcom.com
Cc: Rob Herring <robh@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	open list <linux-kernel@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 12/13] PCI: brcmstb: Set bus max burst size by chip type
Date: Wed, 3 Jun 2020 13:06:05 -0700	[thread overview]
Message-ID: <a3ec9783-5859-9729-e79a-e42b3ca02242@gmail.com> (raw)
In-Reply-To: <20200603192058.35296-13-james.quinlan@broadcom.com>



On 6/3/2020 12:20 PM, Jim Quinlan wrote:
> From: Jim Quinlan <jquinlan@broadcom.com>
> 
> The proper value of the parameter SCB_MAX_BURST_SIZE varies per chip.  The
> 2711 family requires 128B whereas other devices can employ 512.  The
> assignment is complicated by the fact that the values for this two-bit
> field have different meanings;
> 
>   Value   Type_Generic    Type_7278

It looks like Type_Generic and Type_7278 should be swapped in this
description. Other than that:

Acked-by: Florian Fainelli <f.fainelli@gmail.com>

> 
>      00       Reserved         128B
>      01           128B         256B
>      10           256B         512B
>      11           512B     Reserved
-- 
Florian

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-06-03 20:06 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 19:20 [PATCH v3 00/13] PCI: brcmstb: enable PCIe for STB chips Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan via iommu
2020-06-03 19:20 ` [PATCH v3 01/13] PCI: brcmstb: PCIE_BRCMSTB depends on ARCH_BRCMSTB Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 02/13] ata: ahci_brcm: Fix use of BCM7216 reset controller Jim Quinlan
2020-06-04  2:57   ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 03/13] dt-bindings: PCI: Add bindings for more Brcmstb chips Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 04/13] PCI: brcmstb: Add bcm7278 reigister info Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:28   ` Florian Fainelli
2020-06-03 20:28     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 05/13] PCI: brcmstb: Add suspend and resume pm_ops Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:24   ` Bjorn Helgaas
2020-06-03 20:24     ` Bjorn Helgaas
2020-06-03 19:20 ` [PATCH v3 06/13] PCI: brcmstb: Add bcm7278 PERST support Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:28   ` Florian Fainelli
2020-06-03 20:28     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 07/13] PCI: brcmstb: Add control of rescal reset Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:30   ` Florian Fainelli
2020-06-03 20:30     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 08/13] of: Include a dev param in of_dma_get_range() Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 09/13] device core: Introduce multiple dma pfn offsets Jim Quinlan via iommu
2020-06-03 19:20   ` Jim Quinlan
2020-06-04 11:04   ` Dan Carpenter
2020-06-04 11:04     ` Dan Carpenter
2020-06-04 13:48     ` Jim Quinlan via iommu
2020-06-04 13:48       ` Jim Quinlan
2020-06-04 14:18       ` Dan Carpenter
2020-06-04 14:18         ` Dan Carpenter
2020-06-04 14:43         ` Jim Quinlan via iommu
2020-06-04 14:43           ` Jim Quinlan
2020-06-04 13:53   ` Nicolas Saenz Julienne
2020-06-04 13:53     ` Nicolas Saenz Julienne
2020-06-04 14:35     ` Jim Quinlan via iommu
2020-06-04 14:35       ` Jim Quinlan
2020-06-04 15:05       ` Andy Shevchenko
2020-06-04 15:05         ` Andy Shevchenko
2020-06-04 16:28         ` Jim Quinlan via iommu
2020-06-04 16:28           ` Jim Quinlan
2020-06-04 16:52       ` Nicolas Saenz Julienne
2020-06-04 16:52         ` Nicolas Saenz Julienne
2020-06-04 18:01         ` Jim Quinlan via iommu
2020-06-04 18:01           ` Jim Quinlan
2020-06-05 17:27           ` Nicolas Saenz Julienne
2020-06-05 17:27             ` Nicolas Saenz Julienne
2020-06-05 20:41             ` Jim Quinlan via iommu
2020-06-05 20:41               ` Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 10/13] PCI: brcmstb: Set internal memory viewport sizes Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:33   ` Florian Fainelli
2020-06-03 20:33     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 11/13] PCI: brcmstb: Accommodate MSI for older chips Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-04  2:56   ` Florian Fainelli
2020-06-04  2:56     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 12/13] PCI: brcmstb: Set bus max burst size by chip type Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:06   ` Florian Fainelli [this message]
2020-06-03 20:06     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 13/13] PCI: brcmstb: Add bcm7211, bcm7216, bcm7445, bcm7278 to match list Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:02   ` Florian Fainelli
2020-06-03 20:02     ` Florian Fainelli

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