From: <Conor.Dooley@microchip.com>
To: <geert@linux-m68k.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>
Cc: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
<Lewis.Hanly@microchip.com>, <krzysztof.kozlowski@canonical.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 06/11] riscv: dts: microchip: mpfs: Fix clock controller node
Date: Thu, 16 Dec 2021 14:47:13 +0000 [thread overview]
Message-ID: <a7442a30-a982-4e3f-e7f3-3e614fe5256b@microchip.com> (raw)
In-Reply-To: <ceb8d07363ae67a1dc1f1807d9e2709076607d24.1639660956.git.geert@linux-m68k.org>
On 16/12/2021 13:37, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Fix the device node for the clock controller:
> - Remove bogus "reg-names" property,
> - Remove unneeded "clock-output-names" property.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Ha, doing my job for me again - was hoping to send my v2 tomorrow too so
good timing on your part.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
(I have booted the 5 patches for the polarfire on my board, so
Tested-by: Conor Dooley <conor.dooley@microchip.com> too?)
> ---
> v2:
> - New.
> ---
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index b372bc6459bf163a..d9c1dee3fb25beb8 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -197,17 +197,8 @@ dma@3000000 {
> clkcfg: clkcfg@20002000 {
> compatible = "microchip,mpfs-clkcfg";
> reg = <0x0 0x20002000 0x0 0x1000>;
> - reg-names = "mss_sysreg";
> clocks = <&refclk>;
> #clock-cells = <1>;
> - clock-output-names = "cpu", "axi", "ahb", "envm", /* 0-3 */
> - "mac0", "mac1", "mmc", "timer", /* 4-7 */
> - "mmuart0", "mmuart1", "mmuart2", "mmuart3", /* 8-11 */
> - "mmuart4", "spi0", "spi1", "i2c0", /* 12-15 */
> - "i2c1", "can0", "can1", "usb", /* 16-19 */
> - "rsvd", "rtc", "qspi", "gpio0", /* 20-23 */
> - "gpio1", "gpio2", "ddrc", "fic0", /* 24-27 */
> - "fic1", "fic2", "fic3", "athena", "cfm"; /* 28-32 */
> };
>
> serial0: serial@20000000 {
> --
> 2.25.1
>
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WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <geert@linux-m68k.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>
Cc: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
<Lewis.Hanly@microchip.com>, <krzysztof.kozlowski@canonical.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 06/11] riscv: dts: microchip: mpfs: Fix clock controller node
Date: Thu, 16 Dec 2021 14:47:13 +0000 [thread overview]
Message-ID: <a7442a30-a982-4e3f-e7f3-3e614fe5256b@microchip.com> (raw)
In-Reply-To: <ceb8d07363ae67a1dc1f1807d9e2709076607d24.1639660956.git.geert@linux-m68k.org>
On 16/12/2021 13:37, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Fix the device node for the clock controller:
> - Remove bogus "reg-names" property,
> - Remove unneeded "clock-output-names" property.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Ha, doing my job for me again - was hoping to send my v2 tomorrow too so
good timing on your part.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
(I have booted the 5 patches for the polarfire on my board, so
Tested-by: Conor Dooley <conor.dooley@microchip.com> too?)
> ---
> v2:
> - New.
> ---
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index b372bc6459bf163a..d9c1dee3fb25beb8 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -197,17 +197,8 @@ dma@3000000 {
> clkcfg: clkcfg@20002000 {
> compatible = "microchip,mpfs-clkcfg";
> reg = <0x0 0x20002000 0x0 0x1000>;
> - reg-names = "mss_sysreg";
> clocks = <&refclk>;
> #clock-cells = <1>;
> - clock-output-names = "cpu", "axi", "ahb", "envm", /* 0-3 */
> - "mac0", "mac1", "mmc", "timer", /* 4-7 */
> - "mmuart0", "mmuart1", "mmuart2", "mmuart3", /* 8-11 */
> - "mmuart4", "spi0", "spi1", "i2c0", /* 12-15 */
> - "i2c1", "can0", "can1", "usb", /* 16-19 */
> - "rsvd", "rtc", "qspi", "gpio0", /* 20-23 */
> - "gpio1", "gpio2", "ddrc", "fic0", /* 24-27 */
> - "fic1", "fic2", "fic3", "athena", "cfm"; /* 28-32 */
> };
>
> serial0: serial@20000000 {
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-12-16 14:47 UTC|newest]
Thread overview: 123+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 13:37 [PATCH v2 00/11] riscv: dts: Miscellaneous fixes Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-08 10:40 ` [PATCH v3 0/3] Add Mali-G31 GPU support for RZ/G2L SoC Biju Das
2021-12-16 13:43 ` Geert Uytterhoeven
2021-12-16 13:43 ` Geert Uytterhoeven
2021-12-16 13:41 ` Geert Uytterhoeven
2021-12-16 13:41 ` Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-08 10:40 ` Biju Das
2021-12-08 10:40 ` [PATCH v3 1/3] dt-bindings: gpu: mali-bifrost: Document RZ/G2L support Biju Das
2021-12-08 10:40 ` Biju Das
2021-12-10 14:44 ` Biju Das
2021-12-10 14:44 ` Biju Das
2021-12-14 19:21 ` Rob Herring
2021-12-14 19:21 ` Rob Herring
2021-12-14 19:31 ` Biju Das
2021-12-14 19:31 ` Biju Das
2021-12-13 16:46 ` Steven Price
2021-12-13 16:46 ` Steven Price
2021-12-14 19:25 ` Rob Herring
2021-12-14 19:25 ` Rob Herring
2021-12-08 10:40 ` [PATCH v3 2/3] arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node Biju Das
2021-12-08 10:40 ` [PATCH v3 3/3] arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator Biju Das
2021-12-16 13:46 ` [PATCH v3 0/3] Add Mali-G31 GPU support for RZ/G2L SoC Geert Uytterhoeven
2021-12-16 13:46 ` Geert Uytterhoeven
2021-12-16 13:46 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 14:00 ` Daniel Stone
2021-12-16 14:00 ` Daniel Stone
2021-12-16 14:02 ` Biju Das
2021-12-16 14:02 ` Biju Das
2021-12-15 15:46 ` [PATCH v4 0/4] Renesas RZ/N1 NAND controller support Miquel Raynal
2021-12-16 13:43 ` Geert Uytterhoeven
2021-12-16 13:43 ` Geert Uytterhoeven
2021-12-16 13:41 ` Geert Uytterhoeven
2021-12-16 13:41 ` Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-15 15:46 ` Miquel Raynal
2021-12-15 15:46 ` [PATCH v4 1/4] dt-bindings: mtd: rzn1: Describe Renesas RZ/N1 NAND controller Miquel Raynal
2021-12-15 15:46 ` Miquel Raynal
2021-12-16 20:23 ` Rob Herring
2021-12-16 20:23 ` Rob Herring
2021-12-15 15:46 ` [PATCH v4 2/4] mtd: rawnand: rzn1: Add new NAND controller driver Miquel Raynal
2021-12-15 15:46 ` Miquel Raynal
2021-12-15 20:35 ` kernel test robot
2021-12-15 20:35 ` kernel test robot
2021-12-15 20:35 ` kernel test robot
2021-12-15 15:46 ` [PATCH v4 3/4] MAINTAINERS: Add an entry for Renesas RZ/N1 NAND controller Miquel Raynal
2021-12-15 15:46 ` Miquel Raynal
2021-12-15 15:46 ` [PATCH v4 4/4] ARM: dts: r9a06g032: Describe " Miquel Raynal
2021-12-15 15:46 ` Miquel Raynal
2021-12-16 9:13 ` Geert Uytterhoeven
2021-12-16 9:13 ` Geert Uytterhoeven
2021-12-16 13:47 ` [PATCH v4 0/4] Renesas RZ/N1 NAND controller support Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:47 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:48 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 01/11] riscv: dts: canaan: Fix SPI FLASH node names Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 02/11] riscv: dts: canaan: Group tuples in interrupt properties Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 03/11] riscv: dts: microchip: mpfs: Drop empty chosen node Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 04/11] riscv: dts: microchip: mpfs: Fix PLIC node Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 05/11] riscv: dts: microchip: mpfs: Fix reference clock node Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 14:39 ` Conor.Dooley
2021-12-16 14:39 ` Conor.Dooley
2021-12-16 13:37 ` [PATCH v2 06/11] riscv: dts: microchip: mpfs: Fix clock controller node Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 14:47 ` Conor.Dooley [this message]
2021-12-16 14:47 ` Conor.Dooley
2021-12-16 13:37 ` [PATCH v2 07/11] riscv: dts: microchip: mpfs: Group tuples in interrupt properties Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 08/11] riscv: dts: sifive: " Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 09/11] riscv: dts: sifive: Group tuples in register properties Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 10/11] riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible values Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
2021-12-16 13:37 ` [PATCH v2 11/11] riscv: dts: sifive: fu540-c000: Fix PLIC node Geert Uytterhoeven
2021-12-16 13:37 ` Geert Uytterhoeven
-- strict thread matches above, loose matches on Subject: below --
2021-12-16 13:41 [PATCH v2 0/2] dt-bindings: interrupt-controller: sifive, plic: Miscellaneous improvements Geert Uytterhoeven
2021-12-16 13:41 ` [PATCH v2 0/2] dt-bindings: interrupt-controller: sifive,plic: " Geert Uytterhoeven
2021-12-16 13:41 ` [PATCH v2 1/2] dt-bindings: interrupt-controller: sifive, plic: Fix number of interrupts Geert Uytterhoeven
2021-12-16 13:41 ` [PATCH v2 1/2] dt-bindings: interrupt-controller: sifive,plic: " Geert Uytterhoeven
2021-12-16 21:29 ` Rob Herring
2021-12-16 21:29 ` Rob Herring
2021-12-16 13:41 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: sifive, plic: Group interrupt tuples Geert Uytterhoeven
2021-12-16 13:41 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: sifive,plic: " Geert Uytterhoeven
2021-12-16 21:29 ` Rob Herring
2021-12-16 21:29 ` Rob Herring
2021-12-16 21:28 ` [PATCH v2 0/2] dt-bindings: interrupt-controller: sifive,plic: Miscellaneous improvements Rob Herring
2021-12-16 21:28 ` Rob Herring
2021-12-17 8:02 ` Geert Uytterhoeven
2021-12-17 8:02 ` Geert Uytterhoeven
2021-12-16 13:43 [PATCH v2 0/2] dt-bindings: timer: sifive, clint: " Geert Uytterhoeven
2021-12-16 13:43 ` [PATCH v2 0/2] dt-bindings: timer: sifive,clint: " Geert Uytterhoeven
2021-12-16 13:43 ` [PATCH v2 1/2] dt-bindings: timer: sifive, clint: Fix number of interrupts Geert Uytterhoeven
2021-12-16 13:43 ` [PATCH v2 1/2] dt-bindings: timer: sifive,clint: " Geert Uytterhoeven
2021-12-16 21:30 ` Rob Herring
2021-12-16 21:30 ` Rob Herring
2021-12-16 13:43 ` [PATCH v2 2/2] dt-bindings: timer: sifive, clint: Group interrupt tuples Geert Uytterhoeven
2021-12-16 13:43 ` [PATCH v2 2/2] dt-bindings: timer: sifive,clint: " Geert Uytterhoeven
2021-12-16 21:30 ` [PATCH v2 2/2] dt-bindings: timer: sifive, clint: " Rob Herring
2021-12-16 21:30 ` [PATCH v2 2/2] dt-bindings: timer: sifive,clint: " Rob Herring
2021-12-20 12:20 ` [PATCH v2 0/2] dt-bindings: timer: sifive,clint: Miscellaneous improvements Daniel Lezcano
2021-12-20 12:20 ` Daniel Lezcano
2021-12-20 12:22 ` Daniel Lezcano
2021-12-20 12:22 ` Daniel Lezcano
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