* [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa @ 2019-07-03 16:59 ` Chris Wilson 0 siblings, 0 replies; 10+ messages in thread From: Chris Wilson @ 2019-07-03 16:59 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev, Tvrtko Ursulin To reduce the assumptions of RCS0 in the kernel, we want to make the debugfs engine agnostic and so we need to adapt the igt parser for flexibility. If we could just adequately simulate S3/S4 in the kernel we could forgo this test entirely... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- tests/i915/gem_workarounds.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c index 403863c0b..81c356f06 100644 --- a/tests/i915/gem_workarounds.c +++ b/tests/i915/gem_workarounds.c @@ -249,6 +249,7 @@ igt_main igt_fixture { FILE *file; char *line = NULL; + char *str; size_t line_size; int i, fd; @@ -261,9 +262,13 @@ igt_main fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); file = fdopen(fd, "r"); - igt_assert(getline(&line, &line_size, file) > 0); + igt_require(getline(&line, &line_size, file) > 0); igt_debug("i915_wa_registers: %s", line); - sscanf(line, "Workarounds applied: %d", &num_wa_regs); + + /* We assume that the first batch is for rcs */ + str = strstr(line, "Workarounds applied:"); + igt_assert(str); + sscanf(str, "Workarounds applied: %d", &num_wa_regs); igt_require(num_wa_regs > 0); wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); @@ -271,6 +276,9 @@ igt_main i = 0; while (getline(&line, &line_size, file) > 0) { + if (strstr(line, "Workarounds applied:")) + break; + igt_debug("%s", line); if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", &wa_regs[i].addr, -- 2.20.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa @ 2019-07-03 16:59 ` Chris Wilson 0 siblings, 0 replies; 10+ messages in thread From: Chris Wilson @ 2019-07-03 16:59 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev To reduce the assumptions of RCS0 in the kernel, we want to make the debugfs engine agnostic and so we need to adapt the igt parser for flexibility. If we could just adequately simulate S3/S4 in the kernel we could forgo this test entirely... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- tests/i915/gem_workarounds.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c index 403863c0b..81c356f06 100644 --- a/tests/i915/gem_workarounds.c +++ b/tests/i915/gem_workarounds.c @@ -249,6 +249,7 @@ igt_main igt_fixture { FILE *file; char *line = NULL; + char *str; size_t line_size; int i, fd; @@ -261,9 +262,13 @@ igt_main fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); file = fdopen(fd, "r"); - igt_assert(getline(&line, &line_size, file) > 0); + igt_require(getline(&line, &line_size, file) > 0); igt_debug("i915_wa_registers: %s", line); - sscanf(line, "Workarounds applied: %d", &num_wa_regs); + + /* We assume that the first batch is for rcs */ + str = strstr(line, "Workarounds applied:"); + igt_assert(str); + sscanf(str, "Workarounds applied: %d", &num_wa_regs); igt_require(num_wa_regs > 0); wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); @@ -271,6 +276,9 @@ igt_main i = 0; while (getline(&line, &line_size, file) > 0) { + if (strstr(line, "Workarounds applied:")) + break; + igt_debug("%s", line); if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", &wa_regs[i].addr, -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_workarounds: Adapt to change in file format for per-engine wa 2019-07-03 16:59 ` Chris Wilson (?) @ 2019-07-03 18:15 ` Patchwork -1 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2019-07-03 18:15 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev == Series Details == Series: i915/gem_workarounds: Adapt to change in file format for per-engine wa URL : https://patchwork.freedesktop.org/series/63158/ State : success == Summary == CI Bug Log - changes from IGT_5082 -> IGTPW_3238 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/63158/revisions/1/mbox/ Known issues ------------ Here are the changes found in IGTPW_3238 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_getparams_basic@basic-eu-total: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-icl-u3/igt@i915_getparams_basic@basic-eu-total.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-icl-u3/igt@i915_getparams_basic@basic-eu-total.html * igt@kms_busy@basic-flip-c: - fi-skl-6770hq: [PASS][3] -> [SKIP][4] ([fdo#109271] / [fdo#109278]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: [PASS][5] -> [SKIP][6] ([fdo#109271]) +23 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s3: - fi-glk-dsi: [INCOMPLETE][7] ([fdo#103359] / [k.org#198133]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-glk-dsi/igt@gem_exec_suspend@basic-s3.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-glk-dsi/igt@gem_exec_suspend@basic-s3.html * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [INCOMPLETE][9] ([fdo#107718]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live_sanitycheck: - fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html * igt@kms_chamelium@dp-crc-fast: - fi-cml-u2: [FAIL][13] ([fdo#110387]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: [FAIL][15] ([fdo#103167]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html - fi-icl-u2: [FAIL][17] ([fdo#103167]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387 [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 Participating hosts (55 -> 47) ------------------------------ Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * IGT: IGT_5082 -> IGTPW_3238 CI_DRM_6404: 1b853e6e181c6015faca908b57956ea836e1f440 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3238: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/ IGT_5082: f7c51e6fbf8da0784b64a1edaee5266aa9b9f829 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/ _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa 2019-07-03 16:59 ` Chris Wilson @ 2019-07-04 9:51 ` Tvrtko Ursulin -1 siblings, 0 replies; 10+ messages in thread From: Tvrtko Ursulin @ 2019-07-04 9:51 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: igt-dev, Tvrtko Ursulin On 03/07/2019 17:59, Chris Wilson wrote: > To reduce the assumptions of RCS0 in the kernel, we want to make the > debugfs engine agnostic and so we need to adapt the igt parser for > flexibility. > > If we could just adequately simulate S3/S4 in the kernel we could forgo > this test entirely... > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > tests/i915/gem_workarounds.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c > index 403863c0b..81c356f06 100644 > --- a/tests/i915/gem_workarounds.c > +++ b/tests/i915/gem_workarounds.c > @@ -249,6 +249,7 @@ igt_main > igt_fixture { > FILE *file; > char *line = NULL; > + char *str; > size_t line_size; > int i, fd; > > @@ -261,9 +262,13 @@ igt_main > > fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); > file = fdopen(fd, "r"); > - igt_assert(getline(&line, &line_size, file) > 0); > + igt_require(getline(&line, &line_size, file) > 0); > igt_debug("i915_wa_registers: %s", line); > - sscanf(line, "Workarounds applied: %d", &num_wa_regs); > + > + /* We assume that the first batch is for rcs */ I think you mean "first line". > + str = strstr(line, "Workarounds applied:"); > + igt_assert(str); > + sscanf(str, "Workarounds applied: %d", &num_wa_regs); > igt_require(num_wa_regs > 0); I have a suspicion all the above section could be simplified using fscanf and just checking return value and errno but that would be asking for too much work for what this is. > > wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); > @@ -271,6 +276,9 @@ igt_main > > i = 0; > while (getline(&line, &line_size, file) > 0) { > + if (strstr(line, "Workarounds applied:")) > + break; > + > igt_debug("%s", line); > if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", > &wa_regs[i].addr, > I just had a thought that since we are fiddling with this we should add engine names into strings. And/or class:instance pairs. Regards, Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa @ 2019-07-04 9:51 ` Tvrtko Ursulin 0 siblings, 0 replies; 10+ messages in thread From: Tvrtko Ursulin @ 2019-07-04 9:51 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: igt-dev On 03/07/2019 17:59, Chris Wilson wrote: > To reduce the assumptions of RCS0 in the kernel, we want to make the > debugfs engine agnostic and so we need to adapt the igt parser for > flexibility. > > If we could just adequately simulate S3/S4 in the kernel we could forgo > this test entirely... > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > tests/i915/gem_workarounds.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c > index 403863c0b..81c356f06 100644 > --- a/tests/i915/gem_workarounds.c > +++ b/tests/i915/gem_workarounds.c > @@ -249,6 +249,7 @@ igt_main > igt_fixture { > FILE *file; > char *line = NULL; > + char *str; > size_t line_size; > int i, fd; > > @@ -261,9 +262,13 @@ igt_main > > fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); > file = fdopen(fd, "r"); > - igt_assert(getline(&line, &line_size, file) > 0); > + igt_require(getline(&line, &line_size, file) > 0); > igt_debug("i915_wa_registers: %s", line); > - sscanf(line, "Workarounds applied: %d", &num_wa_regs); > + > + /* We assume that the first batch is for rcs */ I think you mean "first line". > + str = strstr(line, "Workarounds applied:"); > + igt_assert(str); > + sscanf(str, "Workarounds applied: %d", &num_wa_regs); > igt_require(num_wa_regs > 0); I have a suspicion all the above section could be simplified using fscanf and just checking return value and errno but that would be asking for too much work for what this is. > > wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); > @@ -271,6 +276,9 @@ igt_main > > i = 0; > while (getline(&line, &line_size, file) > 0) { > + if (strstr(line, "Workarounds applied:")) > + break; > + > igt_debug("%s", line); > if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", > &wa_regs[i].addr, > I just had a thought that since we are fiddling with this we should add engine names into strings. And/or class:instance pairs. Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa 2019-07-04 9:51 ` Tvrtko Ursulin @ 2019-07-04 9:58 ` Chris Wilson -1 siblings, 0 replies; 10+ messages in thread From: Chris Wilson @ 2019-07-04 9:58 UTC (permalink / raw) To: Tvrtko Ursulin, intel-gfx; +Cc: igt-dev, Tvrtko Ursulin Quoting Tvrtko Ursulin (2019-07-04 10:51:44) > > On 03/07/2019 17:59, Chris Wilson wrote: > > To reduce the assumptions of RCS0 in the kernel, we want to make the > > debugfs engine agnostic and so we need to adapt the igt parser for > > flexibility. > > > > If we could just adequately simulate S3/S4 in the kernel we could forgo > > this test entirely... > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > --- > > tests/i915/gem_workarounds.c | 12 ++++++++++-- > > 1 file changed, 10 insertions(+), 2 deletions(-) > > > > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c > > index 403863c0b..81c356f06 100644 > > --- a/tests/i915/gem_workarounds.c > > +++ b/tests/i915/gem_workarounds.c > > @@ -249,6 +249,7 @@ igt_main > > igt_fixture { > > FILE *file; > > char *line = NULL; > > + char *str; > > size_t line_size; > > int i, fd; > > > > @@ -261,9 +262,13 @@ igt_main > > > > fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); > > file = fdopen(fd, "r"); > > - igt_assert(getline(&line, &line_size, file) > 0); > > + igt_require(getline(&line, &line_size, file) > 0); > > igt_debug("i915_wa_registers: %s", line); > > - sscanf(line, "Workarounds applied: %d", &num_wa_regs); > > + > > + /* We assume that the first batch is for rcs */ > > I think you mean "first line". I was thinking of batch as in set of workarounds. > > + str = strstr(line, "Workarounds applied:"); > > + igt_assert(str); > > + sscanf(str, "Workarounds applied: %d", &num_wa_regs); > > igt_require(num_wa_regs > 0); > > I have a suspicion all the above section could be simplified using > fscanf and just checking return value and errno but that would be asking > for too much work for what this is. Speaking my language :) > > > > wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); > > @@ -271,6 +276,9 @@ igt_main > > > > i = 0; > > while (getline(&line, &line_size, file) > 0) { > > + if (strstr(line, "Workarounds applied:")) > > + break; > > + > > igt_debug("%s", line); > > if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", > > &wa_regs[i].addr, > > > > I just had a thought that since we are fiddling with this we should add > engine names into strings. And/or class:instance pairs. Expand upon that thought: where do you want this? I presume you are thinking of an igt helper for rcs0 -> class:RENDER, inst:0 -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa @ 2019-07-04 9:58 ` Chris Wilson 0 siblings, 0 replies; 10+ messages in thread From: Chris Wilson @ 2019-07-04 9:58 UTC (permalink / raw) To: Tvrtko Ursulin, intel-gfx; +Cc: igt-dev Quoting Tvrtko Ursulin (2019-07-04 10:51:44) > > On 03/07/2019 17:59, Chris Wilson wrote: > > To reduce the assumptions of RCS0 in the kernel, we want to make the > > debugfs engine agnostic and so we need to adapt the igt parser for > > flexibility. > > > > If we could just adequately simulate S3/S4 in the kernel we could forgo > > this test entirely... > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > --- > > tests/i915/gem_workarounds.c | 12 ++++++++++-- > > 1 file changed, 10 insertions(+), 2 deletions(-) > > > > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c > > index 403863c0b..81c356f06 100644 > > --- a/tests/i915/gem_workarounds.c > > +++ b/tests/i915/gem_workarounds.c > > @@ -249,6 +249,7 @@ igt_main > > igt_fixture { > > FILE *file; > > char *line = NULL; > > + char *str; > > size_t line_size; > > int i, fd; > > > > @@ -261,9 +262,13 @@ igt_main > > > > fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); > > file = fdopen(fd, "r"); > > - igt_assert(getline(&line, &line_size, file) > 0); > > + igt_require(getline(&line, &line_size, file) > 0); > > igt_debug("i915_wa_registers: %s", line); > > - sscanf(line, "Workarounds applied: %d", &num_wa_regs); > > + > > + /* We assume that the first batch is for rcs */ > > I think you mean "first line". I was thinking of batch as in set of workarounds. > > + str = strstr(line, "Workarounds applied:"); > > + igt_assert(str); > > + sscanf(str, "Workarounds applied: %d", &num_wa_regs); > > igt_require(num_wa_regs > 0); > > I have a suspicion all the above section could be simplified using > fscanf and just checking return value and errno but that would be asking > for too much work for what this is. Speaking my language :) > > > > wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); > > @@ -271,6 +276,9 @@ igt_main > > > > i = 0; > > while (getline(&line, &line_size, file) > 0) { > > + if (strstr(line, "Workarounds applied:")) > > + break; > > + > > igt_debug("%s", line); > > if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", > > &wa_regs[i].addr, > > > > I just had a thought that since we are fiddling with this we should add > engine names into strings. And/or class:instance pairs. Expand upon that thought: where do you want this? I presume you are thinking of an igt helper for rcs0 -> class:RENDER, inst:0 -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa 2019-07-04 9:58 ` Chris Wilson @ 2019-07-04 10:05 ` Tvrtko Ursulin -1 siblings, 0 replies; 10+ messages in thread From: Tvrtko Ursulin @ 2019-07-04 10:05 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: igt-dev, Tvrtko Ursulin On 04/07/2019 10:58, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2019-07-04 10:51:44) >> >> On 03/07/2019 17:59, Chris Wilson wrote: >>> To reduce the assumptions of RCS0 in the kernel, we want to make the >>> debugfs engine agnostic and so we need to adapt the igt parser for >>> flexibility. >>> >>> If we could just adequately simulate S3/S4 in the kernel we could forgo >>> this test entirely... >>> >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>> --- >>> tests/i915/gem_workarounds.c | 12 ++++++++++-- >>> 1 file changed, 10 insertions(+), 2 deletions(-) >>> >>> diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c >>> index 403863c0b..81c356f06 100644 >>> --- a/tests/i915/gem_workarounds.c >>> +++ b/tests/i915/gem_workarounds.c >>> @@ -249,6 +249,7 @@ igt_main >>> igt_fixture { >>> FILE *file; >>> char *line = NULL; >>> + char *str; >>> size_t line_size; >>> int i, fd; >>> >>> @@ -261,9 +262,13 @@ igt_main >>> >>> fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); >>> file = fdopen(fd, "r"); >>> - igt_assert(getline(&line, &line_size, file) > 0); >>> + igt_require(getline(&line, &line_size, file) > 0); >>> igt_debug("i915_wa_registers: %s", line); >>> - sscanf(line, "Workarounds applied: %d", &num_wa_regs); >>> + >>> + /* We assume that the first batch is for rcs */ >> >> I think you mean "first line". > > I was thinking of batch as in set of workarounds. Ok :) >>> + str = strstr(line, "Workarounds applied:"); >>> + igt_assert(str); >>> + sscanf(str, "Workarounds applied: %d", &num_wa_regs); >>> igt_require(num_wa_regs > 0); >> >> I have a suspicion all the above section could be simplified using >> fscanf and just checking return value and errno but that would be asking >> for too much work for what this is. > > Speaking my language :) > >>> >>> wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); >>> @@ -271,6 +276,9 @@ igt_main >>> >>> i = 0; >>> while (getline(&line, &line_size, file) > 0) { >>> + if (strstr(line, "Workarounds applied:")) >>> + break; >>> + >>> igt_debug("%s", line); >>> if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", >>> &wa_regs[i].addr, >>> >> >> I just had a thought that since we are fiddling with this we should add >> engine names into strings. And/or class:instance pairs. > > Expand upon that thought: where do you want this? I presume you are > thinking of an igt helper for rcs0 -> class:RENDER, inst:0 I now see you already did it in the i915 patch: + seq_printf(m, "%s: Workarounds applied: %u\n", + engine->name, count); So nothing really. IGT can be extended later if needed. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa @ 2019-07-04 10:05 ` Tvrtko Ursulin 0 siblings, 0 replies; 10+ messages in thread From: Tvrtko Ursulin @ 2019-07-04 10:05 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: igt-dev On 04/07/2019 10:58, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2019-07-04 10:51:44) >> >> On 03/07/2019 17:59, Chris Wilson wrote: >>> To reduce the assumptions of RCS0 in the kernel, we want to make the >>> debugfs engine agnostic and so we need to adapt the igt parser for >>> flexibility. >>> >>> If we could just adequately simulate S3/S4 in the kernel we could forgo >>> this test entirely... >>> >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>> --- >>> tests/i915/gem_workarounds.c | 12 ++++++++++-- >>> 1 file changed, 10 insertions(+), 2 deletions(-) >>> >>> diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c >>> index 403863c0b..81c356f06 100644 >>> --- a/tests/i915/gem_workarounds.c >>> +++ b/tests/i915/gem_workarounds.c >>> @@ -249,6 +249,7 @@ igt_main >>> igt_fixture { >>> FILE *file; >>> char *line = NULL; >>> + char *str; >>> size_t line_size; >>> int i, fd; >>> >>> @@ -261,9 +262,13 @@ igt_main >>> >>> fd = igt_debugfs_open(device, "i915_wa_registers", O_RDONLY); >>> file = fdopen(fd, "r"); >>> - igt_assert(getline(&line, &line_size, file) > 0); >>> + igt_require(getline(&line, &line_size, file) > 0); >>> igt_debug("i915_wa_registers: %s", line); >>> - sscanf(line, "Workarounds applied: %d", &num_wa_regs); >>> + >>> + /* We assume that the first batch is for rcs */ >> >> I think you mean "first line". > > I was thinking of batch as in set of workarounds. Ok :) >>> + str = strstr(line, "Workarounds applied:"); >>> + igt_assert(str); >>> + sscanf(str, "Workarounds applied: %d", &num_wa_regs); >>> igt_require(num_wa_regs > 0); >> >> I have a suspicion all the above section could be simplified using >> fscanf and just checking return value and errno but that would be asking >> for too much work for what this is. > > Speaking my language :) > >>> >>> wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); >>> @@ -271,6 +276,9 @@ igt_main >>> >>> i = 0; >>> while (getline(&line, &line_size, file) > 0) { >>> + if (strstr(line, "Workarounds applied:")) >>> + break; >>> + >>> igt_debug("%s", line); >>> if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", >>> &wa_regs[i].addr, >>> >> >> I just had a thought that since we are fiddling with this we should add >> engine names into strings. And/or class:instance pairs. > > Expand upon that thought: where do you want this? I presume you are > thinking of an igt helper for rcs0 -> class:RENDER, inst:0 I now see you already did it in the i915 patch: + seq_printf(m, "%s: Workarounds applied: %u\n", + engine->name, count); So nothing really. IGT can be extended later if needed. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_workarounds: Adapt to change in file format for per-engine wa 2019-07-03 16:59 ` Chris Wilson ` (2 preceding siblings ...) (?) @ 2019-07-04 20:05 ` Patchwork -1 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2019-07-04 20:05 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev == Series Details == Series: i915/gem_workarounds: Adapt to change in file format for per-engine wa URL : https://patchwork.freedesktop.org/series/63158/ State : failure == Summary == CI Bug Log - changes from IGT_5082_full -> IGTPW_3238_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_3238_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_3238_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/63158/revisions/1/mbox/ Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_3238_full: ### IGT changes ### #### Possible regressions #### * igt@perf_pmu@busy-double-start-vecs0: - shard-kbl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-kbl2/igt@perf_pmu@busy-double-start-vecs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-kbl2/igt@perf_pmu@busy-double-start-vecs0.html Known issues ------------ Here are the changes found in IGTPW_3238_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_busy@close-race: - shard-kbl: [PASS][3] -> [DMESG-FAIL][4] ([fdo#111063]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-kbl1/igt@gem_busy@close-race.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-kbl6/igt@gem_busy@close-race.html * igt@gem_ctx_isolation@vcs0-s3: - shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-kbl3/igt@gem_ctx_isolation@vcs0-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-kbl2/igt@gem_ctx_isolation@vcs0-s3.html * igt@gem_exec_balancer@nop: - shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#107713]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb3/igt@gem_exec_balancer@nop.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb1/igt@gem_exec_balancer@nop.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#110854]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb2/igt@gem_exec_balancer@smoke.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb6/igt@gem_exec_balancer@smoke.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108686] / [fdo#110853]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-kbl4/igt@gem_tiled_swapping@non-threaded.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-kbl2/igt@gem_tiled_swapping@non-threaded.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#105363]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt: - shard-glk: [PASS][17] -> [FAIL][18] ([fdo#103167]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-stridechange.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-stridechange.html * igt@kms_psr@psr2_primary_blt: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb2/igt@kms_psr@psr2_primary_blt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb5/igt@kms_psr@psr2_primary_blt.html * igt@kms_setmode@basic: - shard-apl: [PASS][23] -> [FAIL][24] ([fdo#99912]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-apl6/igt@kms_setmode@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-apl7/igt@kms_setmode@basic.html #### Possible fixes #### * igt@gem_busy@close-race: - shard-snb: [DMESG-FAIL][25] -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-snb2/igt@gem_busy@close-race.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-snb2/igt@gem_busy@close-race.html * igt@gem_eio@unwedge-stress: - shard-snb: [FAIL][27] ([fdo#109661]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-snb7/igt@gem_eio@unwedge-stress.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-snb7/igt@gem_eio@unwedge-stress.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [FAIL][29] ([fdo#104873]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@flip-vs-expired-vblank: - shard-glk: [FAIL][31] ([fdo#105363]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-glk9/igt@kms_flip@flip-vs-expired-vblank.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-glk8/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-apl: [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-apl3/igt@kms_flip@flip-vs-suspend.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-apl2/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-kbl: [DMESG-WARN][35] ([fdo#103313]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [FAIL][37] ([fdo#103167]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [FAIL][39] ([fdo#103166]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-y.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-y.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [SKIP][41] ([fdo#109642] / [fdo#111068]) -> [PASS][42] +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb7/igt@kms_psr2_su@frontbuffer.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb2/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [SKIP][43] ([fdo#109441]) -> [PASS][44] +3 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html * igt@prime_busy@wait-hang-bsd: - shard-hsw: [INCOMPLETE][45] ([fdo#103540]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5082/shard-hsw7/igt@prime_busy@wait-hang-bsd.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/shard-hsw4/igt@prime_busy@wait-hang-bsd.html [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661 [fdo#110853]: https://bugs.freedesktop.org/show_bug.cgi?id=110853 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#111063]: https://bugs.freedesktop.org/show_bug.cgi?id=111063 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (7 -> 6) ------------------------------ Missing (1): shard-skl Build changes ------------- * IGT: IGT_5082 -> IGTPW_3238 CI_DRM_6404: 1b853e6e181c6015faca908b57956ea836e1f440 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3238: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/ IGT_5082: f7c51e6fbf8da0784b64a1edaee5266aa9b9f829 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3238/ _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-07-04 20:05 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-07-03 16:59 [igt-dev] [PATCH i-g-t] i915/gem_workarounds: Adapt to change in file format for per-engine wa Chris Wilson 2019-07-03 16:59 ` Chris Wilson 2019-07-03 18:15 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork 2019-07-04 9:51 ` [igt-dev] [PATCH i-g-t] " Tvrtko Ursulin 2019-07-04 9:51 ` Tvrtko Ursulin 2019-07-04 9:58 ` Chris Wilson 2019-07-04 9:58 ` Chris Wilson 2019-07-04 10:05 ` Tvrtko Ursulin 2019-07-04 10:05 ` Tvrtko Ursulin 2019-07-04 20:05 ` [igt-dev] ✗ Fi.CI.IGT: failure for " Patchwork
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.