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From: Niklas Cassel <cassel@kernel.org>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v4 3/3] PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to .init()
Date: Thu, 17 Apr 2025 08:25:08 +0200	[thread overview]
Message-ID: <aACexEN4wEv5fIMC@ryzen> (raw)
In-Reply-To: <1744850111-236269-3-git-send-email-shawn.lin@rock-chips.com>

On Thu, Apr 17, 2025 at 08:35:11AM +0800, Shawn Lin wrote:
> There is no reason to call rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
> from the pre_init() callback, instead of the normal init() callback.
> 
> Thus, move the rockchip_pcie_ep_hide_broken_ats_cap_rk3588() call from
> the pre_init() callback to the init() callback, as:
> 1) init() will still be called before link training is enabled, so the
>    quirk will still be applied before the host has can see our device.
> 2) This allows us to remove the pre_init() callback, as it is now unused.
> 3) It is a more robust design, as the init() callback is called by
>    dw_pcie_ep_init_registers(), which will always be called after a core
>    reset. The pre_init() callback is only called once, at probe time.
> 
> No functional changes.
> 
> Suggested-by: Niklas Cassel <cassel@kernel.org>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---

Reviewed-by: Niklas Cassel <cassel@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v4 3/3] PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to .init()
Date: Thu, 17 Apr 2025 08:25:08 +0200	[thread overview]
Message-ID: <aACexEN4wEv5fIMC@ryzen> (raw)
In-Reply-To: <1744850111-236269-3-git-send-email-shawn.lin@rock-chips.com>

On Thu, Apr 17, 2025 at 08:35:11AM +0800, Shawn Lin wrote:
> There is no reason to call rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
> from the pre_init() callback, instead of the normal init() callback.
> 
> Thus, move the rockchip_pcie_ep_hide_broken_ats_cap_rk3588() call from
> the pre_init() callback to the init() callback, as:
> 1) init() will still be called before link training is enabled, so the
>    quirk will still be applied before the host has can see our device.
> 2) This allows us to remove the pre_init() callback, as it is now unused.
> 3) It is a more robust design, as the init() callback is called by
>    dw_pcie_ep_init_registers(), which will always be called after a core
>    reset. The pre_init() callback is only called once, at probe time.
> 
> No functional changes.
> 
> Suggested-by: Niklas Cassel <cassel@kernel.org>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---

Reviewed-by: Niklas Cassel <cassel@kernel.org>

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2025-04-17  6:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-17  0:35 [PATCH v4 1/3] PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up() Shawn Lin
2025-04-17  0:35 ` Shawn Lin
2025-04-17  0:35 ` [PATCH v4 2/3] PCI: dw-rockchip: Enable L0S capability Shawn Lin
2025-04-17  0:35   ` Shawn Lin
2025-04-26 16:37   ` Manivannan Sadhasivam
2025-04-26 16:37     ` Manivannan Sadhasivam
2025-04-17  0:35 ` [PATCH v4 3/3] PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to .init() Shawn Lin
2025-04-17  0:35   ` Shawn Lin
2025-04-17  6:25   ` Niklas Cassel [this message]
2025-04-17  6:25     ` Niklas Cassel
2025-04-26 16:38   ` Manivannan Sadhasivam
2025-04-26 16:38     ` Manivannan Sadhasivam
2025-04-17  6:07 ` [PATCH v4 1/3] PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up() Niklas Cassel
2025-04-17  6:07   ` Niklas Cassel
2025-04-26 16:31 ` Manivannan Sadhasivam
2025-04-26 16:31   ` Manivannan Sadhasivam
2025-04-27 11:25 ` Manivannan Sadhasivam
2025-04-27 11:25   ` Manivannan Sadhasivam

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