From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
heiko@sntech.de, manivannan.sadhasivam@linaro.org,
robh@kernel.org, jingoohan1@gmail.com, shawn.lin@rock-chips.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 2/3] PCI: dw-rockchip: Reorganize register and bitfield definitions
Date: Wed, 23 Apr 2025 19:50:16 +0200 [thread overview]
Message-ID: <aAkoWCtCS7Lxx3Gx@ryzen> (raw)
In-Reply-To: <20250423153214.16405-3-18255117159@163.com>
On Wed, Apr 23, 2025 at 11:32:13PM +0800, Hans Zhang wrote:
> Register definitions were scattered with ambiguous names (e.g.,
> PCIE_RDLH_LINK_UP_CHGED in PCIE_CLIENT_INTR_STATUS_MISC) and lacked
> hierarchical grouping. Magic values for bit operations reduced code
> clarity.
>
> Group registers and their associated bitfields logically. This improves
> maintainability and aligns the code with hardware documentation.
>
> Signed-off-by: Hans Zhang <18255117159@163.com>
> ---
Reviewed-by: Niklas Cassel <cassel@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
heiko@sntech.de, manivannan.sadhasivam@linaro.org,
robh@kernel.org, jingoohan1@gmail.com, shawn.lin@rock-chips.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 2/3] PCI: dw-rockchip: Reorganize register and bitfield definitions
Date: Wed, 23 Apr 2025 19:50:16 +0200 [thread overview]
Message-ID: <aAkoWCtCS7Lxx3Gx@ryzen> (raw)
In-Reply-To: <20250423153214.16405-3-18255117159@163.com>
On Wed, Apr 23, 2025 at 11:32:13PM +0800, Hans Zhang wrote:
> Register definitions were scattered with ambiguous names (e.g.,
> PCIE_RDLH_LINK_UP_CHGED in PCIE_CLIENT_INTR_STATUS_MISC) and lacked
> hierarchical grouping. Magic values for bit operations reduced code
> clarity.
>
> Group registers and their associated bitfields logically. This improves
> maintainability and aligns the code with hardware documentation.
>
> Signed-off-by: Hans Zhang <18255117159@163.com>
> ---
Reviewed-by: Niklas Cassel <cassel@kernel.org>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-04-23 18:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 15:32 [PATCH v3 0/3] PCI: dw-rockchip: Reorganize register and bitfield definitions Hans Zhang
2025-04-23 15:32 ` Hans Zhang
2025-04-23 15:32 ` [PATCH v3 1/3] PCI: dw-rockchip: Remove unused PCIE_CLIENT_GENERAL_DEBUG Hans Zhang
2025-04-23 15:32 ` Hans Zhang
2025-04-23 15:32 ` [PATCH v3 2/3] PCI: dw-rockchip: Reorganize register and bitfield definitions Hans Zhang
2025-04-23 15:32 ` Hans Zhang
2025-04-23 17:50 ` Niklas Cassel [this message]
2025-04-23 17:50 ` Niklas Cassel
2025-04-23 15:32 ` [PATCH v3 3/3] PCI: dw-rockchip: Unify link status checks with FIELD_GET Hans Zhang
2025-04-23 15:32 ` Hans Zhang
2025-04-26 16:40 ` [PATCH v3 0/3] PCI: dw-rockchip: Reorganize register and bitfield definitions Manivannan Sadhasivam
2025-04-26 16:40 ` Manivannan Sadhasivam
2025-04-27 11:10 ` Manivannan Sadhasivam
2025-04-27 11:10 ` Manivannan Sadhasivam
2025-04-27 12:59 ` Hans Zhang
2025-04-27 12:59 ` Hans Zhang
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