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From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	heiko@sntech.de, manivannan.sadhasivam@linaro.org,
	yue.wang@amlogic.com, pali@kernel.org, neil.armstrong@linaro.org,
	robh@kernel.org, jingoohan1@gmail.com, khilman@baylibre.com,
	jbrunet@baylibre.com, martin.blumenstingl@googlemail.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 1/3] PCI: Configure root port MPS during host probing
Date: Wed, 7 May 2025 09:38:03 +0200	[thread overview]
Message-ID: <aBsN2_YG0RsH4RPA@ryzen> (raw)
In-Reply-To: <20250506173439.292460-2-18255117159@163.com>

On Wed, May 07, 2025 at 01:34:37AM +0800, Hans Zhang wrote:

(snip)

>  static void pci_configure_mps(struct pci_dev *dev)
>  {
>  	struct pci_dev *bridge = pci_upstream_bridge(dev);
> @@ -2178,6 +2209,10 @@ static void pci_configure_mps(struct pci_dev *dev)
>  		return;
>  	}

We should probably add a comment explaining why we are doing this here.

Perhaps something like:

/*
 * Unless MPS strategy is PCIE_BUS_TUNE_OFF (don't touch MPS at all),
 * start off by setting root ports' MPS to MPSS. Depending on the MPS
 * strategy, and the MPSS of the devices below the root port, the MPS
 * of the root port might get overriden later.
 */


> +	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
> +	    pcie_bus_config != PCIE_BUS_TUNE_OFF)
> +		pcie_write_mps(dev, 128 << dev->pcie_mpss);
> +
>  	if (!bridge || !pci_is_pcie(bridge))
>  		return;
>  


Kind regards,
Niklas

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	heiko@sntech.de, manivannan.sadhasivam@linaro.org,
	yue.wang@amlogic.com, pali@kernel.org, neil.armstrong@linaro.org,
	robh@kernel.org, jingoohan1@gmail.com, khilman@baylibre.com,
	jbrunet@baylibre.com, martin.blumenstingl@googlemail.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 1/3] PCI: Configure root port MPS during host probing
Date: Wed, 7 May 2025 09:38:03 +0200	[thread overview]
Message-ID: <aBsN2_YG0RsH4RPA@ryzen> (raw)
In-Reply-To: <20250506173439.292460-2-18255117159@163.com>

On Wed, May 07, 2025 at 01:34:37AM +0800, Hans Zhang wrote:

(snip)

>  static void pci_configure_mps(struct pci_dev *dev)
>  {
>  	struct pci_dev *bridge = pci_upstream_bridge(dev);
> @@ -2178,6 +2209,10 @@ static void pci_configure_mps(struct pci_dev *dev)
>  		return;
>  	}

We should probably add a comment explaining why we are doing this here.

Perhaps something like:

/*
 * Unless MPS strategy is PCIE_BUS_TUNE_OFF (don't touch MPS at all),
 * start off by setting root ports' MPS to MPSS. Depending on the MPS
 * strategy, and the MPSS of the devices below the root port, the MPS
 * of the root port might get overriden later.
 */


> +	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
> +	    pcie_bus_config != PCIE_BUS_TUNE_OFF)
> +		pcie_write_mps(dev, 128 << dev->pcie_mpss);
> +
>  	if (!bridge || !pci_is_pcie(bridge))
>  		return;
>  


Kind regards,
Niklas


WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	heiko@sntech.de, manivannan.sadhasivam@linaro.org,
	yue.wang@amlogic.com, pali@kernel.org, neil.armstrong@linaro.org,
	robh@kernel.org, jingoohan1@gmail.com, khilman@baylibre.com,
	jbrunet@baylibre.com, martin.blumenstingl@googlemail.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 1/3] PCI: Configure root port MPS during host probing
Date: Wed, 7 May 2025 09:38:03 +0200	[thread overview]
Message-ID: <aBsN2_YG0RsH4RPA@ryzen> (raw)
In-Reply-To: <20250506173439.292460-2-18255117159@163.com>

On Wed, May 07, 2025 at 01:34:37AM +0800, Hans Zhang wrote:

(snip)

>  static void pci_configure_mps(struct pci_dev *dev)
>  {
>  	struct pci_dev *bridge = pci_upstream_bridge(dev);
> @@ -2178,6 +2209,10 @@ static void pci_configure_mps(struct pci_dev *dev)
>  		return;
>  	}

We should probably add a comment explaining why we are doing this here.

Perhaps something like:

/*
 * Unless MPS strategy is PCIE_BUS_TUNE_OFF (don't touch MPS at all),
 * start off by setting root ports' MPS to MPSS. Depending on the MPS
 * strategy, and the MPSS of the devices below the root port, the MPS
 * of the root port might get overriden later.
 */


> +	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
> +	    pcie_bus_config != PCIE_BUS_TUNE_OFF)
> +		pcie_write_mps(dev, 128 << dev->pcie_mpss);
> +
>  	if (!bridge || !pci_is_pcie(bridge))
>  		return;
>  


Kind regards,
Niklas

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2025-05-07  8:35 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06 17:34 [PATCH v3 0/3] Configure root port MPS during host probing Hans Zhang
2025-05-06 17:34 ` Hans Zhang
2025-05-06 17:34 ` Hans Zhang
2025-05-06 17:34 ` [PATCH v3 1/3] PCI: " Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-07  7:38   ` Niklas Cassel [this message]
2025-05-07  7:38     ` Niklas Cassel
2025-05-07  7:38     ` Niklas Cassel
2025-05-07 14:55     ` Hans Zhang
2025-05-07 14:55       ` Hans Zhang
2025-05-07 14:55       ` Hans Zhang
2025-05-06 17:34 ` [PATCH v3 2/3] PCI: dwc: Remove redundant MPS configuration Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-06 17:34 ` [PATCH v3 3/3] PCI: aardvark: " Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-06 17:34   ` Hans Zhang
2025-05-06 17:41   ` Pali Rohár
2025-05-06 17:41     ` Pali Rohár
2025-05-06 17:41     ` Pali Rohár
2025-05-07 15:03     ` Hans Zhang
2025-05-07 15:03       ` Hans Zhang
2025-05-07 15:03       ` Hans Zhang
2025-05-07 15:06       ` Hans Zhang
2025-05-07 15:06         ` Hans Zhang
2025-05-07 15:06         ` Hans Zhang
2025-05-07 16:36         ` Pali Rohár
2025-05-07 16:36           ` Pali Rohár
2025-05-07 16:36           ` Pali Rohár
2025-05-07 16:47           ` Hans Zhang
2025-05-07 16:47             ` Hans Zhang
2025-05-07 16:47             ` Hans Zhang
2025-05-08 11:53             ` Niklas Cassel
2025-05-08 11:53               ` Niklas Cassel
2025-05-08 11:53               ` Niklas Cassel
2025-05-08 16:12               ` Hans Zhang
2025-05-08 16:12                 ` Hans Zhang
2025-05-08 16:12                 ` Hans Zhang
2025-05-08 16:27                 ` Pali Rohár
2025-05-08 16:27                   ` Pali Rohár
2025-05-08 16:27                   ` Pali Rohár
2025-05-09  7:08           ` Manivannan Sadhasivam
2025-05-09  7:08             ` Manivannan Sadhasivam
2025-05-09  7:08             ` Manivannan Sadhasivam
2025-05-09 12:03             ` Hans Zhang
2025-05-09 12:03               ` Hans Zhang
2025-05-09 12:03               ` Hans Zhang
2025-05-09 16:00             ` Pali Rohár
2025-05-09 16:00               ` Pali Rohár
2025-05-09 16:00               ` Pali Rohár
2025-05-15 12:03               ` Manivannan Sadhasivam
2025-05-15 12:03                 ` Manivannan Sadhasivam
2025-05-15 12:03                 ` Manivannan Sadhasivam

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