From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: Wenbin Yao <quic_wenbyao@quicinc.com>,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, andersson@kernel.org,
konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
vkoul@kernel.org, kishon@kernel.org, sfr@canb.auug.org.au,
linux-phy@lists.infradead.org, krishna.chundru@oss.qualcomm.com,
quic_vbadigan@quicinc.com, quic_mrana@quicinc.com,
quic_cang@quicinc.com, Johan Hovold <johan+linaro@kernel.org>,
Abel Vesa <abel.vesa@linaro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies
Date: Thu, 8 May 2025 11:45:16 +0200 [thread overview]
Message-ID: <aBx9LB_qQIvA0bj8@hovoldconsulting.com> (raw)
In-Reply-To: <5fd4abe7-3621-4119-9482-de823b247b0d@quicinc.com>
On Thu, May 08, 2025 at 04:50:30PM +0800, Qiang Yu wrote:
>
> On 5/8/2025 4:20 PM, Johan Hovold wrote:
> > On Thu, May 08, 2025 at 04:15:14PM +0800, Wenbin Yao wrote:
> >> From: Qiang Yu <quic_qianyu@quicinc.com>
> >>
> >> All PCIe PHYs on the X1E80100 SOC require the vdda-qref, which feeds QREF
> >> clocks provided by the TCSR device.
> > This still looks wrong and you never replied to why these supplies
> > shouldn't be handled by the tcsr clock driver that supplies these
> > clocks:
> >
> > https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
> Sorry, I thought Konrad had convinced you.
IIRC, he just said you guys were told to add the QREF supply to the PHY.
That's not an argument.
> If the TCSR driver manages these supplies, would it be possible for tscr
> driver to recognize when it needs to turn vdda-qref on or off for a
> specific PCIe port?
Sure, just add a lookup table to the driver and enable the required
supplies when a ref clock is enabled.
As I mentioned in the other thread, the T14s has the following QREF
supplies:
VDD_A_QREFS_1P2_A
VDD_A_QREFS_1P2_B
VDD_A_QREFS_0P875_A
VDD_A_QREFS_0P875_B
VDD_A_QREFS_0P875_0
VDD_A_QREFS_0P875_2
VDD_A_QREFS_0P875_3
and it's not clear how these maps to the various consumer ref clocks,
including the PCIe ones:
#define TCSR_PCIE_2L_4_CLKREF_EN
#define TCSR_PCIE_2L_5_CLKREF_EN
#define TCSR_PCIE_8L_CLKREF_EN
#define TCSR_PCIE_4L_CLKREF_EN
That mapping can be done by the TCSR clock driver (which would also take
care of the 1.2 V supplies).
Johan
WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: Wenbin Yao <quic_wenbyao@quicinc.com>,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, andersson@kernel.org,
konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
vkoul@kernel.org, kishon@kernel.org, sfr@canb.auug.org.au,
linux-phy@lists.infradead.org, krishna.chundru@oss.qualcomm.com,
quic_vbadigan@quicinc.com, quic_mrana@quicinc.com,
quic_cang@quicinc.com, Johan Hovold <johan+linaro@kernel.org>,
Abel Vesa <abel.vesa@linaro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies
Date: Thu, 8 May 2025 11:45:16 +0200 [thread overview]
Message-ID: <aBx9LB_qQIvA0bj8@hovoldconsulting.com> (raw)
In-Reply-To: <5fd4abe7-3621-4119-9482-de823b247b0d@quicinc.com>
On Thu, May 08, 2025 at 04:50:30PM +0800, Qiang Yu wrote:
>
> On 5/8/2025 4:20 PM, Johan Hovold wrote:
> > On Thu, May 08, 2025 at 04:15:14PM +0800, Wenbin Yao wrote:
> >> From: Qiang Yu <quic_qianyu@quicinc.com>
> >>
> >> All PCIe PHYs on the X1E80100 SOC require the vdda-qref, which feeds QREF
> >> clocks provided by the TCSR device.
> > This still looks wrong and you never replied to why these supplies
> > shouldn't be handled by the tcsr clock driver that supplies these
> > clocks:
> >
> > https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
> Sorry, I thought Konrad had convinced you.
IIRC, he just said you guys were told to add the QREF supply to the PHY.
That's not an argument.
> If the TCSR driver manages these supplies, would it be possible for tscr
> driver to recognize when it needs to turn vdda-qref on or off for a
> specific PCIe port?
Sure, just add a lookup table to the driver and enable the required
supplies when a ref clock is enabled.
As I mentioned in the other thread, the T14s has the following QREF
supplies:
VDD_A_QREFS_1P2_A
VDD_A_QREFS_1P2_B
VDD_A_QREFS_0P875_A
VDD_A_QREFS_0P875_B
VDD_A_QREFS_0P875_0
VDD_A_QREFS_0P875_2
VDD_A_QREFS_0P875_3
and it's not clear how these maps to the various consumer ref clocks,
including the PCIe ones:
#define TCSR_PCIE_2L_4_CLKREF_EN
#define TCSR_PCIE_2L_5_CLKREF_EN
#define TCSR_PCIE_8L_CLKREF_EN
#define TCSR_PCIE_4L_CLKREF_EN
That mapping can be done by the TCSR clock driver (which would also take
care of the 1.2 V supplies).
Johan
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-05-08 9:58 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-08 8:15 [PATCH v3 0/5] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 1/5] arm64: Kconfig: enable PCI Power Control Slot driver for QCOM Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 2/5] arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-31 19:26 ` Konrad Dybcio
2025-05-31 19:26 ` Konrad Dybcio
2025-05-08 8:15 ` [PATCH v3 3/5] arm64: dts: qcom: x1e80100-qcp: enable pcie3 x8 slot for X1E80100-QCP Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 4/5] arm64: dts: qcom: x1e80100-qcp: Add qref supply for PCIe PHYs Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies Wenbin Yao
2025-05-08 8:15 ` Wenbin Yao
2025-05-08 8:20 ` Johan Hovold
2025-05-08 8:20 ` Johan Hovold
2025-05-08 8:50 ` Qiang Yu
2025-05-08 8:50 ` Qiang Yu
2025-05-08 9:45 ` Johan Hovold [this message]
2025-05-08 9:45 ` Johan Hovold
2025-05-22 20:03 ` Konrad Dybcio
2025-05-22 20:03 ` Konrad Dybcio
2025-05-26 13:47 ` Johan Hovold
2025-05-26 13:47 ` Johan Hovold
2025-05-27 10:50 ` Konrad Dybcio
2025-05-27 10:50 ` Konrad Dybcio
2025-06-04 14:59 ` Johan Hovold
2025-06-04 14:59 ` Johan Hovold
2025-05-09 7:17 ` [PATCH v3 0/5] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Qiang Yu
2025-05-09 7:17 ` Qiang Yu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aBx9LB_qQIvA0bj8@hovoldconsulting.com \
--to=johan@kernel.org \
--cc=abel.vesa@linaro.org \
--cc=andersson@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=johan+linaro@kernel.org \
--cc=kishon@kernel.org \
--cc=konradybcio@kernel.org \
--cc=krishna.chundru@oss.qualcomm.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=quic_cang@quicinc.com \
--cc=quic_mrana@quicinc.com \
--cc=quic_qianyu@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=quic_wenbyao@quicinc.com \
--cc=robh@kernel.org \
--cc=sfr@canb.auug.org.au \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.