* Re: [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read
2025-05-08 11:36 [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read Aswin Murugan
@ 2025-05-08 15:49 ` neil.armstrong
2025-05-09 10:42 ` Casey Connolly
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: neil.armstrong @ 2025-05-08 15:49 UTC (permalink / raw)
To: Aswin Murugan, casey.connolly, sumit.garg, trini, u-boot-qcom,
u-boot
On 08/05/2025 13:36, Aswin Murugan wrote:
> In the current implementation, the GPIO read operation considers
> both the input and outbut bits (bits 0 and 1). It should only consider
> the state of input bit, i.e bit 0. To address this, mask input bit
> alone and read it.
>
> Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
> ---
> drivers/gpio/msm_gpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
> index 6783fc756f4..7de332c66ae 100644
> --- a/drivers/gpio/msm_gpio.c
> +++ b/drivers/gpio/msm_gpio.c
> @@ -202,7 +202,7 @@ static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
> if (qcom_is_special_pin(priv->pin_data, gpio))
> return msm_gpio_get_value_special(priv, gpio);
>
> - return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN);
> + return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) & BIT(GPIO_IN));
> }
>
> static int msm_gpio_get_function_special(struct msm_gpio_bank *priv,
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read
2025-05-08 11:36 [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read Aswin Murugan
2025-05-08 15:49 ` neil.armstrong
@ 2025-05-09 10:42 ` Casey Connolly
2025-05-12 7:29 ` Sumit Garg
2025-06-23 23:49 ` Casey Connolly
3 siblings, 0 replies; 5+ messages in thread
From: Casey Connolly @ 2025-05-09 10:42 UTC (permalink / raw)
To: Aswin Murugan, neil.armstrong, sumit.garg, trini, u-boot-qcom,
u-boot
On 5/8/25 13:36, Aswin Murugan wrote:
> In the current implementation, the GPIO read operation considers
> both the input and outbut bits (bits 0 and 1). It should only consider
> the state of input bit, i.e bit 0. To address this, mask input bit
> alone and read it.
oof, nice find :D>
> Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>> ---
> drivers/gpio/msm_gpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
> index 6783fc756f4..7de332c66ae 100644
> --- a/drivers/gpio/msm_gpio.c
> +++ b/drivers/gpio/msm_gpio.c
> @@ -202,7 +202,7 @@ static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
> if (qcom_is_special_pin(priv->pin_data, gpio))
> return msm_gpio_get_value_special(priv, gpio);
>
> - return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN);
> + return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) & BIT(GPIO_IN));
> }
>
> static int msm_gpio_get_function_special(struct msm_gpio_bank *priv,
--
Casey (she/they)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read
2025-05-08 11:36 [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read Aswin Murugan
2025-05-08 15:49 ` neil.armstrong
2025-05-09 10:42 ` Casey Connolly
@ 2025-05-12 7:29 ` Sumit Garg
2025-06-23 23:49 ` Casey Connolly
3 siblings, 0 replies; 5+ messages in thread
From: Sumit Garg @ 2025-05-12 7:29 UTC (permalink / raw)
To: Aswin Murugan; +Cc: casey.connolly, neil.armstrong, trini, u-boot-qcom, u-boot
On Thu, May 08, 2025 at 05:06:46PM +0530, Aswin Murugan wrote:
> In the current implementation, the GPIO read operation considers
> both the input and outbut bits (bits 0 and 1). It should only consider
> the state of input bit, i.e bit 0. To address this, mask input bit
> alone and read it.
>
> Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
> ---
> drivers/gpio/msm_gpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
-Sumit
>
> diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
> index 6783fc756f4..7de332c66ae 100644
> --- a/drivers/gpio/msm_gpio.c
> +++ b/drivers/gpio/msm_gpio.c
> @@ -202,7 +202,7 @@ static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
> if (qcom_is_special_pin(priv->pin_data, gpio))
> return msm_gpio_get_value_special(priv, gpio);
>
> - return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN);
> + return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) & BIT(GPIO_IN));
> }
>
> static int msm_gpio_get_function_special(struct msm_gpio_bank *priv,
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read
2025-05-08 11:36 [PATCH v1 1/1] gpio: msm_gpio: return correct value for gpio read Aswin Murugan
` (2 preceding siblings ...)
2025-05-12 7:29 ` Sumit Garg
@ 2025-06-23 23:49 ` Casey Connolly
3 siblings, 0 replies; 5+ messages in thread
From: Casey Connolly @ 2025-06-23 23:49 UTC (permalink / raw)
To: neil.armstrong, sumit.garg, trini, u-boot-qcom, u-boot,
Aswin Murugan
On Thu, 08 May 2025 17:06:46 +0530, Aswin Murugan wrote:
> In the current implementation, the GPIO read operation considers
> both the input and outbut bits (bits 0 and 1). It should only consider
> the state of input bit, i.e bit 0. To address this, mask input bit
> alone and read it.
>
> Reviewed-by:
>
> [...]
Applied, thanks!
[1/1] gpio: msm_gpio: return correct value for gpio read
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/d202c92862f0
Best regards,
--
Casey Connolly <casey.connolly@linaro.org>
^ permalink raw reply [flat|nested] 5+ messages in thread