Re: [PATCH v2 01/10] target/microblaze: Split out mb_unaligned_access_internal

["Edgar E. Iglesias" <edgar.iglesias@amd.com>]

On Sun, May 25, 2025 at 05:02:11PM +0100, Richard Henderson wrote:
> Use an explicit 64-bit type for the address to store in EAR.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>


> ---
>  target/microblaze/helper.c | 64 +++++++++++++++++++++-----------------
>  1 file changed, 36 insertions(+), 28 deletions(-)
> 
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 9203192483..5fe81e4b16 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -27,6 +27,42 @@
>  #include "qemu/host-utils.h"
>  #include "exec/log.h"
>  
> +
> +G_NORETURN
> +static void mb_unaligned_access_internal(CPUState *cs, uint64_t addr,
> +                                         uintptr_t retaddr)
> +{
> +    CPUMBState *env = cpu_env(cs);
> +    uint32_t esr, iflags;
> +
> +    /* Recover the pc and iflags from the corresponding insn_start.  */
> +    cpu_restore_state(cs, retaddr);
> +    iflags = env->iflags;
> +
> +    qemu_log_mask(CPU_LOG_INT,
> +                  "Unaligned access addr=0x%" PRIx64 " pc=%x iflags=%x\n",
> +                  addr, env->pc, iflags);
> +
> +    esr = ESR_EC_UNALIGNED_DATA;
> +    if (likely(iflags & ESR_ESS_FLAG)) {
> +        esr |= iflags & ESR_ESS_MASK;
> +    } else {
> +        qemu_log_mask(LOG_UNIMP, "Unaligned access without ESR_ESS_FLAG\n");
> +    }
> +
> +    env->ear = addr;
> +    env->esr = esr;
> +    cs->exception_index = EXCP_HW_EXCP;
> +    cpu_loop_exit(cs);
> +}
> +
> +void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> +                                MMUAccessType access_type,
> +                                int mmu_idx, uintptr_t retaddr)
> +{
> +    mb_unaligned_access_internal(cs, addr, retaddr);
> +}
> +
>  #ifndef CONFIG_USER_ONLY
>  static bool mb_cpu_access_is_secure(MicroBlazeCPU *cpu,
>                                      MMUAccessType access_type)
> @@ -269,31 +305,3 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
>  }
>  
>  #endif /* !CONFIG_USER_ONLY */
> -
> -void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> -                                MMUAccessType access_type,
> -                                int mmu_idx, uintptr_t retaddr)
> -{
> -    MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
> -    uint32_t esr, iflags;
> -
> -    /* Recover the pc and iflags from the corresponding insn_start.  */
> -    cpu_restore_state(cs, retaddr);
> -    iflags = cpu->env.iflags;
> -
> -    qemu_log_mask(CPU_LOG_INT,
> -                  "Unaligned access addr=" TARGET_FMT_lx " pc=%x iflags=%x\n",
> -                  (target_ulong)addr, cpu->env.pc, iflags);
> -
> -    esr = ESR_EC_UNALIGNED_DATA;
> -    if (likely(iflags & ESR_ESS_FLAG)) {
> -        esr |= iflags & ESR_ESS_MASK;
> -    } else {
> -        qemu_log_mask(LOG_UNIMP, "Unaligned access without ESR_ESS_FLAG\n");
> -    }
> -
> -    cpu->env.ear = addr;
> -    cpu->env.esr = esr;
> -    cs->exception_index = EXCP_HW_EXCP;
> -    cpu_loop_exit(cs);
> -}
> -- 
> 2.43.0
>