From: "Edgar E. Iglesias" <edgar.iglesias@amd.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: <qemu-devel@nongnu.org>, <edgar.iglesias@gmail.com>, <philmd@linaro.org>
Subject: Re: [PATCH v2 10/10] target/microblaze: Simplify compute_ldst_addr_type{a,b}
Date: Sun, 25 May 2025 21:40:24 +0200 [thread overview]
Message-ID: <aDNyKBHXVXsiE4Vv@zapote> (raw)
In-Reply-To: <20250525160220.222154-11-richard.henderson@linaro.org>
On Sun, May 25, 2025 at 05:02:20PM +0100, Richard Henderson wrote:
> Require TCGv_i32 and TCGv be identical, so drop
> the extensions. Return constants when possible
> instead of a mov into a temporary. Return register
> inputs unchanged when possible.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
> ---
> target/microblaze/translate.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index 047d97e2c5..5098a1db4d 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -606,19 +606,18 @@ DO_TYPEBI(xori, false, tcg_gen_xori_i32)
>
> static TCGv compute_ldst_addr_typea(DisasContext *dc, int ra, int rb)
> {
> - TCGv ret = tcg_temp_new();
> + TCGv ret;
>
> /* If any of the regs is r0, set t to the value of the other reg. */
> if (ra && rb) {
> - TCGv_i32 tmp = tcg_temp_new_i32();
> - tcg_gen_add_i32(tmp, cpu_R[ra], cpu_R[rb]);
> - tcg_gen_extu_i32_tl(ret, tmp);
> + ret = tcg_temp_new_i32();
> + tcg_gen_add_i32(ret, cpu_R[ra], cpu_R[rb]);
> } else if (ra) {
> - tcg_gen_extu_i32_tl(ret, cpu_R[ra]);
> + ret = cpu_R[ra];
> } else if (rb) {
> - tcg_gen_extu_i32_tl(ret, cpu_R[rb]);
> + ret = cpu_R[rb];
> } else {
> - tcg_gen_movi_tl(ret, 0);
> + ret = tcg_constant_i32(0);
> }
>
> if ((ra == 1 || rb == 1) && dc->cfg->stackprot) {
> @@ -629,15 +628,16 @@ static TCGv compute_ldst_addr_typea(DisasContext *dc, int ra, int rb)
>
> static TCGv compute_ldst_addr_typeb(DisasContext *dc, int ra, int imm)
> {
> - TCGv ret = tcg_temp_new();
> + TCGv ret;
>
> /* If any of the regs is r0, set t to the value of the other reg. */
> - if (ra) {
> - TCGv_i32 tmp = tcg_temp_new_i32();
> - tcg_gen_addi_i32(tmp, cpu_R[ra], imm);
> - tcg_gen_extu_i32_tl(ret, tmp);
> + if (ra && imm) {
> + ret = tcg_temp_new_i32();
> + tcg_gen_addi_i32(ret, cpu_R[ra], imm);
> + } else if (ra) {
> + ret = cpu_R[ra];
> } else {
> - tcg_gen_movi_tl(ret, (uint32_t)imm);
> + ret = tcg_constant_i32(imm);
> }
>
> if (ra == 1 && dc->cfg->stackprot) {
> --
> 2.43.0
>
prev parent reply other threads:[~2025-05-25 19:41 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-25 16:02 [PATCH v2 00/10] target/microblaze: Always use TARGET_LONG_BITS == 32 Richard Henderson
2025-05-25 16:02 ` [PATCH v2 01/10] target/microblaze: Split out mb_unaligned_access_internal Richard Henderson
2025-05-25 19:26 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 02/10] target/microblaze: Introduce helper_unaligned_access Richard Henderson
2025-05-25 19:27 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 03/10] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-05-25 19:29 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 04/10] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-05-25 19:33 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 05/10] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-05-25 19:34 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 06/10] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Richard Henderson
2025-05-25 19:35 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 07/10] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-05-25 19:36 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 08/10] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-05-25 19:36 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 09/10] target/microblaze: Drop DisasContext.r0 Richard Henderson
2025-05-25 19:38 ` Edgar E. Iglesias
2025-05-25 16:02 ` [PATCH v2 10/10] target/microblaze: Simplify compute_ldst_addr_type{a, b} Richard Henderson
2025-05-25 19:40 ` Edgar E. Iglesias [this message]
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