From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Rahul Pathak <rpathak@ventanamicro.com>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Jassi Brar" <jassisinghbrar@gmail.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Len Brown" <lenb@kernel.org>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Anup Patel" <anup@brainfault.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 09/23] clk: Add clock driver for the RISC-V RPMI clock service group
Date: Fri, 27 Jun 2025 18:58:05 +0300 [thread overview]
Message-ID: <aF6_jVJYCXeKZfXo@smile.fi.intel.com> (raw)
In-Reply-To: <CA+Oz1=bAsykB=qAk3r8FV8K8cnPEVT4Ow7L4SWBvrc_3DsyaWw@mail.gmail.com>
On Fri, Jun 27, 2025 at 08:36:41PM +0530, Rahul Pathak wrote:
...
> > > > > + if (ret || rx.status)
> > > > > + return 0;
> > > >
> > > > Why rx.status can't be checked before calling to a sending message?
> > > > Sounds like the rpmi_mbox_init_send_with_response() links rx to msg somehow.
> > > > If this is the case, use msg here, otherwise move the check to be in the
> > > > correct place.
> > >
> > > Yes, the rpmi_mbox_init_send_with_response is a helper function which links
> > > the rx to msg. It's a very simple function which only performs assignments.
> > >
> > > Using msg instead of rx directly will require additional typecasting
> > > which will only clutter
> > > I can add a comment if that helps wherever the rpmi_mbox_init_send_with_response
> > > is used.
> >
> > This is besides harder-to-read code is kinda of layering violation.
> > If you afraid of a casting, add a helper to check for the status error.
> > Comment won't help much as making code better to begin with.
>
> Why using rx is the issue in the first place when it's the same layer
> which links the rx with msg using the helper function and then
> uses it directly? Infact using rx directly avoids unnecessary code
> which is only increasing redundant code which ultimately results in
> same thing. Even if I add a helper function that will require additional
> pointer passing with NULL checking which all is currently avoided.
> And, we are not just talking about rx.status but a lot of other fields.
Because it's simply bad code, look at the simplified model:
int foo, bar;
int ret;
func_1(..., &foo, &bar);
ret = func_2(&foo);
if (ret || bar)
...do something...
When one reads this code the immediate reaction will be like mine.
This is also (without deeper understanding) tempting to someone
who even thinks that the code can be simplified (w/o knowing that it
may not) to change it as
func_1(..., &foo, &bar);
if (bar)
...do something...
ret = func_2(&foo);
if (ret)
...do something...
Using msg is the right thing to do. In that way there is no questions asked
and everything is clear. Also why layering violation? Because the conditional
requires to know the guts of rx in the code which doesn't use rx that way
(or rather using it as semi-opaque object).
--
With Best Regards,
Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Rahul Pathak <rpathak@ventanamicro.com>
Cc: "Jassi Brar" <jassisinghbrar@gmail.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Michael Turquette" <mturquette@baylibre.com>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
"Rob Herring" <robh@kernel.org>,
"Anup Patel" <anup@brainfault.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Andrew Jones" <ajones@ventanamicro.com>,
devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Stephen Boyd" <sboyd@kernel.org>,
linux-kernel@vger.kernel.org,
"Samuel Holland" <samuel.holland@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Len Brown" <lenb@kernel.org>
Subject: Re: [PATCH v6 09/23] clk: Add clock driver for the RISC-V RPMI clock service group
Date: Fri, 27 Jun 2025 18:58:05 +0300 [thread overview]
Message-ID: <aF6_jVJYCXeKZfXo@smile.fi.intel.com> (raw)
In-Reply-To: <CA+Oz1=bAsykB=qAk3r8FV8K8cnPEVT4Ow7L4SWBvrc_3DsyaWw@mail.gmail.com>
On Fri, Jun 27, 2025 at 08:36:41PM +0530, Rahul Pathak wrote:
...
> > > > > + if (ret || rx.status)
> > > > > + return 0;
> > > >
> > > > Why rx.status can't be checked before calling to a sending message?
> > > > Sounds like the rpmi_mbox_init_send_with_response() links rx to msg somehow.
> > > > If this is the case, use msg here, otherwise move the check to be in the
> > > > correct place.
> > >
> > > Yes, the rpmi_mbox_init_send_with_response is a helper function which links
> > > the rx to msg. It's a very simple function which only performs assignments.
> > >
> > > Using msg instead of rx directly will require additional typecasting
> > > which will only clutter
> > > I can add a comment if that helps wherever the rpmi_mbox_init_send_with_response
> > > is used.
> >
> > This is besides harder-to-read code is kinda of layering violation.
> > If you afraid of a casting, add a helper to check for the status error.
> > Comment won't help much as making code better to begin with.
>
> Why using rx is the issue in the first place when it's the same layer
> which links the rx with msg using the helper function and then
> uses it directly? Infact using rx directly avoids unnecessary code
> which is only increasing redundant code which ultimately results in
> same thing. Even if I add a helper function that will require additional
> pointer passing with NULL checking which all is currently avoided.
> And, we are not just talking about rx.status but a lot of other fields.
Because it's simply bad code, look at the simplified model:
int foo, bar;
int ret;
func_1(..., &foo, &bar);
ret = func_2(&foo);
if (ret || bar)
...do something...
When one reads this code the immediate reaction will be like mine.
This is also (without deeper understanding) tempting to someone
who even thinks that the code can be simplified (w/o knowing that it
may not) to change it as
func_1(..., &foo, &bar);
if (bar)
...do something...
ret = func_2(&foo);
if (ret)
...do something...
Using msg is the right thing to do. In that way there is no questions asked
and everything is clear. Also why layering violation? Because the conditional
requires to know the guts of rx in the code which doesn't use rx that way
(or rather using it as semi-opaque object).
--
With Best Regards,
Andy Shevchenko
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-06-27 15:58 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 12:13 [PATCH v6 00/23] Linux SBI MPXY and RPMI drivers Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 02/23] dt-bindings: mailbox: Add bindings for RISC-V SBI MPXY extension Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 03/23] RISC-V: Add defines for the SBI message proxy extension Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-24 6:58 ` Atish Patra
2025-06-24 6:58 ` Atish Patra
2025-06-18 12:13 ` [PATCH v6 04/23] mailbox: Add common header for RPMI messages sent via mailbox Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 05/23] mailbox: Allow controller specific mapping using fwnode Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-23 8:45 ` Andy Shevchenko
2025-06-23 8:45 ` Andy Shevchenko
2025-07-01 6:50 ` Anup Patel
2025-07-01 6:50 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 06/23] mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-23 8:50 ` Andy Shevchenko
2025-06-23 8:50 ` Andy Shevchenko
2025-07-01 7:02 ` Anup Patel
2025-07-01 7:02 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 07/23] dt-bindings: clock: Add RPMI clock service message proxy bindings Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-21 21:00 ` Stephen Boyd
2025-06-21 21:00 ` Stephen Boyd
2025-06-23 3:45 ` Anup Patel
2025-06-23 3:45 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 08/23] dt-bindings: clock: Add RPMI clock service controller bindings Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-21 21:05 ` Stephen Boyd
2025-06-21 21:05 ` Stephen Boyd
2025-06-18 12:13 ` [PATCH v6 09/23] clk: Add clock driver for the RISC-V RPMI clock service group Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-21 21:04 ` Stephen Boyd
2025-06-21 21:04 ` Stephen Boyd
2025-06-23 9:06 ` Andy Shevchenko
2025-06-23 9:06 ` Andy Shevchenko
2025-06-26 7:02 ` Rahul Pathak
2025-06-26 7:02 ` Rahul Pathak
2025-06-26 14:08 ` Andy Shevchenko
2025-06-26 14:08 ` Andy Shevchenko
2025-06-27 15:06 ` Rahul Pathak
2025-06-27 15:06 ` Rahul Pathak
2025-06-27 15:58 ` Andy Shevchenko [this message]
2025-06-27 15:58 ` Andy Shevchenko
2025-06-18 12:13 ` [PATCH v6 10/23] dt-bindings: Add RPMI system MSI message proxy bindings Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 11/23] dt-bindings: Add RPMI system MSI interrupt controller bindings Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 12/23] irqchip: Add driver for the RPMI system MSI service group Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 13/23] ACPI: property: Refactor acpi_fwnode_get_reference_args() Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-23 9:08 ` Andy Shevchenko
2025-06-23 9:08 ` Andy Shevchenko
2025-06-23 10:20 ` Rafael J. Wysocki
2025-06-23 10:20 ` Rafael J. Wysocki
2025-06-18 12:13 ` [PATCH v6 14/23] ACPI: property: Add support for cells property Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-23 9:14 ` Andy Shevchenko
2025-06-23 9:14 ` Andy Shevchenko
2025-06-30 5:17 ` Sunil V L
2025-06-30 5:17 ` Sunil V L
2025-06-18 12:13 ` [PATCH v6 15/23] ACPI: scan: Update honor list for RPMI System MSI Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 16/23] ACPI: RISC-V: Create interrupt controller list in sorted order Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 17/23] ACPI: RISC-V: Add support to update gsi range Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 18/23] ACPI: RISC-V: Add RPMI System MSI to GSI mapping Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 19/23] irqchip/irq-riscv-imsic-early: Export imsic_acpi_get_fwnode() Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 20/23] mailbox/riscv-sbi-mpxy: Add ACPI support Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 21/23] irqchip/riscv-rpmi-sysmsi: " Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-18 12:13 ` [PATCH v6 23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers Anup Patel
2025-06-18 12:13 ` Anup Patel
2025-06-22 16:26 ` [PATCH v6 00/23] Linux SBI MPXY and RPMI drivers Jassi Brar
2025-06-22 16:26 ` Jassi Brar
2025-06-23 8:51 ` Andy Shevchenko
2025-06-23 8:51 ` Andy Shevchenko
2025-07-02 5:12 ` Anup Patel
2025-07-02 5:12 ` Anup Patel
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