From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, kw@linux.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v2 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for sa8775p
Date: Tue, 17 Jun 2025 09:38:05 +0200 [thread overview]
Message-ID: <aFEbXfl2GMGMBk_R@hovoldconsulting.com> (raw)
In-Reply-To: <20250617021617.2793902-2-quic_ziyuzhan@quicinc.com>
On Tue, Jun 17, 2025 at 10:16:14AM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is required by the PCIe controller but not by the PCIe
> PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
> be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
> gcc_phy_aux_clk.
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> @@ -176,6 +176,8 @@ allOf:
> contains:
> enum:
> - qcom,qcs615-qmp-gen3x1-pcie-phy
> + - qcom,sa8775p-qmp-gen4x2-pcie-phy
> + - qcom,sa8775p-qmp-gen4x4-pcie-phy
> - qcom,sc8280xp-qmp-gen3x1-pcie-phy
> - qcom,sc8280xp-qmp-gen3x2-pcie-phy
> - qcom,sc8280xp-qmp-gen3x4-pcie-phy
> @@ -197,8 +199,6 @@ allOf:
> contains:
> enum:
> - qcom,qcs8300-qmp-gen4x2-pcie-phy
What about qcs8300, isn't this equally wrong for that platform?
> - - qcom,sa8775p-qmp-gen4x2-pcie-phy
> - - qcom,sa8775p-qmp-gen4x4-pcie-phy
> then:
> properties:
> clocks:
Johan
WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, kw@linux.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v2 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for sa8775p
Date: Tue, 17 Jun 2025 09:38:05 +0200 [thread overview]
Message-ID: <aFEbXfl2GMGMBk_R@hovoldconsulting.com> (raw)
In-Reply-To: <20250617021617.2793902-2-quic_ziyuzhan@quicinc.com>
On Tue, Jun 17, 2025 at 10:16:14AM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is required by the PCIe controller but not by the PCIe
> PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
> be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
> gcc_phy_aux_clk.
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> @@ -176,6 +176,8 @@ allOf:
> contains:
> enum:
> - qcom,qcs615-qmp-gen3x1-pcie-phy
> + - qcom,sa8775p-qmp-gen4x2-pcie-phy
> + - qcom,sa8775p-qmp-gen4x4-pcie-phy
> - qcom,sc8280xp-qmp-gen3x1-pcie-phy
> - qcom,sc8280xp-qmp-gen3x2-pcie-phy
> - qcom,sc8280xp-qmp-gen3x4-pcie-phy
> @@ -197,8 +199,6 @@ allOf:
> contains:
> enum:
> - qcom,qcs8300-qmp-gen4x2-pcie-phy
What about qcs8300, isn't this equally wrong for that platform?
> - - qcom,sa8775p-qmp-gen4x2-pcie-phy
> - - qcom,sa8775p-qmp-gen4x4-pcie-phy
> then:
> properties:
> clocks:
Johan
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-06-17 7:38 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 2:16 [PATCH v2 0/4] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Ziyue Zhang
2025-06-17 2:16 ` Ziyue Zhang
2025-06-17 2:16 ` [PATCH v2 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings " Ziyue Zhang
2025-06-17 2:16 ` Ziyue Zhang
2025-06-17 7:38 ` Johan Hovold [this message]
2025-06-17 7:38 ` Johan Hovold
2025-06-17 2:16 ` [PATCH v2 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset Ziyue Zhang
2025-06-17 2:16 ` Ziyue Zhang
2025-06-17 7:40 ` Johan Hovold
2025-06-17 7:40 ` Johan Hovold
2025-06-17 2:16 ` [PATCH v2 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Ziyue Zhang
2025-06-17 2:16 ` Ziyue Zhang
2025-06-17 2:16 ` [PATCH v2 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie Ziyue Zhang
2025-06-17 2:16 ` Ziyue Zhang
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