* [PATCH 1/6] drm/xe: Explicitly mark migration queues with flag
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-17 15:37 ` [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler Matthew Brost
` (9 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Rather than inferring if an exec queue is a migration queue for a flag,
explicitly mark migration queues with a flag.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
drivers/gpu/drm/xe/xe_migrate.c | 6 ++++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index cc1cffb5c87f..abdf4a57e6e2 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -87,6 +87,8 @@ struct xe_exec_queue {
#define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4)
/* flag to indicate low latency hint to guc */
#define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5)
+/* for migration (kernel copy, clear, bind) jobs */
+#define EXEC_QUEUE_FLAG_MIGRATE BIT(6)
/**
* @flags: flags for this exec queue, should statically setup aside from ban
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 8f8e9fdfb2a8..9c246a3ee610 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -437,12 +437,14 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
m->q = xe_exec_queue_create(xe, vm, logical_mask, 1, hwe,
EXEC_QUEUE_FLAG_KERNEL |
EXEC_QUEUE_FLAG_PERMANENT |
- EXEC_QUEUE_FLAG_HIGH_PRIORITY, 0);
+ EXEC_QUEUE_FLAG_HIGH_PRIORITY |
+ EXEC_QUEUE_FLAG_MIGRATE, 0);
} else {
m->q = xe_exec_queue_create_class(xe, primary_gt, vm,
XE_ENGINE_CLASS_COPY,
EXEC_QUEUE_FLAG_KERNEL |
- EXEC_QUEUE_FLAG_PERMANENT, 0);
+ EXEC_QUEUE_FLAG_PERMANENT |
+ EXEC_QUEUE_FLAG_MIGRATE, 0);
}
if (IS_ERR(m->q)) {
xe_vm_close_and_put(vm);
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
2025-06-17 15:37 ` [PATCH 1/6] drm/xe: Explicitly mark migration queues with flag Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-18 11:20 ` Thomas Hellström
2025-06-17 15:37 ` [PATCH 3/6] drm/xe: Add dependency scheduler for GT TLB invalidations to bind queues Matthew Brost
` (8 subsequent siblings)
10 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Add generic dependecy jobs / scheduler which serves as wrapper for DRM
scheduler. Useful when we want delay a generic operation until a
dma-fence signals.
Existing use cases could be destroying of resources based fences /
dma-resv, the preempt rebind worker, and pipelined GT TLB invalidations.
Written in such a way it could be moved to DRM subsystem if needed.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_dep_job_types.h | 29 ++++++
drivers/gpu/drm/xe/xe_dep_scheduler.c | 145 ++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_dep_scheduler.h | 21 ++++
4 files changed, 196 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_dep_job_types.h
create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.c
create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index f5f5775acdc0..3523bd093b7a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -28,6 +28,7 @@ $(obj)/generated/%_wa_oob.c $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \
xe-y += xe_bb.o \
xe_bo.o \
xe_bo_evict.o \
+ xe_dep_scheduler.o \
xe_devcoredump.o \
xe_device.o \
xe_device_sysfs.o \
diff --git a/drivers/gpu/drm/xe/xe_dep_job_types.h b/drivers/gpu/drm/xe/xe_dep_job_types.h
new file mode 100644
index 000000000000..c6a484f24c8c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_dep_job_types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_DEP_JOB_TYPES_H_
+#define _XE_DEP_JOB_TYPES_H_
+
+#include <drm/gpu_scheduler.h>
+
+struct xe_dep_job;
+
+/** struct xe_dep_job_ops - Generic Xe dependency job operations */
+struct xe_dep_job_ops {
+ /** @run_job: Run generic Xe dependency job */
+ struct dma_fence *(*run_job)(struct xe_dep_job *job);
+ /** @free_job: Free generic Xe dependency job */
+ void (*free_job)(struct xe_dep_job *job);
+};
+
+/** struct xe_dep_job - Generic dependency Xe job */
+struct xe_dep_job {
+ /** @drm: base DRM scheduler job */
+ struct drm_sched_job drm;
+ /** @ops: dependency job operations */
+ const struct xe_dep_job_ops *ops;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.c b/drivers/gpu/drm/xe/xe_dep_scheduler.c
new file mode 100644
index 000000000000..fbd55577d787
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_dep_scheduler.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/slab.h>
+
+#include <drm/gpu_scheduler.h>
+
+#include "xe_dep_job_types.h"
+#include "xe_dep_scheduler.h"
+#include "xe_device_types.h"
+
+/**
+ * DOC: Xe Dependency Scheduler
+ *
+ * The Xe dependency scheduler is a simple wrapper built around the DRM
+ * scheduler to execute jobs once their dependencies are resolved (i.e., all
+ * input fences specified as dependencies are signaled). The jobs that are
+ * executed contain virtual functions to run (execute) and free the job,
+ * allowing a single dependency scheduler to handle jobs performing different
+ * operations.
+ *
+ * Example use cases include deferred resource freeing, TLB invalidations after
+ * bind jobs, etc.
+ */
+
+/** struct xe_dep_scheduler - Generic Xe dependency scheduler */
+struct xe_dep_scheduler {
+ /** @sched: DRM GPU scheduler */
+ struct drm_gpu_scheduler sched;
+ /** @entity: DRM scheduler entity */
+ struct drm_sched_entity entity;
+ /** @rcu: For safe freeing of exported dma fences */
+ struct rcu_head rcu;
+};
+
+static struct dma_fence *xe_dep_scheduler_run_job(struct drm_sched_job *drm_job)
+{
+ struct xe_dep_job *dep_job =
+ container_of(drm_job, typeof(*dep_job), drm);
+
+ return dep_job->ops->run_job(dep_job);
+}
+
+static void xe_dep_scheduler_free_job(struct drm_sched_job *drm_job)
+{
+ struct xe_dep_job *dep_job =
+ container_of(drm_job, typeof(*dep_job), drm);
+
+ dep_job->ops->free_job(dep_job);
+}
+
+static const struct drm_sched_backend_ops sched_ops = {
+ .run_job = xe_dep_scheduler_run_job,
+ .free_job = xe_dep_scheduler_free_job,
+};
+
+/**
+ * xe_dep_scheduler_create() - Generic Xe dependency scheduler create
+ * @xe: Xe device
+ * @submit_wq: Submit workqueue struct (can be NULL)
+ * @name: Name of dependency scheduler
+ * @job_limit: Max dependency jobs that can be scheduled
+ *
+ * Create a generic Xe dependency scheduler and initialize internal DRM
+ * scheduler objects.
+ *
+ * Return: Generic Xe dependency scheduler object or ERR_PTR
+ */
+struct xe_dep_scheduler *
+xe_dep_scheduler_create(struct xe_device *xe,
+ struct workqueue_struct *submit_wq,
+ const char *name, u32 job_limit)
+{
+ struct xe_dep_scheduler *dep_scheduler;
+ struct drm_gpu_scheduler *sched;
+ const struct drm_sched_init_args args = {
+ .ops = &sched_ops,
+ .submit_wq = submit_wq,
+ .num_rqs = 1,
+ .credit_limit = job_limit,
+ .timeout = MAX_SCHEDULE_TIMEOUT,
+ .name = name,
+ .dev = xe->drm.dev,
+ };
+ int err;
+
+ dep_scheduler = kzalloc(sizeof(*dep_scheduler), GFP_KERNEL);
+ if (!dep_scheduler)
+ return ERR_PTR(-ENOMEM);
+
+ err = drm_sched_init(&dep_scheduler->sched, &args);
+ if (err)
+ goto err_free;
+
+ sched = &dep_scheduler->sched;
+ err = drm_sched_entity_init(&dep_scheduler->entity, 0,
+ (struct drm_gpu_scheduler **)&sched, 1,
+ NULL);
+ if (err)
+ goto err_sched;
+
+ init_rcu_head(&dep_scheduler->rcu);
+
+ return dep_scheduler;
+
+err_sched:
+ drm_sched_fini(&dep_scheduler->sched);
+err_free:
+ kfree(dep_scheduler);
+
+ return ERR_PTR(err);
+}
+
+/**
+ * xe_dep_scheduler_fini() - Generic Xe dependency scheduler finalize
+ * @dep_scheduler: Generic Xe dependency scheduler object
+ *
+ * Finalize internal DRM scheduler objects and free generic Xe dependency
+ * scheduler object
+ */
+void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler)
+{
+ drm_sched_entity_fini(&dep_scheduler->entity);
+ drm_sched_fini(&dep_scheduler->sched);
+ /*
+ * RCU free due sched being exported via DRM scheduler fences
+ * (timeline name).
+ */
+ kfree_rcu(dep_scheduler, rcu);
+}
+
+/**
+ * xe_dep_scheduler_entity() - Retrieve a generic Xe dependency scheduler
+ * DRM scheduler entity
+ * @dep_scheduler: Generic Xe dependency scheduler object
+ *
+ * Return: The generic Xe dependency scheduler's DRM scheduler entity
+ */
+struct drm_sched_entity *
+xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler)
+{
+ return &dep_scheduler->entity;
+}
diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.h b/drivers/gpu/drm/xe/xe_dep_scheduler.h
new file mode 100644
index 000000000000..853961eec64b
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_dep_scheduler.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/types.h>
+
+struct drm_sched_entity;
+struct workqueue_struct;
+struct xe_dep_scheduler;
+struct xe_device;
+
+struct xe_dep_scheduler *
+xe_dep_scheduler_create(struct xe_device *xe,
+ struct workqueue_struct *submit_wq,
+ const char *name, u32 job_limit);
+
+void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler);
+
+struct drm_sched_entity *
+xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler);
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler
2025-06-17 15:37 ` [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler Matthew Brost
@ 2025-06-18 11:20 ` Thomas Hellström
2025-06-18 14:10 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Thomas Hellström @ 2025-06-18 11:20 UTC (permalink / raw)
To: Matthew Brost, intel-xe; +Cc: himal.prasad.ghimiray, matthew.auld
On Tue, 2025-06-17 at 08:37 -0700, Matthew Brost wrote:
> Add generic dependecy jobs / scheduler which serves as wrapper for
> DRM
> scheduler. Useful when we want delay a generic operation until a
> dma-fence signals.
>
> Existing use cases could be destroying of resources based fences /
> dma-resv, the preempt rebind worker, and pipelined GT TLB
> invalidations.
>
> Written in such a way it could be moved to DRM subsystem if needed.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_dep_job_types.h | 29 ++++++
> drivers/gpu/drm/xe/xe_dep_scheduler.c | 145
> ++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_dep_scheduler.h | 21 ++++
> 4 files changed, 196 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_dep_job_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.c
> create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile
> b/drivers/gpu/drm/xe/Makefile
> index f5f5775acdc0..3523bd093b7a 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -28,6 +28,7 @@ $(obj)/generated/%_wa_oob.c
> $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \
> xe-y += xe_bb.o \
> xe_bo.o \
> xe_bo_evict.o \
> + xe_dep_scheduler.o \
> xe_devcoredump.o \
> xe_device.o \
> xe_device_sysfs.o \
> diff --git a/drivers/gpu/drm/xe/xe_dep_job_types.h
> b/drivers/gpu/drm/xe/xe_dep_job_types.h
> new file mode 100644
> index 000000000000..c6a484f24c8c
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_dep_job_types.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_DEP_JOB_TYPES_H_
> +#define _XE_DEP_JOB_TYPES_H_
> +
> +#include <drm/gpu_scheduler.h>
> +
> +struct xe_dep_job;
> +
> +/** struct xe_dep_job_ops - Generic Xe dependency job operations */
> +struct xe_dep_job_ops {
> + /** @run_job: Run generic Xe dependency job */
> + struct dma_fence *(*run_job)(struct xe_dep_job *job);
> + /** @free_job: Free generic Xe dependency job */
> + void (*free_job)(struct xe_dep_job *job);
> +};
> +
> +/** struct xe_dep_job - Generic dependency Xe job */
> +struct xe_dep_job {
> + /** @drm: base DRM scheduler job */
> + struct drm_sched_job drm;
> + /** @ops: dependency job operations */
> + const struct xe_dep_job_ops *ops;
> +};
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.c
> b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> new file mode 100644
> index 000000000000..fbd55577d787
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> @@ -0,0 +1,145 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/slab.h>
> +
> +#include <drm/gpu_scheduler.h>
> +
> +#include "xe_dep_job_types.h"
> +#include "xe_dep_scheduler.h"
> +#include "xe_device_types.h"
> +
> +/**
> + * DOC: Xe Dependency Scheduler
> + *
> + * The Xe dependency scheduler is a simple wrapper built around the
> DRM
> + * scheduler to execute jobs once their dependencies are resolved
> (i.e., all
> + * input fences specified as dependencies are signaled). The jobs
> that are
> + * executed contain virtual functions to run (execute) and free the
> job,
> + * allowing a single dependency scheduler to handle jobs performing
> different
> + * operations.
> + *
> + * Example use cases include deferred resource freeing, TLB
> invalidations after
> + * bind jobs, etc.
> + */
> +
> +/** struct xe_dep_scheduler - Generic Xe dependency scheduler */
> +struct xe_dep_scheduler {
> + /** @sched: DRM GPU scheduler */
> + struct drm_gpu_scheduler sched;
Would it make sense to support sharing a single drm_gpu_scheduler for
many xe_dep_schedulers? Thinking of the first use-case where we'd
probably want just a single drm_gpu_scheduler per GuC since
invalidations are ordered anyway?
/Thomas
> + /** @entity: DRM scheduler entity */
> + struct drm_sched_entity entity;
> + /** @rcu: For safe freeing of exported dma fences */
> + struct rcu_head rcu;
> +};
> +
> +static struct dma_fence *xe_dep_scheduler_run_job(struct
> drm_sched_job *drm_job)
> +{
> + struct xe_dep_job *dep_job =
> + container_of(drm_job, typeof(*dep_job), drm);
> +
> + return dep_job->ops->run_job(dep_job);
> +}
> +
> +static void xe_dep_scheduler_free_job(struct drm_sched_job *drm_job)
> +{
> + struct xe_dep_job *dep_job =
> + container_of(drm_job, typeof(*dep_job), drm);
> +
> + dep_job->ops->free_job(dep_job);
> +}
> +
> +static const struct drm_sched_backend_ops sched_ops = {
> + .run_job = xe_dep_scheduler_run_job,
> + .free_job = xe_dep_scheduler_free_job,
> +};
> +
> +/**
> + * xe_dep_scheduler_create() - Generic Xe dependency scheduler
> create
> + * @xe: Xe device
> + * @submit_wq: Submit workqueue struct (can be NULL)
> + * @name: Name of dependency scheduler
> + * @job_limit: Max dependency jobs that can be scheduled
> + *
> + * Create a generic Xe dependency scheduler and initialize internal
> DRM
> + * scheduler objects.
> + *
> + * Return: Generic Xe dependency scheduler object or ERR_PTR
> + */
> +struct xe_dep_scheduler *
> +xe_dep_scheduler_create(struct xe_device *xe,
> + struct workqueue_struct *submit_wq,
> + const char *name, u32 job_limit)
> +{
> + struct xe_dep_scheduler *dep_scheduler;
> + struct drm_gpu_scheduler *sched;
> + const struct drm_sched_init_args args = {
> + .ops = &sched_ops,
> + .submit_wq = submit_wq,
> + .num_rqs = 1,
> + .credit_limit = job_limit,
> + .timeout = MAX_SCHEDULE_TIMEOUT,
> + .name = name,
> + .dev = xe->drm.dev,
> + };
> + int err;
> +
> + dep_scheduler = kzalloc(sizeof(*dep_scheduler), GFP_KERNEL);
> + if (!dep_scheduler)
> + return ERR_PTR(-ENOMEM);
> +
> + err = drm_sched_init(&dep_scheduler->sched, &args);
> + if (err)
> + goto err_free;
> +
> + sched = &dep_scheduler->sched;
> + err = drm_sched_entity_init(&dep_scheduler->entity, 0,
> + (struct drm_gpu_scheduler
> **)&sched, 1,
> + NULL);
> + if (err)
> + goto err_sched;
> +
> + init_rcu_head(&dep_scheduler->rcu);
> +
> + return dep_scheduler;
> +
> +err_sched:
> + drm_sched_fini(&dep_scheduler->sched);
> +err_free:
> + kfree(dep_scheduler);
> +
> + return ERR_PTR(err);
> +}
> +
> +/**
> + * xe_dep_scheduler_fini() - Generic Xe dependency scheduler
> finalize
> + * @dep_scheduler: Generic Xe dependency scheduler object
> + *
> + * Finalize internal DRM scheduler objects and free generic Xe
> dependency
> + * scheduler object
> + */
> +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler)
> +{
> + drm_sched_entity_fini(&dep_scheduler->entity);
> + drm_sched_fini(&dep_scheduler->sched);
> + /*
> + * RCU free due sched being exported via DRM scheduler
> fences
> + * (timeline name).
> + */
> + kfree_rcu(dep_scheduler, rcu);
> +}
> +
> +/**
> + * xe_dep_scheduler_entity() - Retrieve a generic Xe dependency
> scheduler
> + * DRM scheduler entity
> + * @dep_scheduler: Generic Xe dependency scheduler object
> + *
> + * Return: The generic Xe dependency scheduler's DRM scheduler
> entity
> + */
> +struct drm_sched_entity *
> +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler)
> +{
> + return &dep_scheduler->entity;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.h
> b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> new file mode 100644
> index 000000000000..853961eec64b
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/types.h>
> +
> +struct drm_sched_entity;
> +struct workqueue_struct;
> +struct xe_dep_scheduler;
> +struct xe_device;
> +
> +struct xe_dep_scheduler *
> +xe_dep_scheduler_create(struct xe_device *xe,
> + struct workqueue_struct *submit_wq,
> + const char *name, u32 job_limit);
> +
> +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler);
> +
> +struct drm_sched_entity *
> +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler);
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler
2025-06-18 11:20 ` Thomas Hellström
@ 2025-06-18 14:10 ` Matthew Brost
2025-06-24 5:34 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-06-18 14:10 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe, himal.prasad.ghimiray, matthew.auld
On Wed, Jun 18, 2025 at 01:20:42PM +0200, Thomas Hellström wrote:
> On Tue, 2025-06-17 at 08:37 -0700, Matthew Brost wrote:
> > Add generic dependecy jobs / scheduler which serves as wrapper for
> > DRM
> > scheduler. Useful when we want delay a generic operation until a
> > dma-fence signals.
> >
> > Existing use cases could be destroying of resources based fences /
> > dma-resv, the preempt rebind worker, and pipelined GT TLB
> > invalidations.
> >
> > Written in such a way it could be moved to DRM subsystem if needed.
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/Makefile | 1 +
> > drivers/gpu/drm/xe/xe_dep_job_types.h | 29 ++++++
> > drivers/gpu/drm/xe/xe_dep_scheduler.c | 145
> > ++++++++++++++++++++++++++
> > drivers/gpu/drm/xe/xe_dep_scheduler.h | 21 ++++
> > 4 files changed, 196 insertions(+)
> > create mode 100644 drivers/gpu/drm/xe/xe_dep_job_types.h
> > create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.c
> > create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.h
> >
> > diff --git a/drivers/gpu/drm/xe/Makefile
> > b/drivers/gpu/drm/xe/Makefile
> > index f5f5775acdc0..3523bd093b7a 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -28,6 +28,7 @@ $(obj)/generated/%_wa_oob.c
> > $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \
> > xe-y += xe_bb.o \
> > xe_bo.o \
> > xe_bo_evict.o \
> > + xe_dep_scheduler.o \
> > xe_devcoredump.o \
> > xe_device.o \
> > xe_device_sysfs.o \
> > diff --git a/drivers/gpu/drm/xe/xe_dep_job_types.h
> > b/drivers/gpu/drm/xe/xe_dep_job_types.h
> > new file mode 100644
> > index 000000000000..c6a484f24c8c
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_dep_job_types.h
> > @@ -0,0 +1,29 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2025 Intel Corporation
> > + */
> > +
> > +#ifndef _XE_DEP_JOB_TYPES_H_
> > +#define _XE_DEP_JOB_TYPES_H_
> > +
> > +#include <drm/gpu_scheduler.h>
> > +
> > +struct xe_dep_job;
> > +
> > +/** struct xe_dep_job_ops - Generic Xe dependency job operations */
> > +struct xe_dep_job_ops {
> > + /** @run_job: Run generic Xe dependency job */
> > + struct dma_fence *(*run_job)(struct xe_dep_job *job);
> > + /** @free_job: Free generic Xe dependency job */
> > + void (*free_job)(struct xe_dep_job *job);
> > +};
> > +
> > +/** struct xe_dep_job - Generic dependency Xe job */
> > +struct xe_dep_job {
> > + /** @drm: base DRM scheduler job */
> > + struct drm_sched_job drm;
> > + /** @ops: dependency job operations */
> > + const struct xe_dep_job_ops *ops;
> > +};
> > +
> > +#endif
> > diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > new file mode 100644
> > index 000000000000..fbd55577d787
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > @@ -0,0 +1,145 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2025 Intel Corporation
> > + */
> > +
> > +#include <linux/slab.h>
> > +
> > +#include <drm/gpu_scheduler.h>
> > +
> > +#include "xe_dep_job_types.h"
> > +#include "xe_dep_scheduler.h"
> > +#include "xe_device_types.h"
> > +
> > +/**
> > + * DOC: Xe Dependency Scheduler
> > + *
> > + * The Xe dependency scheduler is a simple wrapper built around the
> > DRM
> > + * scheduler to execute jobs once their dependencies are resolved
> > (i.e., all
> > + * input fences specified as dependencies are signaled). The jobs
> > that are
> > + * executed contain virtual functions to run (execute) and free the
> > job,
> > + * allowing a single dependency scheduler to handle jobs performing
> > different
> > + * operations.
> > + *
> > + * Example use cases include deferred resource freeing, TLB
> > invalidations after
> > + * bind jobs, etc.
> > + */
> > +
> > +/** struct xe_dep_scheduler - Generic Xe dependency scheduler */
> > +struct xe_dep_scheduler {
> > + /** @sched: DRM GPU scheduler */
> > + struct drm_gpu_scheduler sched;
>
> Would it make sense to support sharing a single drm_gpu_scheduler for
> many xe_dep_schedulers? Thinking of the first use-case where we'd
So do you mean sharing a single drm_gpu_scheduler for many
drm_sched_entity? If that's what you mean, I think that would work. Each
entity gets its own dma-fence contetxt and that is what we want - so
we'd assign an entity per GT, queue tuple.
> probably want just a single drm_gpu_scheduler per GuC since
> invalidations are ordered anyway?
A scheduler must be ordered in at job completion from job issue order
which fits here too with a single scheduler per GuC.
That said, I'm on fence about the ROI of doing this type of refactor so
it would make dep scheduler API a bit more complex given entities now
need to dynamically allocated, added, and removed. I can play around
with this restructure and see what it looks like in code I suppose.
Matt
>
> /Thomas
>
>
> > + /** @entity: DRM scheduler entity */
> > + struct drm_sched_entity entity;
> > + /** @rcu: For safe freeing of exported dma fences */
> > + struct rcu_head rcu;
> > +};
> > +
> > +static struct dma_fence *xe_dep_scheduler_run_job(struct
> > drm_sched_job *drm_job)
> > +{
> > + struct xe_dep_job *dep_job =
> > + container_of(drm_job, typeof(*dep_job), drm);
> > +
> > + return dep_job->ops->run_job(dep_job);
> > +}
> > +
> > +static void xe_dep_scheduler_free_job(struct drm_sched_job *drm_job)
> > +{
> > + struct xe_dep_job *dep_job =
> > + container_of(drm_job, typeof(*dep_job), drm);
> > +
> > + dep_job->ops->free_job(dep_job);
> > +}
> > +
> > +static const struct drm_sched_backend_ops sched_ops = {
> > + .run_job = xe_dep_scheduler_run_job,
> > + .free_job = xe_dep_scheduler_free_job,
> > +};
> > +
> > +/**
> > + * xe_dep_scheduler_create() - Generic Xe dependency scheduler
> > create
> > + * @xe: Xe device
> > + * @submit_wq: Submit workqueue struct (can be NULL)
> > + * @name: Name of dependency scheduler
> > + * @job_limit: Max dependency jobs that can be scheduled
> > + *
> > + * Create a generic Xe dependency scheduler and initialize internal
> > DRM
> > + * scheduler objects.
> > + *
> > + * Return: Generic Xe dependency scheduler object or ERR_PTR
> > + */
> > +struct xe_dep_scheduler *
> > +xe_dep_scheduler_create(struct xe_device *xe,
> > + struct workqueue_struct *submit_wq,
> > + const char *name, u32 job_limit)
> > +{
> > + struct xe_dep_scheduler *dep_scheduler;
> > + struct drm_gpu_scheduler *sched;
> > + const struct drm_sched_init_args args = {
> > + .ops = &sched_ops,
> > + .submit_wq = submit_wq,
> > + .num_rqs = 1,
> > + .credit_limit = job_limit,
> > + .timeout = MAX_SCHEDULE_TIMEOUT,
> > + .name = name,
> > + .dev = xe->drm.dev,
> > + };
> > + int err;
> > +
> > + dep_scheduler = kzalloc(sizeof(*dep_scheduler), GFP_KERNEL);
> > + if (!dep_scheduler)
> > + return ERR_PTR(-ENOMEM);
> > +
> > + err = drm_sched_init(&dep_scheduler->sched, &args);
> > + if (err)
> > + goto err_free;
> > +
> > + sched = &dep_scheduler->sched;
> > + err = drm_sched_entity_init(&dep_scheduler->entity, 0,
> > + (struct drm_gpu_scheduler
> > **)&sched, 1,
> > + NULL);
> > + if (err)
> > + goto err_sched;
> > +
> > + init_rcu_head(&dep_scheduler->rcu);
> > +
> > + return dep_scheduler;
> > +
> > +err_sched:
> > + drm_sched_fini(&dep_scheduler->sched);
> > +err_free:
> > + kfree(dep_scheduler);
> > +
> > + return ERR_PTR(err);
> > +}
> > +
> > +/**
> > + * xe_dep_scheduler_fini() - Generic Xe dependency scheduler
> > finalize
> > + * @dep_scheduler: Generic Xe dependency scheduler object
> > + *
> > + * Finalize internal DRM scheduler objects and free generic Xe
> > dependency
> > + * scheduler object
> > + */
> > +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler)
> > +{
> > + drm_sched_entity_fini(&dep_scheduler->entity);
> > + drm_sched_fini(&dep_scheduler->sched);
> > + /*
> > + * RCU free due sched being exported via DRM scheduler
> > fences
> > + * (timeline name).
> > + */
> > + kfree_rcu(dep_scheduler, rcu);
> > +}
> > +
> > +/**
> > + * xe_dep_scheduler_entity() - Retrieve a generic Xe dependency
> > scheduler
> > + * DRM scheduler entity
> > + * @dep_scheduler: Generic Xe dependency scheduler object
> > + *
> > + * Return: The generic Xe dependency scheduler's DRM scheduler
> > entity
> > + */
> > +struct drm_sched_entity *
> > +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler)
> > +{
> > + return &dep_scheduler->entity;
> > +}
> > diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > new file mode 100644
> > index 000000000000..853961eec64b
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > @@ -0,0 +1,21 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2025 Intel Corporation
> > + */
> > +
> > +#include <linux/types.h>
> > +
> > +struct drm_sched_entity;
> > +struct workqueue_struct;
> > +struct xe_dep_scheduler;
> > +struct xe_device;
> > +
> > +struct xe_dep_scheduler *
> > +xe_dep_scheduler_create(struct xe_device *xe,
> > + struct workqueue_struct *submit_wq,
> > + const char *name, u32 job_limit);
> > +
> > +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler);
> > +
> > +struct drm_sched_entity *
> > +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler);
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler
2025-06-18 14:10 ` Matthew Brost
@ 2025-06-24 5:34 ` Matthew Brost
0 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-24 5:34 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe, himal.prasad.ghimiray, matthew.auld
On Wed, Jun 18, 2025 at 07:10:21AM -0700, Matthew Brost wrote:
> On Wed, Jun 18, 2025 at 01:20:42PM +0200, Thomas Hellström wrote:
> > On Tue, 2025-06-17 at 08:37 -0700, Matthew Brost wrote:
> > > Add generic dependecy jobs / scheduler which serves as wrapper for
> > > DRM
> > > scheduler. Useful when we want delay a generic operation until a
> > > dma-fence signals.
> > >
> > > Existing use cases could be destroying of resources based fences /
> > > dma-resv, the preempt rebind worker, and pipelined GT TLB
> > > invalidations.
> > >
> > > Written in such a way it could be moved to DRM subsystem if needed.
> > >
> > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/Makefile | 1 +
> > > drivers/gpu/drm/xe/xe_dep_job_types.h | 29 ++++++
> > > drivers/gpu/drm/xe/xe_dep_scheduler.c | 145
> > > ++++++++++++++++++++++++++
> > > drivers/gpu/drm/xe/xe_dep_scheduler.h | 21 ++++
> > > 4 files changed, 196 insertions(+)
> > > create mode 100644 drivers/gpu/drm/xe/xe_dep_job_types.h
> > > create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.c
> > > create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.h
> > >
> > > diff --git a/drivers/gpu/drm/xe/Makefile
> > > b/drivers/gpu/drm/xe/Makefile
> > > index f5f5775acdc0..3523bd093b7a 100644
> > > --- a/drivers/gpu/drm/xe/Makefile
> > > +++ b/drivers/gpu/drm/xe/Makefile
> > > @@ -28,6 +28,7 @@ $(obj)/generated/%_wa_oob.c
> > > $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \
> > > xe-y += xe_bb.o \
> > > xe_bo.o \
> > > xe_bo_evict.o \
> > > + xe_dep_scheduler.o \
> > > xe_devcoredump.o \
> > > xe_device.o \
> > > xe_device_sysfs.o \
> > > diff --git a/drivers/gpu/drm/xe/xe_dep_job_types.h
> > > b/drivers/gpu/drm/xe/xe_dep_job_types.h
> > > new file mode 100644
> > > index 000000000000..c6a484f24c8c
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_dep_job_types.h
> > > @@ -0,0 +1,29 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2025 Intel Corporation
> > > + */
> > > +
> > > +#ifndef _XE_DEP_JOB_TYPES_H_
> > > +#define _XE_DEP_JOB_TYPES_H_
> > > +
> > > +#include <drm/gpu_scheduler.h>
> > > +
> > > +struct xe_dep_job;
> > > +
> > > +/** struct xe_dep_job_ops - Generic Xe dependency job operations */
> > > +struct xe_dep_job_ops {
> > > + /** @run_job: Run generic Xe dependency job */
> > > + struct dma_fence *(*run_job)(struct xe_dep_job *job);
> > > + /** @free_job: Free generic Xe dependency job */
> > > + void (*free_job)(struct xe_dep_job *job);
> > > +};
> > > +
> > > +/** struct xe_dep_job - Generic dependency Xe job */
> > > +struct xe_dep_job {
> > > + /** @drm: base DRM scheduler job */
> > > + struct drm_sched_job drm;
> > > + /** @ops: dependency job operations */
> > > + const struct xe_dep_job_ops *ops;
> > > +};
> > > +
> > > +#endif
> > > diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > > b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > > new file mode 100644
> > > index 000000000000..fbd55577d787
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.c
> > > @@ -0,0 +1,145 @@
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > + * Copyright © 2025 Intel Corporation
> > > + */
> > > +
> > > +#include <linux/slab.h>
> > > +
> > > +#include <drm/gpu_scheduler.h>
> > > +
> > > +#include "xe_dep_job_types.h"
> > > +#include "xe_dep_scheduler.h"
> > > +#include "xe_device_types.h"
> > > +
> > > +/**
> > > + * DOC: Xe Dependency Scheduler
> > > + *
> > > + * The Xe dependency scheduler is a simple wrapper built around the
> > > DRM
> > > + * scheduler to execute jobs once their dependencies are resolved
> > > (i.e., all
> > > + * input fences specified as dependencies are signaled). The jobs
> > > that are
> > > + * executed contain virtual functions to run (execute) and free the
> > > job,
> > > + * allowing a single dependency scheduler to handle jobs performing
> > > different
> > > + * operations.
> > > + *
> > > + * Example use cases include deferred resource freeing, TLB
> > > invalidations after
> > > + * bind jobs, etc.
> > > + */
> > > +
> > > +/** struct xe_dep_scheduler - Generic Xe dependency scheduler */
> > > +struct xe_dep_scheduler {
> > > + /** @sched: DRM GPU scheduler */
> > > + struct drm_gpu_scheduler sched;
> >
> > Would it make sense to support sharing a single drm_gpu_scheduler for
> > many xe_dep_schedulers? Thinking of the first use-case where we'd
>
> So do you mean sharing a single drm_gpu_scheduler for many
> drm_sched_entity? If that's what you mean, I think that would work. Each
> entity gets its own dma-fence contetxt and that is what we want - so
> we'd assign an entity per GT, queue tuple.
>
> > probably want just a single drm_gpu_scheduler per GuC since
> > invalidations are ordered anyway?
>
> A scheduler must be ordered in at job completion from job issue order
> which fits here too with a single scheduler per GuC.
>
> That said, I'm on fence about the ROI of doing this type of refactor so
> it would make dep scheduler API a bit more complex given entities now
> need to dynamically allocated, added, and removed. I can play around
> with this restructure and see what it looks like in code I suppose.
>
I thought about this a bit more, what actually might make a bit more
sense here is share scheduler a WQ for all TLB invalidations on a GT. We
fully contend on the TLB invalidation anyways, so little sense in
scheduling these on different WQs. All the interfaces exist for this,
just need pass in WQ argument when we create the xe_dep_schedulers in
the exec queue.
Matt
> Matt
>
> >
> > /Thomas
> >
> >
> > > + /** @entity: DRM scheduler entity */
> > > + struct drm_sched_entity entity;
> > > + /** @rcu: For safe freeing of exported dma fences */
> > > + struct rcu_head rcu;
> > > +};
> > > +
> > > +static struct dma_fence *xe_dep_scheduler_run_job(struct
> > > drm_sched_job *drm_job)
> > > +{
> > > + struct xe_dep_job *dep_job =
> > > + container_of(drm_job, typeof(*dep_job), drm);
> > > +
> > > + return dep_job->ops->run_job(dep_job);
> > > +}
> > > +
> > > +static void xe_dep_scheduler_free_job(struct drm_sched_job *drm_job)
> > > +{
> > > + struct xe_dep_job *dep_job =
> > > + container_of(drm_job, typeof(*dep_job), drm);
> > > +
> > > + dep_job->ops->free_job(dep_job);
> > > +}
> > > +
> > > +static const struct drm_sched_backend_ops sched_ops = {
> > > + .run_job = xe_dep_scheduler_run_job,
> > > + .free_job = xe_dep_scheduler_free_job,
> > > +};
> > > +
> > > +/**
> > > + * xe_dep_scheduler_create() - Generic Xe dependency scheduler
> > > create
> > > + * @xe: Xe device
> > > + * @submit_wq: Submit workqueue struct (can be NULL)
> > > + * @name: Name of dependency scheduler
> > > + * @job_limit: Max dependency jobs that can be scheduled
> > > + *
> > > + * Create a generic Xe dependency scheduler and initialize internal
> > > DRM
> > > + * scheduler objects.
> > > + *
> > > + * Return: Generic Xe dependency scheduler object or ERR_PTR
> > > + */
> > > +struct xe_dep_scheduler *
> > > +xe_dep_scheduler_create(struct xe_device *xe,
> > > + struct workqueue_struct *submit_wq,
> > > + const char *name, u32 job_limit)
> > > +{
> > > + struct xe_dep_scheduler *dep_scheduler;
> > > + struct drm_gpu_scheduler *sched;
> > > + const struct drm_sched_init_args args = {
> > > + .ops = &sched_ops,
> > > + .submit_wq = submit_wq,
> > > + .num_rqs = 1,
> > > + .credit_limit = job_limit,
> > > + .timeout = MAX_SCHEDULE_TIMEOUT,
> > > + .name = name,
> > > + .dev = xe->drm.dev,
> > > + };
> > > + int err;
> > > +
> > > + dep_scheduler = kzalloc(sizeof(*dep_scheduler), GFP_KERNEL);
> > > + if (!dep_scheduler)
> > > + return ERR_PTR(-ENOMEM);
> > > +
> > > + err = drm_sched_init(&dep_scheduler->sched, &args);
> > > + if (err)
> > > + goto err_free;
> > > +
> > > + sched = &dep_scheduler->sched;
> > > + err = drm_sched_entity_init(&dep_scheduler->entity, 0,
> > > + (struct drm_gpu_scheduler
> > > **)&sched, 1,
> > > + NULL);
> > > + if (err)
> > > + goto err_sched;
> > > +
> > > + init_rcu_head(&dep_scheduler->rcu);
> > > +
> > > + return dep_scheduler;
> > > +
> > > +err_sched:
> > > + drm_sched_fini(&dep_scheduler->sched);
> > > +err_free:
> > > + kfree(dep_scheduler);
> > > +
> > > + return ERR_PTR(err);
> > > +}
> > > +
> > > +/**
> > > + * xe_dep_scheduler_fini() - Generic Xe dependency scheduler
> > > finalize
> > > + * @dep_scheduler: Generic Xe dependency scheduler object
> > > + *
> > > + * Finalize internal DRM scheduler objects and free generic Xe
> > > dependency
> > > + * scheduler object
> > > + */
> > > +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler)
> > > +{
> > > + drm_sched_entity_fini(&dep_scheduler->entity);
> > > + drm_sched_fini(&dep_scheduler->sched);
> > > + /*
> > > + * RCU free due sched being exported via DRM scheduler
> > > fences
> > > + * (timeline name).
> > > + */
> > > + kfree_rcu(dep_scheduler, rcu);
> > > +}
> > > +
> > > +/**
> > > + * xe_dep_scheduler_entity() - Retrieve a generic Xe dependency
> > > scheduler
> > > + * DRM scheduler entity
> > > + * @dep_scheduler: Generic Xe dependency scheduler object
> > > + *
> > > + * Return: The generic Xe dependency scheduler's DRM scheduler
> > > entity
> > > + */
> > > +struct drm_sched_entity *
> > > +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler)
> > > +{
> > > + return &dep_scheduler->entity;
> > > +}
> > > diff --git a/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > > b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > > new file mode 100644
> > > index 000000000000..853961eec64b
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_dep_scheduler.h
> > > @@ -0,0 +1,21 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2025 Intel Corporation
> > > + */
> > > +
> > > +#include <linux/types.h>
> > > +
> > > +struct drm_sched_entity;
> > > +struct workqueue_struct;
> > > +struct xe_dep_scheduler;
> > > +struct xe_device;
> > > +
> > > +struct xe_dep_scheduler *
> > > +xe_dep_scheduler_create(struct xe_device *xe,
> > > + struct workqueue_struct *submit_wq,
> > > + const char *name, u32 job_limit);
> > > +
> > > +void xe_dep_scheduler_fini(struct xe_dep_scheduler *dep_scheduler);
> > > +
> > > +struct drm_sched_entity *
> > > +xe_dep_scheduler_entity(struct xe_dep_scheduler *dep_scheduler);
> >
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/6] drm/xe: Add dependency scheduler for GT TLB invalidations to bind queues
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
2025-06-17 15:37 ` [PATCH 1/6] drm/xe: Explicitly mark migration queues with flag Matthew Brost
2025-06-17 15:37 ` [PATCH 2/6] drm/xe: Add generic dependecy jobs / scheduler Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-17 15:37 ` [PATCH 4/6] drm/xe: Add xe_migrate_job_lock/unlock helpers Matthew Brost
` (7 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Add a generic dependency scheduler for GT TLB invalidations, used to
schedule jobs that issue GT TLB invalidations to bind queues.
Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_exec_queue_types.h | 13 +++++++++++++
2 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index fee22358cc09..53ef120c0281 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -12,6 +12,7 @@
#include <drm/drm_file.h>
#include <uapi/drm/xe_drm.h>
+#include "xe_dep_scheduler.h"
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_hw_engine_class_sysfs.h"
@@ -39,6 +40,12 @@ static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue
static void __xe_exec_queue_free(struct xe_exec_queue *q)
{
+ int i;
+
+ for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i)
+ if (q->tlb_inval[i].dep_scheduler)
+ xe_dep_scheduler_fini(q->tlb_inval[i].dep_scheduler);
+
if (xe_exec_queue_uses_pxp(q))
xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
if (q->vm)
@@ -94,6 +101,23 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
else
q->sched_props.priority = XE_EXEC_QUEUE_PRIORITY_NORMAL;
+ if (q->flags & (EXEC_QUEUE_FLAG_MIGRATE | EXEC_QUEUE_FLAG_VM)) {
+ int i;
+
+ for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i) {
+ struct xe_dep_scheduler *dep_scheduler;
+
+ dep_scheduler = xe_dep_scheduler_create(xe, NULL,
+ q->name, 16);
+ if (IS_ERR(dep_scheduler)) {
+ __xe_exec_queue_free(q);
+ return ERR_CAST(dep_scheduler);
+ }
+
+ q->tlb_inval[i].dep_scheduler = dep_scheduler;
+ }
+ }
+
if (vm)
q->vm = xe_vm_get(vm);
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index abdf4a57e6e2..ba443a497b38 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -134,6 +134,19 @@ struct xe_exec_queue {
struct list_head link;
} lr;
+#define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0
+#define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1
+#define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1)
+
+ /** @tlb_inval: TLB invalidations exec queue state */
+ struct {
+ /**
+ * @tlb_inval.dep_scheduler: The TLB invalidation
+ * dependency scheduler
+ */
+ struct xe_dep_scheduler *dep_scheduler;
+ } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
+
/** @pxp: PXP info tracking */
struct {
/** @pxp.type: PXP session type used by this queue */
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 4/6] drm/xe: Add xe_migrate_job_lock/unlock helpers
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (2 preceding siblings ...)
2025-06-17 15:37 ` [PATCH 3/6] drm/xe: Add dependency scheduler for GT TLB invalidations to bind queues Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-17 15:37 ` [PATCH 5/6] drm/xe: Add GT TLB invalidation jobs Matthew Brost
` (6 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Add xe_migrate_job_lock/unlock helpers is used ensure ordering when
issuing GT TLB invalidation jobs.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 38 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 4 ++++
2 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 9c246a3ee610..2f2ac8a44290 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1915,6 +1915,44 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
return IS_ERR(fence) ? PTR_ERR(fence) : 0;
}
+/**
+ * xe_migrate_job_lock() - Lock migrate job lock
+ * @m: The migration context.
+ * @q: Queue associated with the operation which requires a lock
+ *
+ * Lock the migrate job lock if the queue is a migration queue, otherwise
+ * assert the VM's dma-resv is held (user queue's have own locking).
+ */
+void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue *q)
+{
+ bool is_migrate = q == m->q;
+
+ if (is_migrate)
+ mutex_lock(&m->job_mutex);
+ else
+ xe_vm_assert_held(q->vm); /* User queues VM's should be
+ locked */
+}
+
+/**
+ * xe_migrate_job_unlock() - Unlock migrate job lock
+ * @m: The migration context.
+ * @q: Queue associated with the operation which requires a lock
+ *
+ * Unlock the migrate job lock if the queue is a migration queue, otherwise
+ * assert the VM's dma-resv is held (user queue's have own locking).
+ */
+void xe_migrate_job_unlock(struct xe_migrate *m, struct xe_exec_queue *q)
+{
+ bool is_migrate = q == m->q;
+
+ if (is_migrate)
+ mutex_unlock(&m->job_mutex);
+ else
+ xe_vm_assert_held(q->vm); /* User queues VM's should be
+ locked */
+}
+
#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
#include "tests/xe_migrate.c"
#endif
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index fb9839c1bae0..e9d83d320f8c 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -134,4 +134,8 @@ xe_migrate_update_pgtables(struct xe_migrate *m,
void xe_migrate_wait(struct xe_migrate *m);
struct xe_exec_queue *xe_tile_migrate_exec_queue(struct xe_tile *tile);
+
+void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue *q);
+void xe_migrate_job_unlock(struct xe_migrate *m, struct xe_exec_queue *q);
+
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 5/6] drm/xe: Add GT TLB invalidation jobs
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (3 preceding siblings ...)
2025-06-17 15:37 ` [PATCH 4/6] drm/xe: Add xe_migrate_job_lock/unlock helpers Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-17 15:37 ` [PATCH 6/6] drm/xe: Use GT TLB invalidation jobs in PT layer Matthew Brost
` (5 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Add GT TLB invalidation jobs which issue GT TLB invalidations. Built on
top of Xe generic dependency scheduler.
Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c | 274 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h | 34 +++
3 files changed, 309 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c
create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 3523bd093b7a..8387f6966d1f 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -55,6 +55,7 @@ xe-y += xe_bb.o \
xe_gt_sysfs.o \
xe_gt_throttle.o \
xe_gt_tlb_invalidation.o \
+ xe_gt_tlb_inval_job.o \
xe_gt_topology.o \
xe_guc.o \
xe_guc_ads.o \
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c b/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c
new file mode 100644
index 000000000000..68f0896f7ffe
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include "xe_dep_job_types.h"
+#include "xe_dep_scheduler.h"
+#include "xe_exec_queue.h"
+#include "xe_gt.h"
+#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval_job.h"
+#include "xe_migrate.h"
+#include "xe_pm.h"
+
+/** struct xe_gt_tlb_inval_job - GT TLB invalidation job */
+struct xe_gt_tlb_inval_job {
+ /** @dep: base generic dependency Xe job */
+ struct xe_dep_job dep;
+ /** @gt: GT to invalidate */
+ struct xe_gt *gt;
+ /** @q: exec queue issuing the invalidate */
+ struct xe_exec_queue *q;
+ /** @refcount: ref count of this job */
+ struct kref refcount;
+ /**
+ * @fence: dma fence to indicate completion. 1 way relationship - job
+ * can safely reference fence, fence cannot safely reference job.
+ */
+ struct dma_fence *fence;
+ /** @start: Start address to invalidate */
+ u64 start;
+ /** @end: End address to invalidate */
+ u64 end;
+ /** @asid: Address space ID to invalidate */
+ u32 asid;
+ /** @fence_armed: Fence has been armed */
+ bool fence_armed;
+};
+
+static void __xe_gt_tlb_inval_job_run(struct xe_gt_tlb_inval_job *job)
+{
+ struct xe_gt_tlb_invalidation_fence *ifence =
+ container_of(job->fence, typeof(*ifence), base);
+
+ xe_gt_tlb_invalidation_range(job->gt, ifence, job->start,
+ job->end, job->asid);
+}
+
+static struct dma_fence *xe_gt_tlb_inval_job_run(struct xe_dep_job *dep_job)
+{
+ struct xe_gt_tlb_inval_job *job =
+ container_of(dep_job, typeof(*job), dep);
+
+ __xe_gt_tlb_inval_job_run(job);
+
+ return job->fence;
+}
+
+static void xe_gt_tlb_inval_job_free(struct xe_dep_job *dep_job)
+{
+ struct xe_gt_tlb_inval_job *job =
+ container_of(dep_job, typeof(*job), dep);
+
+ /* Pairs with get in xe_gt_tlb_inval_job_push */
+ xe_gt_tlb_inval_job_put(job);
+}
+
+static const struct xe_dep_job_ops dep_job_ops = {
+ .run_job = xe_gt_tlb_inval_job_run,
+ .free_job = xe_gt_tlb_inval_job_free,
+};
+
+static int xe_gt_tlb_inval_context(struct xe_gt *gt)
+{
+ return xe_gt_is_media_type(gt) ? XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT :
+ XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT;
+}
+
+/**
+ * xe_gt_tlb_inval_job_create() - GT TLB invalidation job create
+ * @gt: GT to invalidate
+ * @q: exec queue issuing the invalidate
+ * @start: Start address to invalidate
+ * @end: End address to invalidate
+ * @asid: Address space ID to invalidate
+ *
+ * Create a GT TLB invalidation job and initialize internal fields. The caller is
+ * responsible for releasing the creation reference.
+ *
+ * Return: GT TLB invalidation job object or ERR_PTR
+ */
+struct xe_gt_tlb_inval_job *xe_gt_tlb_inval_job_create(struct xe_exec_queue *q,
+ struct xe_gt *gt,
+ u64 start, u64 end,
+ u32 asid)
+{
+ struct xe_gt_tlb_inval_job *job;
+ struct xe_dep_scheduler *dep_scheduler =
+ q->tlb_inval[xe_gt_tlb_inval_context(gt)].dep_scheduler;
+ struct drm_sched_entity *entity =
+ xe_dep_scheduler_entity(dep_scheduler);
+ int err;
+
+ job = kmalloc(sizeof(*job), GFP_KERNEL);
+ if (!job)
+ return ERR_PTR(-ENOMEM);
+
+ job->q = q;
+ job->gt = gt;
+ job->start = start;
+ job->end = end;
+ job->asid = asid;
+ job->fence_armed = false;
+ job->dep.ops = &dep_job_ops;
+ kref_init(&job->refcount);
+ xe_exec_queue_get(q);
+
+ job->fence = kmalloc(sizeof(struct xe_gt_tlb_invalidation_fence),
+ GFP_KERNEL);
+ if (!job->fence) {
+ err = -ENOMEM;
+ goto err_job;
+ }
+
+ err = drm_sched_job_init(&job->dep.drm, entity, 1, NULL,
+ q->xef ? q->xef->drm->client_id : 0);
+ if (err)
+ goto err_fence;
+
+ xe_pm_runtime_get_noresume(gt_to_xe(job->gt));
+ return job;
+
+err_fence:
+ kfree(job->fence);
+err_job:
+ xe_exec_queue_put(q);
+ kfree(job);
+
+ return ERR_PTR(err);
+}
+
+static void xe_gt_tlb_inval_job_destroy(struct kref *ref)
+{
+ struct xe_gt_tlb_inval_job *job = container_of(ref, typeof(*job),
+ refcount);
+ struct xe_device *xe = gt_to_xe(job->gt);
+ struct xe_exec_queue *q = job->q;
+
+ if (!job->fence_armed)
+ kfree(job->fence);
+ else
+ /* Ref from xe_gt_tlb_invalidation_fence_init */
+ dma_fence_put(job->fence);
+
+ drm_sched_job_cleanup(&job->dep.drm);
+ kfree(job);
+ xe_exec_queue_put(q); /* Pairs with get from xe_gt_tlb_inval_job_create */
+ xe_pm_runtime_put(xe); /* Pairs with get from xe_gt_tlb_inval_job_create */
+}
+/**
+ * xe_gt_tlb_inval_alloc_dep() - GT TLB invalidation job alloc dependency
+ * @job: GT TLB invalidation job to alloc dependency for
+ *
+ * Allocate storage for a dependency in the GT TLB invalidation fence. This
+ * function should be called at most once per job and must be paired with
+ * xe_gt_tlb_inval_job_push being called with a real (non-signaled) fence.
+ *
+ * Return: 0 on success, -errno on failure
+ */
+int xe_gt_tlb_inval_job_alloc_dep(struct xe_gt_tlb_inval_job *job)
+{
+ xe_assert(gt_to_xe(job->gt),
+ xa_load(&job->dep.drm.dependencies, 0) == NULL);
+
+ return drm_sched_job_add_dependency(&job->dep.drm,
+ dma_fence_get_stub());
+}
+
+/**
+ * xe_gt_tlb_inval_job_push() - GT TLB invalidation job push
+ * @job: GT TLB invalidation job to push
+ * @m: The migration object being used
+ * @fence: Dependency for GT TLB invalidation job
+ *
+ * Pushes a GT TLB invalidation job for execution, using @fence as a dependency.
+ * Storage for @fence must be preallocated with xe_gt_tlb_inval_job_alloc_dep
+ * prior to this call if @fence is not signaled. Takes a reference to the job’s
+ * finished fence, which the caller is responsible for releasing, and retutn it
+ * to the caller.
+ *
+ * Return: Job's finished fence
+ */
+struct dma_fence *xe_gt_tlb_inval_job_push(struct xe_gt_tlb_inval_job *job,
+ struct xe_migrate *m,
+ struct dma_fence *fence)
+{
+ struct xe_gt_tlb_invalidation_fence *ifence =
+ container_of(job->fence, typeof(*ifence), base);
+
+ if (!dma_fence_is_signaled(fence)) {
+ void *ptr;
+
+ /*
+ * Can be in path of reclaim, hence the preallocation of fence
+ * storage in xe_gt_tlb_inval_job_alloc_dep. Verify caller did
+ * this correctly.
+ */
+ xe_assert(gt_to_xe(job->gt),
+ xa_load(&job->dep.drm.dependencies, 0) ==
+ dma_fence_get_stub());
+
+ dma_fence_get(fence); /* ref released once dependency
+ processed by scheduler */
+ ptr = xa_store(&job->dep.drm.dependencies, 0, fence,
+ GFP_ATOMIC);
+ xe_assert(gt_to_xe(job->gt), !xa_is_err(ptr));
+ }
+
+ xe_gt_tlb_inval_job_get(job); /* Pairs with put in free_job */
+ job->fence_armed = true;
+
+ /*
+ * We need the migration lock to protect the seqnos (job and
+ * invalidation fence) and the spsc queue, only taken on migration
+ * queue, user queues protected dma-resv VM lock.
+ */
+ xe_migrate_job_lock(m, job->q);
+
+ /* Creation ref pairs with put in xe_gt_tlb_inval_job_destroy */
+ xe_gt_tlb_invalidation_fence_init(job->gt, ifence, false);
+ dma_fence_get(job->fence); /* Pairs with put in DRM scheduler */
+
+ drm_sched_job_arm(&job->dep.drm);
+ /*
+ * caller ref, get must be done before job push as it could immediately
+ * signal and free.
+ */
+ dma_fence_get(&job->dep.drm.s_fence->finished);
+ drm_sched_entity_push_job(&job->dep.drm);
+
+ xe_migrate_job_unlock(m, job->q);
+
+ /*
+ * Not using job->fence, as it has its own dma-fence context, which does
+ * not allow GT TLB invalidation fences on the same queue, GT tuple to
+ * be squashed in dma-resv/DRM scheduler. Instead, we use the DRM scheduler
+ * context and job's finished fence, which enables squashing.
+ */
+ return &job->dep.drm.s_fence->finished;
+}
+
+/**
+ * xe_gt_tlb_inval_job_get() - Get a reference to GT TLB invalidation job
+ * @job: GT TLB invalidation job object
+ *
+ * Increment the GT TLB invalidation job's reference count
+ */
+void xe_gt_tlb_inval_job_get(struct xe_gt_tlb_inval_job *job)
+{
+ kref_get(&job->refcount);
+}
+
+/**
+ * xe_gt_tlb_inval_job_put() - Put a reference to GT TLB invalidation job
+ * @job: GT TLB invalidation job object
+ *
+ * Decrement the GT TLB invalidation job's reference count, call
+ * xe_gt_tlb_inval_job_destroy when reference count == 0.
+ */
+void xe_gt_tlb_inval_job_put(struct xe_gt_tlb_inval_job *job)
+{
+ if (job && !IS_ERR(job))
+ kref_put(&job->refcount, xe_gt_tlb_inval_job_destroy);
+}
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h
new file mode 100644
index 000000000000..883896194a34
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_GT_TLB_INVAL_JOB_H_
+#define _XE_GT_TLB_INVAL_JOB_H_
+
+#include <linux/types.h>
+
+struct dma_fence;
+struct drm_sched_job;
+struct kref;
+struct xe_exec_queue;
+struct xe_gt;
+struct xe_gt_tlb_inval_job;
+struct xe_migrate;
+
+struct xe_gt_tlb_inval_job *xe_gt_tlb_inval_job_create(struct xe_exec_queue *q,
+ struct xe_gt *gt,
+ u64 start, u64 end,
+ u32 asid);
+
+int xe_gt_tlb_inval_job_alloc_dep(struct xe_gt_tlb_inval_job *job);
+
+struct dma_fence *xe_gt_tlb_inval_job_push(struct xe_gt_tlb_inval_job *job,
+ struct xe_migrate *m,
+ struct dma_fence *fence);
+
+void xe_gt_tlb_inval_job_get(struct xe_gt_tlb_inval_job *job);
+
+void xe_gt_tlb_inval_job_put(struct xe_gt_tlb_inval_job *job);
+
+#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 6/6] drm/xe: Use GT TLB invalidation jobs in PT layer
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (4 preceding siblings ...)
2025-06-17 15:37 ` [PATCH 5/6] drm/xe: Add GT TLB invalidation jobs Matthew Brost
@ 2025-06-17 15:37 ` Matthew Brost
2025-06-18 23:51 ` Matthew Brost
2025-06-17 16:39 ` ✗ CI.checkpatch: warning for Use DRM scheduler for delayed GT TLB invalidations Patchwork
` (4 subsequent siblings)
10 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 15:37 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
Rather than open-coding GT TLB invalidations in the PT layer, use GT TLB
invalidation jobs. The real benefit is that GT TLB invalidation jobs use
a single dma-fence context, allowing the generated fences to be squashed
in dma-resv/DRM scheduler.
Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.h | 9 ++
drivers/gpu/drm/xe/xe_pt.c | 193 +++++++++++++-------------------
2 files changed, 88 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index e9d83d320f8c..605398ea773e 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -14,6 +14,7 @@ struct ttm_resource;
struct xe_bo;
struct xe_gt;
+struct xe_gt_tlb_inval_job;
struct xe_exec_queue;
struct xe_migrate;
struct xe_migrate_pt_update;
@@ -89,6 +90,14 @@ struct xe_migrate_pt_update {
struct xe_vma_ops *vops;
/** @job: The job if a GPU page-table update. NULL otherwise */
struct xe_sched_job *job;
+ /**
+ * @ijob: The GT TLB invalidation job for primary tile. NULL otherwise
+ */
+ struct xe_gt_tlb_inval_job *ijob;
+ /**
+ * @mjob: The GT TLB invalidation job for media tile. NULL otherwise
+ */
+ struct xe_gt_tlb_inval_job *mjob;
/** @tile_id: Tile ID of the update */
u8 tile_id;
};
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 971e55fd0061..8113223de61f 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -13,7 +13,7 @@
#include "xe_drm_client.h"
#include "xe_exec_queue.h"
#include "xe_gt.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval_job.h"
#include "xe_migrate.h"
#include "xe_pt_types.h"
#include "xe_pt_walk.h"
@@ -1261,6 +1261,8 @@ static int op_add_deps(struct xe_vm *vm, struct xe_vma_op *op,
}
static int xe_pt_vm_dependencies(struct xe_sched_job *job,
+ struct xe_gt_tlb_inval_job *ijob,
+ struct xe_gt_tlb_inval_job *mjob,
struct xe_vm *vm,
struct xe_vma_ops *vops,
struct xe_vm_pgtable_update_ops *pt_update_ops,
@@ -1328,6 +1330,20 @@ static int xe_pt_vm_dependencies(struct xe_sched_job *job,
for (i = 0; job && !err && i < vops->num_syncs; i++)
err = xe_sync_entry_add_deps(&vops->syncs[i], job);
+ if (job) {
+ if (ijob) {
+ err = xe_gt_tlb_inval_job_alloc_dep(ijob);
+ if (err)
+ return err;
+ }
+
+ if (mjob) {
+ err = xe_gt_tlb_inval_job_alloc_dep(mjob);
+ if (err)
+ return err;
+ }
+ }
+
return err;
}
@@ -1339,7 +1355,8 @@ static int xe_pt_pre_commit(struct xe_migrate_pt_update *pt_update)
struct xe_vm_pgtable_update_ops *pt_update_ops =
&vops->pt_update_ops[pt_update->tile_id];
- return xe_pt_vm_dependencies(pt_update->job, vm, pt_update->vops,
+ return xe_pt_vm_dependencies(pt_update->job, pt_update->ijob,
+ pt_update->mjob, vm, pt_update->vops,
pt_update_ops, rftree);
}
@@ -1509,75 +1526,6 @@ static int xe_pt_svm_pre_commit(struct xe_migrate_pt_update *pt_update)
}
#endif
-struct invalidation_fence {
- struct xe_gt_tlb_invalidation_fence base;
- struct xe_gt *gt;
- struct dma_fence *fence;
- struct dma_fence_cb cb;
- struct work_struct work;
- u64 start;
- u64 end;
- u32 asid;
-};
-
-static void invalidation_fence_cb(struct dma_fence *fence,
- struct dma_fence_cb *cb)
-{
- struct invalidation_fence *ifence =
- container_of(cb, struct invalidation_fence, cb);
- struct xe_device *xe = gt_to_xe(ifence->gt);
-
- trace_xe_gt_tlb_invalidation_fence_cb(xe, &ifence->base);
- if (!ifence->fence->error) {
- queue_work(system_wq, &ifence->work);
- } else {
- ifence->base.base.error = ifence->fence->error;
- xe_gt_tlb_invalidation_fence_signal(&ifence->base);
- }
- dma_fence_put(ifence->fence);
-}
-
-static void invalidation_fence_work_func(struct work_struct *w)
-{
- struct invalidation_fence *ifence =
- container_of(w, struct invalidation_fence, work);
- struct xe_device *xe = gt_to_xe(ifence->gt);
-
- trace_xe_gt_tlb_invalidation_fence_work_func(xe, &ifence->base);
- xe_gt_tlb_invalidation_range(ifence->gt, &ifence->base, ifence->start,
- ifence->end, ifence->asid);
-}
-
-static void invalidation_fence_init(struct xe_gt *gt,
- struct invalidation_fence *ifence,
- struct dma_fence *fence,
- u64 start, u64 end, u32 asid)
-{
- int ret;
-
- trace_xe_gt_tlb_invalidation_fence_create(gt_to_xe(gt), &ifence->base);
-
- xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
-
- ifence->fence = fence;
- ifence->gt = gt;
- ifence->start = start;
- ifence->end = end;
- ifence->asid = asid;
-
- INIT_WORK(&ifence->work, invalidation_fence_work_func);
- ret = dma_fence_add_callback(fence, &ifence->cb, invalidation_fence_cb);
- if (ret == -ENOENT) {
- dma_fence_put(ifence->fence); /* Usually dropped in CB */
- invalidation_fence_work_func(&ifence->work);
- } else if (ret) {
- dma_fence_put(&ifence->base.base); /* Caller ref */
- dma_fence_put(&ifence->base.base); /* Creation ref */
- }
-
- xe_gt_assert(gt, !ret || ret == -ENOENT);
-}
-
struct xe_pt_stage_unbind_walk {
/** @base: The pagewalk base-class. */
struct xe_pt_walk base;
@@ -2378,8 +2326,8 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
struct xe_vm *vm = vops->vm;
struct xe_vm_pgtable_update_ops *pt_update_ops =
&vops->pt_update_ops[tile->id];
- struct dma_fence *fence;
- struct invalidation_fence *ifence = NULL, *mfence = NULL;
+ struct dma_fence *fence, *ifence, *mfence;
+ struct xe_gt_tlb_inval_job *ijob = NULL, *mjob = NULL;
struct dma_fence **fences = NULL;
struct dma_fence_array *cf = NULL;
struct xe_range_fence *rfence;
@@ -2411,34 +2359,47 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
#endif
if (pt_update_ops->needs_invalidation) {
- ifence = kzalloc(sizeof(*ifence), GFP_KERNEL);
- if (!ifence) {
- err = -ENOMEM;
+ ijob = xe_gt_tlb_inval_job_create(pt_update_ops->q,
+ tile->primary_gt,
+ pt_update_ops->start,
+ pt_update_ops->last,
+ vm->usm.asid);
+
+ if (IS_ERR(ijob)) {
+ err = PTR_ERR(ijob);;
goto kill_vm_tile1;
}
+
if (tile->media_gt) {
- mfence = kzalloc(sizeof(*ifence), GFP_KERNEL);
- if (!mfence) {
- err = -ENOMEM;
- goto free_ifence;
+ mjob = xe_gt_tlb_inval_job_create(pt_update_ops->q,
+ tile->media_gt,
+ pt_update_ops->start,
+ pt_update_ops->last,
+ vm->usm.asid);
+ if (IS_ERR(mjob)) {
+ err = PTR_ERR(mjob);
+ goto free_ijob;
}
fences = kmalloc_array(2, sizeof(*fences), GFP_KERNEL);
if (!fences) {
err = -ENOMEM;
- goto free_ifence;
+ goto free_ijob;
}
cf = dma_fence_array_alloc(2);
if (!cf) {
err = -ENOMEM;
- goto free_ifence;
+ goto free_ijob;
}
}
+
+ update.ijob = ijob;
+ update.mjob = mjob;
}
rfence = kzalloc(sizeof(*rfence), GFP_KERNEL);
if (!rfence) {
err = -ENOMEM;
- goto free_ifence;
+ goto free_ijob;
}
fence = xe_migrate_update_pgtables(tile->migrate, &update);
@@ -2448,6 +2409,30 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
}
/* Point of no return - VM killed if failure after this */
+
+ if (ijob) {
+ struct dma_fence *__fence;
+
+ ifence = xe_gt_tlb_inval_job_push(ijob, tile->migrate, fence);
+ __fence = ifence;
+
+ if (mjob) {
+ fences[0] = ifence;
+ mfence = xe_gt_tlb_inval_job_push(mjob, tile->migrate,
+ fence);
+ fences[1] = mfence;
+
+ dma_fence_array_init(cf, 2, fences,
+ vm->composite_fence_ctx,
+ vm->composite_fence_seqno++,
+ false);
+ __fence = &cf->base;
+ }
+
+ dma_fence_put(fence);
+ fence = __fence;
+ }
+
for (i = 0; i < pt_update_ops->current_op; ++i) {
struct xe_vm_pgtable_update_op *pt_op = &pt_update_ops->ops[i];
@@ -2462,30 +2447,7 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
pt_update_ops->last, fence))
dma_fence_wait(fence, false);
- /* tlb invalidation must be done before signaling rebind */
- if (ifence) {
- if (mfence)
- dma_fence_get(fence);
- invalidation_fence_init(tile->primary_gt, ifence, fence,
- pt_update_ops->start,
- pt_update_ops->last, vm->usm.asid);
- if (mfence) {
- invalidation_fence_init(tile->media_gt, mfence, fence,
- pt_update_ops->start,
- pt_update_ops->last, vm->usm.asid);
- fences[0] = &ifence->base.base;
- fences[1] = &mfence->base.base;
- dma_fence_array_init(cf, 2, fences,
- vm->composite_fence_ctx,
- vm->composite_fence_seqno++,
- false);
- fence = &cf->base;
- } else {
- fence = &ifence->base.base;
- }
- }
-
- if (!mfence) {
+ if (!mjob) {
dma_resv_add_fence(xe_vm_resv(vm), fence,
pt_update_ops->wait_vm_bookkeep ?
DMA_RESV_USAGE_KERNEL :
@@ -2494,19 +2456,19 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
list_for_each_entry(op, &vops->list, link)
op_commit(vops->vm, tile, pt_update_ops, op, fence, NULL);
} else {
- dma_resv_add_fence(xe_vm_resv(vm), &ifence->base.base,
+ dma_resv_add_fence(xe_vm_resv(vm), ifence,
pt_update_ops->wait_vm_bookkeep ?
DMA_RESV_USAGE_KERNEL :
DMA_RESV_USAGE_BOOKKEEP);
- dma_resv_add_fence(xe_vm_resv(vm), &mfence->base.base,
+ dma_resv_add_fence(xe_vm_resv(vm), mfence,
pt_update_ops->wait_vm_bookkeep ?
DMA_RESV_USAGE_KERNEL :
DMA_RESV_USAGE_BOOKKEEP);
list_for_each_entry(op, &vops->list, link)
- op_commit(vops->vm, tile, pt_update_ops, op,
- &ifence->base.base, &mfence->base.base);
+ op_commit(vops->vm, tile, pt_update_ops, op, ifence,
+ mfence);
}
if (pt_update_ops->needs_svm_lock)
@@ -2514,15 +2476,18 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
if (pt_update_ops->needs_userptr_lock)
up_read(&vm->userptr.notifier_lock);
+ xe_gt_tlb_inval_job_put(mjob);
+ xe_gt_tlb_inval_job_put(ijob);
+
return fence;
free_rfence:
kfree(rfence);
-free_ifence:
+free_ijob:
kfree(cf);
kfree(fences);
- kfree(mfence);
- kfree(ifence);
+ xe_gt_tlb_inval_job_put(mjob);
+ xe_gt_tlb_inval_job_put(ijob);
kill_vm_tile1:
if (err != -EAGAIN && err != -ENODATA && tile->id)
xe_vm_kill(vops->vm, false);
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 6/6] drm/xe: Use GT TLB invalidation jobs in PT layer
2025-06-17 15:37 ` [PATCH 6/6] drm/xe: Use GT TLB invalidation jobs in PT layer Matthew Brost
@ 2025-06-18 23:51 ` Matthew Brost
0 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-18 23:51 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
On Tue, Jun 17, 2025 at 08:37:30AM -0700, Matthew Brost wrote:
> Rather than open-coding GT TLB invalidations in the PT layer, use GT TLB
> invalidation jobs. The real benefit is that GT TLB invalidation jobs use
> a single dma-fence context, allowing the generated fences to be squashed
> in dma-resv/DRM scheduler.
>
> Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.h | 9 ++
> drivers/gpu/drm/xe/xe_pt.c | 193 +++++++++++++-------------------
> 2 files changed, 88 insertions(+), 114 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
> index e9d83d320f8c..605398ea773e 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.h
> +++ b/drivers/gpu/drm/xe/xe_migrate.h
> @@ -14,6 +14,7 @@ struct ttm_resource;
>
> struct xe_bo;
> struct xe_gt;
> +struct xe_gt_tlb_inval_job;
> struct xe_exec_queue;
> struct xe_migrate;
> struct xe_migrate_pt_update;
> @@ -89,6 +90,14 @@ struct xe_migrate_pt_update {
> struct xe_vma_ops *vops;
> /** @job: The job if a GPU page-table update. NULL otherwise */
> struct xe_sched_job *job;
> + /**
> + * @ijob: The GT TLB invalidation job for primary tile. NULL otherwise
> + */
> + struct xe_gt_tlb_inval_job *ijob;
> + /**
> + * @mjob: The GT TLB invalidation job for media tile. NULL otherwise
> + */
> + struct xe_gt_tlb_inval_job *mjob;
> /** @tile_id: Tile ID of the update */
> u8 tile_id;
> };
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index 971e55fd0061..8113223de61f 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -13,7 +13,7 @@
> #include "xe_drm_client.h"
> #include "xe_exec_queue.h"
> #include "xe_gt.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval_job.h"
> #include "xe_migrate.h"
> #include "xe_pt_types.h"
> #include "xe_pt_walk.h"
> @@ -1261,6 +1261,8 @@ static int op_add_deps(struct xe_vm *vm, struct xe_vma_op *op,
> }
>
> static int xe_pt_vm_dependencies(struct xe_sched_job *job,
> + struct xe_gt_tlb_inval_job *ijob,
> + struct xe_gt_tlb_inval_job *mjob,
> struct xe_vm *vm,
> struct xe_vma_ops *vops,
> struct xe_vm_pgtable_update_ops *pt_update_ops,
> @@ -1328,6 +1330,20 @@ static int xe_pt_vm_dependencies(struct xe_sched_job *job,
> for (i = 0; job && !err && i < vops->num_syncs; i++)
> err = xe_sync_entry_add_deps(&vops->syncs[i], job);
>
> + if (job) {
> + if (ijob) {
> + err = xe_gt_tlb_inval_job_alloc_dep(ijob);
> + if (err)
> + return err;
> + }
> +
> + if (mjob) {
> + err = xe_gt_tlb_inval_job_alloc_dep(mjob);
> + if (err)
> + return err;
> + }
> + }
> +
> return err;
> }
>
> @@ -1339,7 +1355,8 @@ static int xe_pt_pre_commit(struct xe_migrate_pt_update *pt_update)
> struct xe_vm_pgtable_update_ops *pt_update_ops =
> &vops->pt_update_ops[pt_update->tile_id];
>
> - return xe_pt_vm_dependencies(pt_update->job, vm, pt_update->vops,
> + return xe_pt_vm_dependencies(pt_update->job, pt_update->ijob,
> + pt_update->mjob, vm, pt_update->vops,
> pt_update_ops, rftree);
> }
>
> @@ -1509,75 +1526,6 @@ static int xe_pt_svm_pre_commit(struct xe_migrate_pt_update *pt_update)
> }
> #endif
>
> -struct invalidation_fence {
> - struct xe_gt_tlb_invalidation_fence base;
> - struct xe_gt *gt;
> - struct dma_fence *fence;
> - struct dma_fence_cb cb;
> - struct work_struct work;
> - u64 start;
> - u64 end;
> - u32 asid;
> -};
> -
> -static void invalidation_fence_cb(struct dma_fence *fence,
> - struct dma_fence_cb *cb)
> -{
> - struct invalidation_fence *ifence =
> - container_of(cb, struct invalidation_fence, cb);
> - struct xe_device *xe = gt_to_xe(ifence->gt);
> -
> - trace_xe_gt_tlb_invalidation_fence_cb(xe, &ifence->base);
> - if (!ifence->fence->error) {
> - queue_work(system_wq, &ifence->work);
> - } else {
> - ifence->base.base.error = ifence->fence->error;
> - xe_gt_tlb_invalidation_fence_signal(&ifence->base);
> - }
> - dma_fence_put(ifence->fence);
> -}
> -
> -static void invalidation_fence_work_func(struct work_struct *w)
> -{
> - struct invalidation_fence *ifence =
> - container_of(w, struct invalidation_fence, work);
> - struct xe_device *xe = gt_to_xe(ifence->gt);
> -
> - trace_xe_gt_tlb_invalidation_fence_work_func(xe, &ifence->base);
> - xe_gt_tlb_invalidation_range(ifence->gt, &ifence->base, ifence->start,
> - ifence->end, ifence->asid);
> -}
> -
> -static void invalidation_fence_init(struct xe_gt *gt,
> - struct invalidation_fence *ifence,
> - struct dma_fence *fence,
> - u64 start, u64 end, u32 asid)
> -{
> - int ret;
> -
> - trace_xe_gt_tlb_invalidation_fence_create(gt_to_xe(gt), &ifence->base);
> -
> - xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
> -
> - ifence->fence = fence;
> - ifence->gt = gt;
> - ifence->start = start;
> - ifence->end = end;
> - ifence->asid = asid;
> -
> - INIT_WORK(&ifence->work, invalidation_fence_work_func);
> - ret = dma_fence_add_callback(fence, &ifence->cb, invalidation_fence_cb);
> - if (ret == -ENOENT) {
> - dma_fence_put(ifence->fence); /* Usually dropped in CB */
> - invalidation_fence_work_func(&ifence->work);
> - } else if (ret) {
> - dma_fence_put(&ifence->base.base); /* Caller ref */
> - dma_fence_put(&ifence->base.base); /* Creation ref */
> - }
> -
> - xe_gt_assert(gt, !ret || ret == -ENOENT);
> -}
> -
> struct xe_pt_stage_unbind_walk {
> /** @base: The pagewalk base-class. */
> struct xe_pt_walk base;
> @@ -2378,8 +2326,8 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> struct xe_vm *vm = vops->vm;
> struct xe_vm_pgtable_update_ops *pt_update_ops =
> &vops->pt_update_ops[tile->id];
> - struct dma_fence *fence;
> - struct invalidation_fence *ifence = NULL, *mfence = NULL;
> + struct dma_fence *fence, *ifence, *mfence;
> + struct xe_gt_tlb_inval_job *ijob = NULL, *mjob = NULL;
> struct dma_fence **fences = NULL;
> struct dma_fence_array *cf = NULL;
> struct xe_range_fence *rfence;
> @@ -2411,34 +2359,47 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> #endif
>
> if (pt_update_ops->needs_invalidation) {
> - ifence = kzalloc(sizeof(*ifence), GFP_KERNEL);
> - if (!ifence) {
> - err = -ENOMEM;
> + ijob = xe_gt_tlb_inval_job_create(pt_update_ops->q,
> + tile->primary_gt,
> + pt_update_ops->start,
> + pt_update_ops->last,
> + vm->usm.asid);
> +
> + if (IS_ERR(ijob)) {
> + err = PTR_ERR(ijob);;
> goto kill_vm_tile1;
> }
> +
> if (tile->media_gt) {
> - mfence = kzalloc(sizeof(*ifence), GFP_KERNEL);
> - if (!mfence) {
> - err = -ENOMEM;
> - goto free_ifence;
> + mjob = xe_gt_tlb_inval_job_create(pt_update_ops->q,
> + tile->media_gt,
> + pt_update_ops->start,
> + pt_update_ops->last,
> + vm->usm.asid);
> + if (IS_ERR(mjob)) {
> + err = PTR_ERR(mjob);
> + goto free_ijob;
> }
> fences = kmalloc_array(2, sizeof(*fences), GFP_KERNEL);
> if (!fences) {
> err = -ENOMEM;
> - goto free_ifence;
> + goto free_ijob;
> }
> cf = dma_fence_array_alloc(2);
> if (!cf) {
> err = -ENOMEM;
> - goto free_ifence;
> + goto free_ijob;
> }
> }
> +
> + update.ijob = ijob;
> + update.mjob = mjob;
> }
>
> rfence = kzalloc(sizeof(*rfence), GFP_KERNEL);
> if (!rfence) {
> err = -ENOMEM;
> - goto free_ifence;
> + goto free_ijob;
> }
>
> fence = xe_migrate_update_pgtables(tile->migrate, &update);
> @@ -2448,6 +2409,30 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> }
>
> /* Point of no return - VM killed if failure after this */
The below if statement is in the wrong spot, should be after range fence
install like in the original code.
Matt
> +
> + if (ijob) {
> + struct dma_fence *__fence;
> +
> + ifence = xe_gt_tlb_inval_job_push(ijob, tile->migrate, fence);
> + __fence = ifence;
> +
> + if (mjob) {
> + fences[0] = ifence;
> + mfence = xe_gt_tlb_inval_job_push(mjob, tile->migrate,
> + fence);
> + fences[1] = mfence;
> +
> + dma_fence_array_init(cf, 2, fences,
> + vm->composite_fence_ctx,
> + vm->composite_fence_seqno++,
> + false);
> + __fence = &cf->base;
> + }
> +
> + dma_fence_put(fence);
> + fence = __fence;
> + }
> +
> for (i = 0; i < pt_update_ops->current_op; ++i) {
> struct xe_vm_pgtable_update_op *pt_op = &pt_update_ops->ops[i];
>
> @@ -2462,30 +2447,7 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> pt_update_ops->last, fence))
> dma_fence_wait(fence, false);
>
> - /* tlb invalidation must be done before signaling rebind */
> - if (ifence) {
> - if (mfence)
> - dma_fence_get(fence);
> - invalidation_fence_init(tile->primary_gt, ifence, fence,
> - pt_update_ops->start,
> - pt_update_ops->last, vm->usm.asid);
> - if (mfence) {
> - invalidation_fence_init(tile->media_gt, mfence, fence,
> - pt_update_ops->start,
> - pt_update_ops->last, vm->usm.asid);
> - fences[0] = &ifence->base.base;
> - fences[1] = &mfence->base.base;
> - dma_fence_array_init(cf, 2, fences,
> - vm->composite_fence_ctx,
> - vm->composite_fence_seqno++,
> - false);
> - fence = &cf->base;
> - } else {
> - fence = &ifence->base.base;
> - }
> - }
> -
> - if (!mfence) {
> + if (!mjob) {
> dma_resv_add_fence(xe_vm_resv(vm), fence,
> pt_update_ops->wait_vm_bookkeep ?
> DMA_RESV_USAGE_KERNEL :
> @@ -2494,19 +2456,19 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> list_for_each_entry(op, &vops->list, link)
> op_commit(vops->vm, tile, pt_update_ops, op, fence, NULL);
> } else {
> - dma_resv_add_fence(xe_vm_resv(vm), &ifence->base.base,
> + dma_resv_add_fence(xe_vm_resv(vm), ifence,
> pt_update_ops->wait_vm_bookkeep ?
> DMA_RESV_USAGE_KERNEL :
> DMA_RESV_USAGE_BOOKKEEP);
>
> - dma_resv_add_fence(xe_vm_resv(vm), &mfence->base.base,
> + dma_resv_add_fence(xe_vm_resv(vm), mfence,
> pt_update_ops->wait_vm_bookkeep ?
> DMA_RESV_USAGE_KERNEL :
> DMA_RESV_USAGE_BOOKKEEP);
>
> list_for_each_entry(op, &vops->list, link)
> - op_commit(vops->vm, tile, pt_update_ops, op,
> - &ifence->base.base, &mfence->base.base);
> + op_commit(vops->vm, tile, pt_update_ops, op, ifence,
> + mfence);
> }
>
> if (pt_update_ops->needs_svm_lock)
> @@ -2514,15 +2476,18 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
> if (pt_update_ops->needs_userptr_lock)
> up_read(&vm->userptr.notifier_lock);
>
> + xe_gt_tlb_inval_job_put(mjob);
> + xe_gt_tlb_inval_job_put(ijob);
> +
> return fence;
>
> free_rfence:
> kfree(rfence);
> -free_ifence:
> +free_ijob:
> kfree(cf);
> kfree(fences);
> - kfree(mfence);
> - kfree(ifence);
> + xe_gt_tlb_inval_job_put(mjob);
> + xe_gt_tlb_inval_job_put(ijob);
> kill_vm_tile1:
> if (err != -EAGAIN && err != -ENODATA && tile->id)
> xe_vm_kill(vops->vm, false);
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ CI.checkpatch: warning for Use DRM scheduler for delayed GT TLB invalidations
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (5 preceding siblings ...)
2025-06-17 15:37 ` [PATCH 6/6] drm/xe: Use GT TLB invalidation jobs in PT layer Matthew Brost
@ 2025-06-17 16:39 ` Patchwork
2025-06-17 16:40 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-06-17 16:39 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
== Series Details ==
Series: Use DRM scheduler for delayed GT TLB invalidations
URL : https://patchwork.freedesktop.org/series/150402/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f8ff75ae1d2127635239b134695774ed4045d05b
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 385d724a23203d0dbddb680258a58b90f3d0581c
Author: Matthew Brost <matthew.brost@intel.com>
Date: Tue Jun 17 08:37:30 2025 -0700
drm/xe: Use GT TLB invalidation jobs in PT layer
Rather than open-coding GT TLB invalidations in the PT layer, use GT TLB
invalidation jobs. The real benefit is that GT TLB invalidation jobs use
a single dma-fence context, allowing the generated fences to be squashed
in dma-resv/DRM scheduler.
Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
+ /mt/dim checkpatch cec6aa5dda0bef82c8f9ba6422d982712a0f8c7d drm-intel
a232170258a1 drm/xe: Explicitly mark migration queues with flag
57f99acd2529 drm/xe: Add generic dependecy jobs / scheduler
-:30: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#30:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 202 lines checked
aa8e8d562bd1 drm/xe: Add dependency scheduler for GT TLB invalidations to bind queues
f7fe8e4b6b99 drm/xe: Add xe_migrate_job_lock/unlock helpers
-:35: WARNING:BLOCK_COMMENT_STYLE: Block comments use * on subsequent lines
#35: FILE: drivers/gpu/drm/xe/xe_migrate.c:1934:
+ xe_vm_assert_held(q->vm); /* User queues VM's should be
+ locked */
-:35: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line
#35: FILE: drivers/gpu/drm/xe/xe_migrate.c:1934:
+ locked */
-:54: WARNING:BLOCK_COMMENT_STYLE: Block comments use * on subsequent lines
#54: FILE: drivers/gpu/drm/xe/xe_migrate.c:1953:
+ xe_vm_assert_held(q->vm); /* User queues VM's should be
+ locked */
-:54: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line
#54: FILE: drivers/gpu/drm/xe/xe_migrate.c:1953:
+ locked */
total: 0 errors, 4 warnings, 0 checks, 52 lines checked
5be64a787cd3 drm/xe: Add GT TLB invalidation jobs
-:28: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
-:150: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kmalloc(sizeof(*job->fence)...) over kmalloc(sizeof(struct xe_gt_tlb_invalidation_fence)...)
#150: FILE: drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c:118:
+ job->fence = kmalloc(sizeof(struct xe_gt_tlb_invalidation_fence),
-:192: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#192: FILE: drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c:160:
+}
+/**
-:205: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!xa_load"
#205: FILE: drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c:173:
+ xa_load(&job->dep.drm.dependencies, 0) == NULL);
-:245: WARNING:BLOCK_COMMENT_STYLE: Block comments use * on subsequent lines
#245: FILE: drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c:213:
+ dma_fence_get(fence); /* ref released once dependency
+ processed by scheduler */
-:245: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line
#245: FILE: drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c:213:
+ processed by scheduler */
total: 0 errors, 3 warnings, 3 checks, 315 lines checked
385d724a2320 drm/xe: Use GT TLB invalidation jobs in PT layer
-:198: WARNING:ONE_SEMICOLON: Statements terminations use 1 semicolon
#198: FILE: drivers/gpu/drm/xe/xe_pt.c:2369:
+ err = PTR_ERR(ijob);;
total: 0 errors, 1 warnings, 0 checks, 313 lines checked
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ CI.KUnit: success for Use DRM scheduler for delayed GT TLB invalidations
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (6 preceding siblings ...)
2025-06-17 16:39 ` ✗ CI.checkpatch: warning for Use DRM scheduler for delayed GT TLB invalidations Patchwork
@ 2025-06-17 16:40 ` Patchwork
2025-06-17 17:30 ` [PATCH 0/6] " Matthew Brost
` (2 subsequent siblings)
10 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-06-17 16:40 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
== Series Details ==
Series: Use DRM scheduler for delayed GT TLB invalidations
URL : https://patchwork.freedesktop.org/series/150402/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:39:47] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:39:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:40:18] Starting KUnit Kernel (1/1)...
[16:40:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:40:19] ================== guc_buf (11 subtests) ===================
[16:40:19] [PASSED] test_smallest
[16:40:19] [PASSED] test_largest
[16:40:19] [PASSED] test_granular
[16:40:19] [PASSED] test_unique
[16:40:19] [PASSED] test_overlap
[16:40:19] [PASSED] test_reusable
[16:40:19] [PASSED] test_too_big
[16:40:19] [PASSED] test_flush
[16:40:19] [PASSED] test_lookup
[16:40:19] [PASSED] test_data
[16:40:19] [PASSED] test_class
[16:40:19] ===================== [PASSED] guc_buf =====================
[16:40:19] =================== guc_dbm (7 subtests) ===================
[16:40:19] [PASSED] test_empty
[16:40:19] [PASSED] test_default
[16:40:19] ======================== test_size ========================
[16:40:19] [PASSED] 4
[16:40:19] [PASSED] 8
[16:40:19] [PASSED] 32
[16:40:19] [PASSED] 256
[16:40:19] ==================== [PASSED] test_size ====================
[16:40:19] ======================= test_reuse ========================
[16:40:19] [PASSED] 4
[16:40:19] [PASSED] 8
[16:40:19] [PASSED] 32
[16:40:19] [PASSED] 256
[16:40:19] =================== [PASSED] test_reuse ====================
[16:40:19] =================== test_range_overlap ====================
[16:40:19] [PASSED] 4
[16:40:19] [PASSED] 8
[16:40:19] [PASSED] 32
[16:40:19] [PASSED] 256
[16:40:19] =============== [PASSED] test_range_overlap ================
[16:40:19] =================== test_range_compact ====================
[16:40:19] [PASSED] 4
[16:40:19] [PASSED] 8
[16:40:19] [PASSED] 32
[16:40:19] [PASSED] 256
[16:40:19] =============== [PASSED] test_range_compact ================
[16:40:19] ==================== test_range_spare =====================
[16:40:19] [PASSED] 4
[16:40:19] [PASSED] 8
[16:40:19] [PASSED] 32
[16:40:19] [PASSED] 256
[16:40:19] ================ [PASSED] test_range_spare =================
[16:40:19] ===================== [PASSED] guc_dbm =====================
[16:40:19] =================== guc_idm (6 subtests) ===================
[16:40:19] [PASSED] bad_init
[16:40:19] [PASSED] no_init
[16:40:19] [PASSED] init_fini
[16:40:19] [PASSED] check_used
[16:40:19] [PASSED] check_quota
[16:40:19] [PASSED] check_all
[16:40:19] ===================== [PASSED] guc_idm =====================
[16:40:19] ================== no_relay (3 subtests) ===================
[16:40:19] [PASSED] xe_drops_guc2pf_if_not_ready
[16:40:19] [PASSED] xe_drops_guc2vf_if_not_ready
[16:40:19] [PASSED] xe_rejects_send_if_not_ready
[16:40:19] ==================== [PASSED] no_relay =====================
[16:40:19] ================== pf_relay (14 subtests) ==================
[16:40:19] [PASSED] pf_rejects_guc2pf_too_short
[16:40:19] [PASSED] pf_rejects_guc2pf_too_long
[16:40:19] [PASSED] pf_rejects_guc2pf_no_payload
[16:40:19] [PASSED] pf_fails_no_payload
[16:40:19] [PASSED] pf_fails_bad_origin
[16:40:19] [PASSED] pf_fails_bad_type
[16:40:19] [PASSED] pf_txn_reports_error
[16:40:19] [PASSED] pf_txn_sends_pf2guc
[16:40:19] [PASSED] pf_sends_pf2guc
[16:40:19] [SKIPPED] pf_loopback_nop
[16:40:19] [SKIPPED] pf_loopback_echo
[16:40:19] [SKIPPED] pf_loopback_fail
[16:40:19] [SKIPPED] pf_loopback_busy
[16:40:19] [SKIPPED] pf_loopback_retry
[16:40:19] ==================== [PASSED] pf_relay =====================
[16:40:19] ================== vf_relay (3 subtests) ===================
[16:40:19] [PASSED] vf_rejects_guc2vf_too_short
[16:40:19] [PASSED] vf_rejects_guc2vf_too_long
[16:40:19] [PASSED] vf_rejects_guc2vf_no_payload
[16:40:19] ==================== [PASSED] vf_relay =====================
[16:40:19] ================= pf_service (11 subtests) =================
[16:40:19] [PASSED] pf_negotiate_any
[16:40:19] [PASSED] pf_negotiate_base_match
[16:40:19] [PASSED] pf_negotiate_base_newer
[16:40:19] [PASSED] pf_negotiate_base_next
[16:40:19] [SKIPPED] pf_negotiate_base_older
[16:40:19] [PASSED] pf_negotiate_base_prev
[16:40:19] [PASSED] pf_negotiate_latest_match
[16:40:19] [PASSED] pf_negotiate_latest_newer
[16:40:19] [PASSED] pf_negotiate_latest_next
[16:40:19] [SKIPPED] pf_negotiate_latest_older
[16:40:19] [SKIPPED] pf_negotiate_latest_prev
[16:40:19] =================== [PASSED] pf_service ====================
[16:40:19] ===================== lmtt (1 subtest) =====================
[16:40:19] ======================== test_ops =========================
[16:40:19] [PASSED] 2-level
[16:40:19] [PASSED] multi-level
[16:40:19] ==================== [PASSED] test_ops =====================
[16:40:19] ====================== [PASSED] lmtt =======================
[16:40:19] =================== xe_mocs (2 subtests) ===================
[16:40:19] ================ xe_live_mocs_kernel_kunit ================
[16:40:19] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:40:19] ================ xe_live_mocs_reset_kunit =================
[16:40:19] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:40:19] ==================== [SKIPPED] xe_mocs =====================
[16:40:19] ================= xe_migrate (2 subtests) ==================
[16:40:19] ================= xe_migrate_sanity_kunit =================
[16:40:19] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:40:19] ================== xe_validate_ccs_kunit ==================
[16:40:19] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:40:19] =================== [SKIPPED] xe_migrate ===================
[16:40:19] ================== xe_dma_buf (1 subtest) ==================
[16:40:19] ==================== xe_dma_buf_kunit =====================
[16:40:19] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:40:19] =================== [SKIPPED] xe_dma_buf ===================
[16:40:19] ================= xe_bo_shrink (1 subtest) =================
[16:40:19] =================== xe_bo_shrink_kunit ====================
[16:40:19] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:40:19] ================== [SKIPPED] xe_bo_shrink ==================
[16:40:19] ==================== xe_bo (2 subtests) ====================
[16:40:19] ================== xe_ccs_migrate_kunit ===================
[16:40:19] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:40:19] ==================== xe_bo_evict_kunit ====================
[16:40:19] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:40:19] ===================== [SKIPPED] xe_bo ======================
[16:40:19] ==================== args (11 subtests) ====================
[16:40:19] [PASSED] count_args_test
[16:40:19] [PASSED] call_args_example
[16:40:19] [PASSED] call_args_test
[16:40:19] [PASSED] drop_first_arg_example
[16:40:19] [PASSED] drop_first_arg_test
[16:40:19] [PASSED] first_arg_example
[16:40:19] [PASSED] first_arg_test
[16:40:19] [PASSED] last_arg_example
[16:40:19] [PASSED] last_arg_test
[16:40:19] [PASSED] pick_arg_example
[16:40:19] [PASSED] sep_comma_example
[16:40:19] ====================== [PASSED] args =======================
[16:40:19] =================== xe_pci (2 subtests) ====================
[16:40:19] ==================== check_graphics_ip ====================
[16:40:19] [PASSED] 12.70 Xe_LPG
[16:40:19] [PASSED] 12.71 Xe_LPG
[16:40:19] [PASSED] 12.74 Xe_LPG+
[16:40:19] [PASSED] 20.01 Xe2_HPG
[16:40:19] [PASSED] 20.02 Xe2_HPG
[16:40:19] [PASSED] 20.04 Xe2_LPG
[16:40:19] [PASSED] 30.00 Xe3_LPG
[16:40:19] [PASSED] 30.01 Xe3_LPG
[16:40:19] ================ [PASSED] check_graphics_ip ================
[16:40:19] ===================== check_media_ip ======================
[16:40:19] [PASSED] 13.00 Xe_LPM+
[16:40:19] [PASSED] 13.01 Xe2_HPM
[16:40:19] [PASSED] 20.00 Xe2_LPM
[16:40:19] [PASSED] 30.00 Xe3_LPM
[16:40:19] ================= [PASSED] check_media_ip ==================
stty: 'standard input': Inappropriate ioctl for device
[16:40:19] ===================== [PASSED] xe_pci ======================
[16:40:19] =================== xe_rtp (2 subtests) ====================
[16:40:19] =============== xe_rtp_process_to_sr_tests ================
[16:40:19] [PASSED] coalesce-same-reg
[16:40:19] [PASSED] no-match-no-add
[16:40:19] [PASSED] match-or
[16:40:19] [PASSED] match-or-xfail
[16:40:19] [PASSED] no-match-no-add-multiple-rules
[16:40:19] [PASSED] two-regs-two-entries
[16:40:19] [PASSED] clr-one-set-other
[16:40:19] [PASSED] set-field
[16:40:19] [PASSED] conflict-duplicate
[16:40:19] [PASSED] conflict-not-disjoint
[16:40:19] [PASSED] conflict-reg-type
[16:40:19] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:40:19] ================== xe_rtp_process_tests ===================
[16:40:19] [PASSED] active1
[16:40:19] [PASSED] active2
[16:40:19] [PASSED] active-inactive
[16:40:19] [PASSED] inactive-active
[16:40:19] [PASSED] inactive-1st_or_active-inactive
[16:40:19] [PASSED] inactive-2nd_or_active-inactive
[16:40:19] [PASSED] inactive-last_or_active-inactive
[16:40:19] [PASSED] inactive-no_or_active-inactive
[16:40:19] ============== [PASSED] xe_rtp_process_tests ===============
[16:40:19] ===================== [PASSED] xe_rtp ======================
[16:40:19] ==================== xe_wa (1 subtest) =====================
[16:40:19] ======================== xe_wa_gt =========================
[16:40:19] [PASSED] TIGERLAKE (B0)
[16:40:19] [PASSED] DG1 (A0)
[16:40:19] [PASSED] DG1 (B0)
[16:40:19] [PASSED] ALDERLAKE_S (A0)
[16:40:19] [PASSED] ALDERLAKE_S (B0)
[16:40:19] [PASSED] ALDERLAKE_S (C0)
[16:40:19] [PASSED] ALDERLAKE_S (D0)
[16:40:19] [PASSED] ALDERLAKE_P (A0)
[16:40:19] [PASSED] ALDERLAKE_P (B0)
[16:40:19] [PASSED] ALDERLAKE_P (C0)
[16:40:19] [PASSED] ALDERLAKE_S_RPLS (D0)
[16:40:19] [PASSED] ALDERLAKE_P_RPLU (E0)
[16:40:19] [PASSED] DG2_G10 (C0)
[16:40:19] [PASSED] DG2_G11 (B1)
[16:40:19] [PASSED] DG2_G12 (A1)
[16:40:19] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:19] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:19] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:19] [PASSED] LUNARLAKE (g:A0, m:A0)
[16:40:19] [PASSED] LUNARLAKE (g:B0, m:A0)
[16:40:19] [PASSED] BATTLEMAGE (g:A0, m:A1)
[16:40:19] ==================== [PASSED] xe_wa_gt =====================
[16:40:19] ====================== [PASSED] xe_wa ======================
[16:40:19] ============================================================
[16:40:19] Testing complete. Ran 143 tests: passed: 127, skipped: 16
[16:40:19] Elapsed time: 31.411s total, 4.207s configuring, 26.886s building, 0.292s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:40:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:40:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:40:42] Starting KUnit Kernel (1/1)...
[16:40:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:40:42] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:40:42] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:40:42] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:40:42] =========== drm_validate_clone_mode (2 subtests) ===========
[16:40:42] ============== drm_test_check_in_clone_mode ===============
[16:40:42] [PASSED] in_clone_mode
[16:40:42] [PASSED] not_in_clone_mode
[16:40:42] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:40:42] =============== drm_test_check_valid_clones ===============
[16:40:42] [PASSED] not_in_clone_mode
[16:40:42] [PASSED] valid_clone
[16:40:42] [PASSED] invalid_clone
[16:40:42] =========== [PASSED] drm_test_check_valid_clones ===========
[16:40:42] ============= [PASSED] drm_validate_clone_mode =============
[16:40:42] ============= drm_validate_modeset (1 subtest) =============
[16:40:42] [PASSED] drm_test_check_connector_changed_modeset
[16:40:42] ============== [PASSED] drm_validate_modeset ===============
[16:40:42] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:40:42] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:40:42] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:40:42] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:40:42] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:40:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:40:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:40:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:40:42] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:40:42] ============== drm_bridge_alloc (2 subtests) ===============
[16:40:42] [PASSED] drm_test_drm_bridge_alloc_basic
[16:40:42] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:40:42] ================ [PASSED] drm_bridge_alloc =================
[16:40:42] ================== drm_buddy (7 subtests) ==================
[16:40:42] [PASSED] drm_test_buddy_alloc_limit
[16:40:42] [PASSED] drm_test_buddy_alloc_optimistic
[16:40:42] [PASSED] drm_test_buddy_alloc_pessimistic
[16:40:42] [PASSED] drm_test_buddy_alloc_pathological
[16:40:42] [PASSED] drm_test_buddy_alloc_contiguous
[16:40:42] [PASSED] drm_test_buddy_alloc_clear
[16:40:42] [PASSED] drm_test_buddy_alloc_range_bias
[16:40:42] ==================== [PASSED] drm_buddy ====================
[16:40:42] ============= drm_cmdline_parser (40 subtests) =============
[16:40:42] [PASSED] drm_test_cmdline_force_d_only
[16:40:42] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:40:42] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:40:42] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:40:42] [PASSED] drm_test_cmdline_force_e_only
[16:40:42] [PASSED] drm_test_cmdline_res
[16:40:42] [PASSED] drm_test_cmdline_res_vesa
[16:40:42] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:40:42] [PASSED] drm_test_cmdline_res_rblank
[16:40:42] [PASSED] drm_test_cmdline_res_bpp
[16:40:42] [PASSED] drm_test_cmdline_res_refresh
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:40:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:40:42] [PASSED] drm_test_cmdline_res_margins_force_on
[16:40:42] [PASSED] drm_test_cmdline_res_vesa_margins
[16:40:42] [PASSED] drm_test_cmdline_name
[16:40:42] [PASSED] drm_test_cmdline_name_bpp
[16:40:42] [PASSED] drm_test_cmdline_name_option
[16:40:42] [PASSED] drm_test_cmdline_name_bpp_option
[16:40:42] [PASSED] drm_test_cmdline_rotate_0
[16:40:42] [PASSED] drm_test_cmdline_rotate_90
[16:40:42] [PASSED] drm_test_cmdline_rotate_180
[16:40:42] [PASSED] drm_test_cmdline_rotate_270
[16:40:42] [PASSED] drm_test_cmdline_hmirror
[16:40:42] [PASSED] drm_test_cmdline_vmirror
[16:40:42] [PASSED] drm_test_cmdline_margin_options
[16:40:42] [PASSED] drm_test_cmdline_multiple_options
[16:40:42] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:40:42] [PASSED] drm_test_cmdline_extra_and_option
[16:40:42] [PASSED] drm_test_cmdline_freestanding_options
[16:40:42] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:40:42] [PASSED] drm_test_cmdline_panel_orientation
[16:40:42] ================ drm_test_cmdline_invalid =================
[16:40:42] [PASSED] margin_only
[16:40:42] [PASSED] interlace_only
[16:40:42] [PASSED] res_missing_x
[16:40:42] [PASSED] res_missing_y
[16:40:42] [PASSED] res_bad_y
[16:40:42] [PASSED] res_missing_y_bpp
[16:40:42] [PASSED] res_bad_bpp
[16:40:42] [PASSED] res_bad_refresh
[16:40:42] [PASSED] res_bpp_refresh_force_on_off
[16:40:42] [PASSED] res_invalid_mode
[16:40:42] [PASSED] res_bpp_wrong_place_mode
[16:40:42] [PASSED] name_bpp_refresh
[16:40:42] [PASSED] name_refresh
[16:40:42] [PASSED] name_refresh_wrong_mode
[16:40:42] [PASSED] name_refresh_invalid_mode
[16:40:42] [PASSED] rotate_multiple
[16:40:42] [PASSED] rotate_invalid_val
[16:40:42] [PASSED] rotate_truncated
[16:40:42] [PASSED] invalid_option
[16:40:42] [PASSED] invalid_tv_option
[16:40:42] [PASSED] truncated_tv_option
[16:40:42] ============ [PASSED] drm_test_cmdline_invalid =============
[16:40:42] =============== drm_test_cmdline_tv_options ===============
[16:40:42] [PASSED] NTSC
[16:40:42] [PASSED] NTSC_443
[16:40:42] [PASSED] NTSC_J
[16:40:42] [PASSED] PAL
[16:40:42] [PASSED] PAL_M
[16:40:42] [PASSED] PAL_N
[16:40:42] [PASSED] SECAM
[16:40:42] [PASSED] MONO_525
[16:40:42] [PASSED] MONO_625
[16:40:42] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:40:42] =============== [PASSED] drm_cmdline_parser ================
[16:40:42] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:40:42] [PASSED] drm_test_connector_hdmi_init_valid
[16:40:42] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:40:42] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:40:42] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:40:42] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:40:42] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:40:42] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:40:42] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:40:42] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:40:42] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:40:42] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:40:42] [PASSED] supported_formats=0x3 yuv420_allowed=1
[16:40:42] [PASSED] supported_formats=0x3 yuv420_allowed=0
[16:40:42] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:40:42] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:40:42] [PASSED] drm_test_connector_hdmi_init_null_product
[16:40:42] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:40:42] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:40:42] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:40:42] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:40:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:40:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:40:42] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:40:42] ========= drm_test_connector_hdmi_init_type_valid =========
[16:40:42] [PASSED] HDMI-A
[16:40:42] [PASSED] HDMI-B
[16:40:42] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:40:42] ======== drm_test_connector_hdmi_init_type_invalid ========
[16:40:42] [PASSED] Unknown
[16:40:42] [PASSED] VGA
[16:40:42] [PASSED] DVI-I
[16:40:42] [PASSED] DVI-D
[16:40:42] [PASSED] DVI-A
[16:40:42] [PASSED] Composite
[16:40:42] [PASSED] SVIDEO
[16:40:42] [PASSED] LVDS
[16:40:42] [PASSED] Component
[16:40:42] [PASSED] DIN
[16:40:42] [PASSED] DP
[16:40:42] [PASSED] TV
[16:40:42] [PASSED] eDP
[16:40:42] [PASSED] Virtual
[16:40:42] [PASSED] DSI
[16:40:42] [PASSED] DPI
[16:40:42] [PASSED] Writeback
[16:40:42] [PASSED] SPI
[16:40:42] [PASSED] USB
[16:40:42] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:40:42] ============ [PASSED] drmm_connector_hdmi_init =============
[16:40:42] ============= drmm_connector_init (3 subtests) =============
[16:40:42] [PASSED] drm_test_drmm_connector_init
[16:40:42] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:40:42] ========= drm_test_drmm_connector_init_type_valid =========
[16:40:42] [PASSED] Unknown
[16:40:42] [PASSED] VGA
[16:40:42] [PASSED] DVI-I
[16:40:42] [PASSED] DVI-D
[16:40:42] [PASSED] DVI-A
[16:40:42] [PASSED] Composite
[16:40:42] [PASSED] SVIDEO
[16:40:42] [PASSED] LVDS
[16:40:42] [PASSED] Component
[16:40:42] [PASSED] DIN
[16:40:42] [PASSED] DP
[16:40:42] [PASSED] HDMI-A
[16:40:42] [PASSED] HDMI-B
[16:40:42] [PASSED] TV
[16:40:42] [PASSED] eDP
[16:40:42] [PASSED] Virtual
[16:40:42] [PASSED] DSI
[16:40:42] [PASSED] DPI
[16:40:42] [PASSED] Writeback
[16:40:42] [PASSED] SPI
[16:40:42] [PASSED] USB
[16:40:42] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:40:42] =============== [PASSED] drmm_connector_init ===============
[16:40:42] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_init
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:40:42] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[16:40:42] [PASSED] Unknown
[16:40:42] [PASSED] VGA
[16:40:42] [PASSED] DVI-I
[16:40:42] [PASSED] DVI-D
[16:40:42] [PASSED] DVI-A
[16:40:42] [PASSED] Composite
[16:40:42] [PASSED] SVIDEO
[16:40:42] [PASSED] LVDS
[16:40:42] [PASSED] Component
[16:40:42] [PASSED] DIN
[16:40:42] [PASSED] DP
[16:40:42] [PASSED] HDMI-A
[16:40:42] [PASSED] HDMI-B
[16:40:42] [PASSED] TV
[16:40:42] [PASSED] eDP
[16:40:42] [PASSED] Virtual
[16:40:42] [PASSED] DSI
[16:40:42] [PASSED] DPI
[16:40:42] [PASSED] Writeback
[16:40:42] [PASSED] SPI
[16:40:42] [PASSED] USB
[16:40:42] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:40:42] ======== drm_test_drm_connector_dynamic_init_name =========
[16:40:42] [PASSED] Unknown
[16:40:42] [PASSED] VGA
[16:40:42] [PASSED] DVI-I
[16:40:42] [PASSED] DVI-D
[16:40:42] [PASSED] DVI-A
[16:40:42] [PASSED] Composite
[16:40:42] [PASSED] SVIDEO
[16:40:42] [PASSED] LVDS
[16:40:42] [PASSED] Component
[16:40:42] [PASSED] DIN
[16:40:42] [PASSED] DP
[16:40:42] [PASSED] HDMI-A
[16:40:42] [PASSED] HDMI-B
[16:40:42] [PASSED] TV
[16:40:42] [PASSED] eDP
[16:40:42] [PASSED] Virtual
[16:40:42] [PASSED] DSI
[16:40:42] [PASSED] DPI
[16:40:42] [PASSED] Writeback
[16:40:42] [PASSED] SPI
[16:40:42] [PASSED] USB
[16:40:42] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:40:42] =========== [PASSED] drm_connector_dynamic_init ============
[16:40:42] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:40:42] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:40:42] ======= drm_connector_dynamic_register (7 subtests) ========
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:40:42] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:40:42] ========= [PASSED] drm_connector_dynamic_register ==========
[16:40:42] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:40:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:40:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:40:42] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:40:42] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:40:42] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:40:42] [PASSED] NTSC
[16:40:42] [PASSED] NTSC-443
[16:40:42] [PASSED] NTSC-J
[16:40:42] [PASSED] PAL
[16:40:42] [PASSED] PAL-M
[16:40:42] [PASSED] PAL-N
[16:40:42] [PASSED] SECAM
[16:40:42] [PASSED] Mono
[16:40:42] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:40:42] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:40:42] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:40:42] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:40:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:40:42] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[16:40:42] [PASSED] VIC 96
[16:40:42] [PASSED] VIC 97
[16:40:42] [PASSED] VIC 101
[16:40:42] [PASSED] VIC 102
[16:40:42] [PASSED] VIC 106
[16:40:42] [PASSED] VIC 107
[16:40:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:40:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:40:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:40:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:40:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:40:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:40:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:40:42] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:40:42] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[16:40:42] [PASSED] Automatic
[16:40:42] [PASSED] Full
[16:40:42] [PASSED] Limited 16:235
[16:40:42] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:40:42] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:40:42] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:40:42] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:40:42] === drm_test_drm_hdmi_connector_get_output_format_name ====
[16:40:42] [PASSED] RGB
[16:40:42] [PASSED] YUV 4:2:0
[16:40:42] [PASSED] YUV 4:2:2
[16:40:42] [PASSED] YUV 4:4:4
[16:40:42] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:40:42] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:40:42] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:40:42] ============= drm_damage_helper (21 subtests) ==============
[16:40:42] [PASSED] drm_test_damage_iter_no_damage
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:40:42] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:40:42] [PASSED] drm_test_damage_iter_simple_damage
[16:40:42] [PASSED] drm_test_damage_iter_single_damage
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:40:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:40:42] [PASSED] drm_test_damage_iter_damage
[16:40:42] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:40:42] [PASSED] drm_test_damage_iter_damage_one_outside
[16:40:42] [PASSED] drm_test_damage_iter_damage_src_moved
[16:40:42] [PASSED] drm_test_damage_iter_damage_not_visible
[16:40:42] ================ [PASSED] drm_damage_helper ================
[16:40:42] ============== drm_dp_mst_helper (3 subtests) ==============
[16:40:42] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:40:42] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:40:42] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:40:42] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:40:42] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:40:42] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:40:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:40:42] ============== drm_test_dp_mst_calc_pbn_div ===============
[16:40:42] [PASSED] Link rate 2000000 lane count 4
[16:40:42] [PASSED] Link rate 2000000 lane count 2
[16:40:42] [PASSED] Link rate 2000000 lane count 1
[16:40:42] [PASSED] Link rate 1350000 lane count 4
[16:40:42] [PASSED] Link rate 1350000 lane count 2
[16:40:42] [PASSED] Link rate 1350000 lane count 1
[16:40:42] [PASSED] Link rate 1000000 lane count 4
[16:40:42] [PASSED] Link rate 1000000 lane count 2
[16:40:42] [PASSED] Link rate 1000000 lane count 1
[16:40:42] [PASSED] Link rate 810000 lane count 4
[16:40:42] [PASSED] Link rate 810000 lane count 2
[16:40:42] [PASSED] Link rate 810000 lane count 1
[16:40:42] [PASSED] Link rate 540000 lane count 4
[16:40:42] [PASSED] Link rate 540000 lane count 2
[16:40:42] [PASSED] Link rate 540000 lane count 1
[16:40:42] [PASSED] Link rate 270000 lane count 4
[16:40:42] [PASSED] Link rate 270000 lane count 2
[16:40:42] [PASSED] Link rate 270000 lane count 1
[16:40:42] [PASSED] Link rate 162000 lane count 4
[16:40:42] [PASSED] Link rate 162000 lane count 2
[16:40:42] [PASSED] Link rate 162000 lane count 1
[16:40:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:40:42] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:40:42] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:40:42] [PASSED] DP_POWER_UP_PHY with port number
[16:40:42] [PASSED] DP_POWER_DOWN_PHY with port number
[16:40:42] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:40:42] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:40:42] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:40:42] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:40:42] [PASSED] DP_QUERY_PAYLOAD with port number
[16:40:42] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:40:42] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:40:42] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:40:42] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:40:42] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:40:42] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:40:42] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:40:42] [PASSED] DP_REMOTE_I2C_READ with port number
[16:40:42] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:40:42] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:40:42] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:40:42] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:40:42] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:40:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:40:42] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:40:42] ================ [PASSED] drm_dp_mst_helper ================
[16:40:42] ================== drm_exec (7 subtests) ===================
[16:40:42] [PASSED] sanitycheck
[16:40:42] [PASSED] test_lock
[16:40:42] [PASSED] test_lock_unlock
[16:40:42] [PASSED] test_duplicates
[16:40:42] [PASSED] test_prepare
[16:40:42] [PASSED] test_prepare_array
[16:40:42] [PASSED] test_multiple_loops
[16:40:42] ==================== [PASSED] drm_exec =====================
[16:40:42] =========== drm_format_helper_test (18 subtests) ===========
[16:40:42] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:40:42] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:40:42] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:40:42] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:40:42] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:40:42] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:40:42] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:40:42] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:40:42] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:40:42] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:40:42] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:40:42] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:40:42] ==================== drm_test_fb_swab =====================
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ================ [PASSED] drm_test_fb_swab =================
[16:40:42] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:40:42] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[16:40:42] [PASSED] single_pixel_source_buffer
[16:40:42] [PASSED] single_pixel_clip_rectangle
[16:40:42] [PASSED] well_known_colors
[16:40:42] [PASSED] destination_pitch
[16:40:42] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:40:42] ================= drm_test_fb_clip_offset =================
[16:40:42] [PASSED] pass through
[16:40:42] [PASSED] horizontal offset
[16:40:42] [PASSED] vertical offset
[16:40:42] [PASSED] horizontal and vertical offset
[16:40:42] [PASSED] horizontal offset (custom pitch)
[16:40:42] [PASSED] vertical offset (custom pitch)
[16:40:42] [PASSED] horizontal and vertical offset (custom pitch)
[16:40:42] ============= [PASSED] drm_test_fb_clip_offset =============
[16:40:42] ============== drm_test_fb_build_fourcc_list ==============
[16:40:42] [PASSED] no native formats
[16:40:42] [PASSED] XRGB8888 as native format
[16:40:42] [PASSED] remove duplicates
[16:40:42] [PASSED] convert alpha formats
[16:40:42] [PASSED] random formats
[16:40:42] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[16:40:42] =================== drm_test_fb_memcpy ====================
[16:40:42] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:40:42] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:40:42] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:40:42] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:40:42] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:40:42] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:40:42] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:40:42] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:40:42] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:40:42] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:40:42] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:40:42] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:40:42] =============== [PASSED] drm_test_fb_memcpy ================
[16:40:42] ============= [PASSED] drm_format_helper_test ==============
[16:40:42] ================= drm_format (18 subtests) =================
[16:40:42] [PASSED] drm_test_format_block_width_invalid
[16:40:42] [PASSED] drm_test_format_block_width_one_plane
[16:40:42] [PASSED] drm_test_format_block_width_two_plane
[16:40:42] [PASSED] drm_test_format_block_width_three_plane
[16:40:42] [PASSED] drm_test_format_block_width_tiled
[16:40:42] [PASSED] drm_test_format_block_height_invalid
[16:40:42] [PASSED] drm_test_format_block_height_one_plane
[16:40:42] [PASSED] drm_test_format_block_height_two_plane
[16:40:42] [PASSED] drm_test_format_block_height_three_plane
[16:40:42] [PASSED] drm_test_format_block_height_tiled
[16:40:42] [PASSED] drm_test_format_min_pitch_invalid
[16:40:42] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:40:42] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:40:42] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:40:42] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:40:42] [PASSED] drm_test_format_min_pitch_two_plane
[16:40:42] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:40:42] [PASSED] drm_test_format_min_pitch_tiled
[16:40:42] =================== [PASSED] drm_format ====================
[16:40:42] ============== drm_framebuffer (10 subtests) ===============
[16:40:42] ========== drm_test_framebuffer_check_src_coords ==========
[16:40:42] [PASSED] Success: source fits into fb
[16:40:42] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:40:42] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:40:42] [PASSED] Fail: overflowing fb with source width
[16:40:42] [PASSED] Fail: overflowing fb with source height
[16:40:42] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:40:42] [PASSED] drm_test_framebuffer_cleanup
[16:40:42] =============== drm_test_framebuffer_create ===============
[16:40:42] [PASSED] ABGR8888 normal sizes
[16:40:42] [PASSED] ABGR8888 max sizes
[16:40:42] [PASSED] ABGR8888 pitch greater than min required
[16:40:42] [PASSED] ABGR8888 pitch less than min required
[16:40:42] [PASSED] ABGR8888 Invalid width
[16:40:42] [PASSED] ABGR8888 Invalid buffer handle
[16:40:42] [PASSED] No pixel format
[16:40:42] [PASSED] ABGR8888 Width 0
[16:40:42] [PASSED] ABGR8888 Height 0
[16:40:42] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:40:42] [PASSED] ABGR8888 Large buffer offset
[16:40:42] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:40:42] [PASSED] ABGR8888 Invalid flag
[16:40:42] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:40:42] [PASSED] ABGR8888 Valid buffer modifier
[16:40:42] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:40:42] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] NV12 Normal sizes
[16:40:42] [PASSED] NV12 Max sizes
[16:40:42] [PASSED] NV12 Invalid pitch
[16:40:42] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:40:42] [PASSED] NV12 different modifier per-plane
[16:40:42] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:40:42] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] NV12 Modifier for inexistent plane
[16:40:42] [PASSED] NV12 Handle for inexistent plane
[16:40:42] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:40:42] [PASSED] YVU420 Normal sizes
[16:40:42] [PASSED] YVU420 Max sizes
[16:40:42] [PASSED] YVU420 Invalid pitch
[16:40:42] [PASSED] YVU420 Different pitches
[16:40:42] [PASSED] YVU420 Different buffer offsets/pitches
[16:40:42] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:40:42] [PASSED] YVU420 Valid modifier
[16:40:42] [PASSED] YVU420 Different modifiers per plane
[16:40:42] [PASSED] YVU420 Modifier for inexistent plane
[16:40:42] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:40:42] [PASSED] X0L2 Normal sizes
[16:40:42] [PASSED] X0L2 Max sizes
[16:40:42] [PASSED] X0L2 Invalid pitch
[16:40:42] [PASSED] X0L2 Pitch greater than minimum required
[16:40:42] [PASSED] X0L2 Handle for inexistent plane
[16:40:42] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:40:42] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:40:42] [PASSED] X0L2 Valid modifier
[16:40:42] [PASSED] X0L2 Modifier for inexistent plane
[16:40:42] =========== [PASSED] drm_test_framebuffer_create ===========
[16:40:42] [PASSED] drm_test_framebuffer_free
[16:40:42] [PASSED] drm_test_framebuffer_init
[16:40:42] [PASSED] drm_test_framebuffer_init_bad_format
[16:40:42] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:40:42] [PASSED] drm_test_framebuffer_lookup
[16:40:42] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:40:42] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:40:42] ================= [PASSED] drm_framebuffer =================
[16:40:42] ================ drm_gem_shmem (8 subtests) ================
[16:40:42] [PASSED] drm_gem_shmem_test_obj_create
[16:40:42] [PASSED] drm_gem_shmem_test_obj_create_private
[16:40:42] [PASSED] drm_gem_shmem_test_pin_pages
[16:40:42] [PASSED] drm_gem_shmem_test_vmap
[16:40:42] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:40:42] [PASSED] drm_gem_shmem_test_get_sg_table
[16:40:42] [PASSED] drm_gem_shmem_test_madvise
[16:40:42] [PASSED] drm_gem_shmem_test_purge
[16:40:42] ================== [PASSED] drm_gem_shmem ==================
[16:40:42] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:40:42] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[16:40:42] [PASSED] Automatic
[16:40:42] [PASSED] Full
[16:40:42] [PASSED] Limited 16:235
[16:40:42] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:40:42] [PASSED] drm_test_check_disable_connector
[16:40:42] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:40:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:40:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:40:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:40:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:40:42] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:40:42] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:40:42] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:40:42] [PASSED] drm_test_check_output_bpc_dvi
[16:40:42] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:40:42] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:40:42] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:40:42] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:40:42] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:40:42] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:40:42] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:40:42] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:40:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:40:42] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:40:42] [PASSED] drm_test_check_broadcast_rgb_value
[16:40:42] [PASSED] drm_test_check_bpc_8_value
[16:40:42] [PASSED] drm_test_check_bpc_10_value
[16:40:42] [PASSED] drm_test_check_bpc_12_value
[16:40:42] [PASSED] drm_test_check_format_value
[16:40:42] [PASSED] drm_test_check_tmds_char_value
[16:40:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:40:42] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:40:42] [PASSED] drm_test_check_mode_valid
[16:40:42] [PASSED] drm_test_check_mode_valid_reject
[16:40:42] [PASSED] drm_test_check_mode_valid_reject_rate
[16:40:42] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:40:42] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:40:42] ================= drm_managed (2 subtests) =================
[16:40:42] [PASSED] drm_test_managed_release_action
[16:40:42] [PASSED] drm_test_managed_run_action
[16:40:42] =================== [PASSED] drm_managed ===================
[16:40:42] =================== drm_mm (6 subtests) ====================
[16:40:42] [PASSED] drm_test_mm_init
[16:40:42] [PASSED] drm_test_mm_debug
[16:40:42] [PASSED] drm_test_mm_align32
[16:40:42] [PASSED] drm_test_mm_align64
[16:40:42] [PASSED] drm_test_mm_lowest
[16:40:42] [PASSED] drm_test_mm_highest
[16:40:42] ===================== [PASSED] drm_mm ======================
[16:40:42] ============= drm_modes_analog_tv (5 subtests) =============
[16:40:42] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:40:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:40:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:40:42] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:40:42] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:40:42] =============== [PASSED] drm_modes_analog_tv ===============
[16:40:42] ============== drm_plane_helper (2 subtests) ===============
[16:40:42] =============== drm_test_check_plane_state ================
[16:40:42] [PASSED] clipping_simple
[16:40:42] [PASSED] clipping_rotate_reflect
[16:40:42] [PASSED] positioning_simple
[16:40:42] [PASSED] upscaling
[16:40:42] [PASSED] downscaling
[16:40:42] [PASSED] rounding1
[16:40:42] [PASSED] rounding2
[16:40:42] [PASSED] rounding3
[16:40:42] [PASSED] rounding4
[16:40:42] =========== [PASSED] drm_test_check_plane_state ============
[16:40:42] =========== drm_test_check_invalid_plane_state ============
[16:40:42] [PASSED] positioning_invalid
[16:40:42] [PASSED] upscaling_invalid
[16:40:42] [PASSED] downscaling_invalid
[16:40:42] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:40:42] ================ [PASSED] drm_plane_helper =================
[16:40:42] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:40:42] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:40:42] [PASSED] None
[16:40:42] [PASSED] PAL
[16:40:42] [PASSED] NTSC
[16:40:42] [PASSED] Both, NTSC Default
[16:40:42] [PASSED] Both, PAL Default
[16:40:42] [PASSED] Both, NTSC Default, with PAL on command-line
[16:40:42] [PASSED] Both, PAL Default, with NTSC on command-line
[16:40:42] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:40:42] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:40:42] ================== drm_rect (9 subtests) ===================
[16:40:42] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:40:42] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:40:42] [PASSED] drm_test_rect_clip_scaled_clipped
[16:40:42] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:40:42] ================= drm_test_rect_intersect =================
[16:40:42] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:40:42] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:40:42] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:40:42] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:40:42] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:40:42] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:40:42] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:40:42] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:40:42] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:40:42] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:40:42] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:40:42] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:40:42] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:40:42] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:40:42] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:40:42] ============= [PASSED] drm_test_rect_intersect =============
[16:40:42] ================ drm_test_rect_calc_hscale ================
[16:40:42] [PASSED] normal use
[16:40:42] [PASSED] out of max range
[16:40:42] [PASSED] out of min range
[16:40:42] [PASSED] zero dst
[16:40:42] [PASSED] negative src
[16:40:42] [PASSED] negative dst
[16:40:42] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:40:42] ================ drm_test_rect_calc_vscale ================
[16:40:42] [PASSED] normal use
[16:40:42] [PASSED] out of max range
[16:40:42] [PASSED] out of min range
[16:40:42] [PASSED] zero dst
[16:40:42] [PASSED] negative src
[16:40:42] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[16:40:42] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:40:42] ================== drm_test_rect_rotate ===================
[16:40:42] [PASSED] reflect-x
[16:40:42] [PASSED] reflect-y
[16:40:42] [PASSED] rotate-0
[16:40:42] [PASSED] rotate-90
[16:40:42] [PASSED] rotate-180
[16:40:42] [PASSED] rotate-270
[16:40:42] ============== [PASSED] drm_test_rect_rotate ===============
[16:40:42] ================ drm_test_rect_rotate_inv =================
[16:40:42] [PASSED] reflect-x
[16:40:42] [PASSED] reflect-y
[16:40:42] [PASSED] rotate-0
[16:40:42] [PASSED] rotate-90
[16:40:42] [PASSED] rotate-180
[16:40:42] [PASSED] rotate-270
[16:40:42] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:40:42] ==================== [PASSED] drm_rect =====================
[16:40:42] ============================================================
[16:40:42] Testing complete. Ran 616 tests: passed: 616
[16:40:42] Elapsed time: 23.250s total, 1.651s configuring, 21.433s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:40:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:40:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:40:52] Starting KUnit Kernel (1/1)...
[16:40:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:40:52] ================= ttm_device (5 subtests) ==================
[16:40:52] [PASSED] ttm_device_init_basic
[16:40:52] [PASSED] ttm_device_init_multiple
[16:40:52] [PASSED] ttm_device_fini_basic
[16:40:52] [PASSED] ttm_device_init_no_vma_man
[16:40:52] ================== ttm_device_init_pools ==================
[16:40:52] [PASSED] No DMA allocations, no DMA32 required
[16:40:52] [PASSED] DMA allocations, DMA32 required
[16:40:52] [PASSED] No DMA allocations, DMA32 required
[16:40:52] [PASSED] DMA allocations, no DMA32 required
[16:40:52] ============== [PASSED] ttm_device_init_pools ==============
[16:40:52] =================== [PASSED] ttm_device ====================
[16:40:52] ================== ttm_pool (8 subtests) ===================
[16:40:52] ================== ttm_pool_alloc_basic ===================
[16:40:52] [PASSED] One page
[16:40:52] [PASSED] More than one page
[16:40:52] [PASSED] Above the allocation limit
[16:40:52] [PASSED] One page, with coherent DMA mappings enabled
[16:40:52] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:40:52] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:40:52] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:40:52] [PASSED] One page
[16:40:52] [PASSED] More than one page
[16:40:52] [PASSED] Above the allocation limit
[16:40:52] [PASSED] One page, with coherent DMA mappings enabled
[16:40:52] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:40:52] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:40:52] [PASSED] ttm_pool_alloc_order_caching_match
[16:40:52] [PASSED] ttm_pool_alloc_caching_mismatch
[16:40:52] [PASSED] ttm_pool_alloc_order_mismatch
[16:40:52] [PASSED] ttm_pool_free_dma_alloc
[16:40:52] [PASSED] ttm_pool_free_no_dma_alloc
[16:40:52] [PASSED] ttm_pool_fini_basic
[16:40:52] ==================== [PASSED] ttm_pool =====================
[16:40:52] ================ ttm_resource (8 subtests) =================
[16:40:52] ================= ttm_resource_init_basic =================
[16:40:52] [PASSED] Init resource in TTM_PL_SYSTEM
[16:40:52] [PASSED] Init resource in TTM_PL_VRAM
[16:40:52] [PASSED] Init resource in a private placement
[16:40:52] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:40:52] ============= [PASSED] ttm_resource_init_basic =============
[16:40:52] [PASSED] ttm_resource_init_pinned
[16:40:52] [PASSED] ttm_resource_fini_basic
[16:40:52] [PASSED] ttm_resource_manager_init_basic
[16:40:52] [PASSED] ttm_resource_manager_usage_basic
[16:40:52] [PASSED] ttm_resource_manager_set_used_basic
[16:40:52] [PASSED] ttm_sys_man_alloc_basic
[16:40:52] [PASSED] ttm_sys_man_free_basic
[16:40:52] ================== [PASSED] ttm_resource ===================
[16:40:52] =================== ttm_tt (15 subtests) ===================
[16:40:52] ==================== ttm_tt_init_basic ====================
[16:40:52] [PASSED] Page-aligned size
[16:40:52] [PASSED] Extra pages requested
[16:40:52] ================ [PASSED] ttm_tt_init_basic ================
[16:40:52] [PASSED] ttm_tt_init_misaligned
[16:40:52] [PASSED] ttm_tt_fini_basic
[16:40:52] [PASSED] ttm_tt_fini_sg
[16:40:52] [PASSED] ttm_tt_fini_shmem
[16:40:52] [PASSED] ttm_tt_create_basic
[16:40:52] [PASSED] ttm_tt_create_invalid_bo_type
[16:40:52] [PASSED] ttm_tt_create_ttm_exists
[16:40:52] [PASSED] ttm_tt_create_failed
[16:40:52] [PASSED] ttm_tt_destroy_basic
[16:40:52] [PASSED] ttm_tt_populate_null_ttm
[16:40:52] [PASSED] ttm_tt_populate_populated_ttm
[16:40:52] [PASSED] ttm_tt_unpopulate_basic
[16:40:52] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:40:52] [PASSED] ttm_tt_swapin_basic
[16:40:52] ===================== [PASSED] ttm_tt ======================
[16:40:52] =================== ttm_bo (14 subtests) ===================
[16:40:52] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:40:52] [PASSED] Cannot be interrupted and sleeps
[16:40:52] [PASSED] Cannot be interrupted, locks straight away
[16:40:52] [PASSED] Can be interrupted, sleeps
[16:40:52] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:40:52] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:40:52] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:40:52] [PASSED] ttm_bo_reserve_double_resv
[16:40:52] [PASSED] ttm_bo_reserve_interrupted
[16:40:52] [PASSED] ttm_bo_reserve_deadlock
[16:40:52] [PASSED] ttm_bo_unreserve_basic
[16:40:52] [PASSED] ttm_bo_unreserve_pinned
[16:40:52] [PASSED] ttm_bo_unreserve_bulk
[16:40:52] [PASSED] ttm_bo_put_basic
[16:40:52] [PASSED] ttm_bo_put_shared_resv
[16:40:52] [PASSED] ttm_bo_pin_basic
[16:40:52] [PASSED] ttm_bo_pin_unpin_resource
[16:40:52] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:40:52] ===================== [PASSED] ttm_bo ======================
[16:40:52] ============== ttm_bo_validate (22 subtests) ===============
[16:40:52] ============== ttm_bo_init_reserved_sys_man ===============
[16:40:52] [PASSED] Buffer object for userspace
[16:40:52] [PASSED] Kernel buffer object
[16:40:52] [PASSED] Shared buffer object
[16:40:52] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:40:52] ============== ttm_bo_init_reserved_mock_man ==============
[16:40:52] [PASSED] Buffer object for userspace
[16:40:52] [PASSED] Kernel buffer object
[16:40:52] [PASSED] Shared buffer object
[16:40:52] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:40:52] [PASSED] ttm_bo_init_reserved_resv
[16:40:52] ================== ttm_bo_validate_basic ==================
[16:40:52] [PASSED] Buffer object for userspace
[16:40:52] [PASSED] Kernel buffer object
[16:40:52] [PASSED] Shared buffer object
[16:40:52] ============== [PASSED] ttm_bo_validate_basic ==============
[16:40:52] [PASSED] ttm_bo_validate_invalid_placement
[16:40:52] ============= ttm_bo_validate_same_placement ==============
[16:40:52] [PASSED] System manager
[16:40:52] [PASSED] VRAM manager
[16:40:52] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:40:52] [PASSED] ttm_bo_validate_failed_alloc
[16:40:52] [PASSED] ttm_bo_validate_pinned
[16:40:52] [PASSED] ttm_bo_validate_busy_placement
[16:40:52] ================ ttm_bo_validate_multihop =================
[16:40:52] [PASSED] Buffer object for userspace
[16:40:52] [PASSED] Kernel buffer object
[16:40:52] [PASSED] Shared buffer object
[16:40:52] ============ [PASSED] ttm_bo_validate_multihop =============
[16:40:52] ========== ttm_bo_validate_no_placement_signaled ==========
[16:40:52] [PASSED] Buffer object in system domain, no page vector
[16:40:52] [PASSED] Buffer object in system domain with an existing page vector
[16:40:52] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:40:52] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:40:52] [PASSED] Buffer object for userspace
[16:40:52] [PASSED] Kernel buffer object
[16:40:52] [PASSED] Shared buffer object
[16:40:52] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:40:52] [PASSED] ttm_bo_validate_move_fence_signaled
[16:40:52] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:40:52] [PASSED] Waits for GPU
[16:40:52] [PASSED] Tries to lock straight away
[16:40:52] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:40:52] [PASSED] ttm_bo_validate_swapout
[16:40:52] [PASSED] ttm_bo_validate_happy_evict
[16:40:52] [PASSED] ttm_bo_validate_all_pinned_evict
[16:40:52] [PASSED] ttm_bo_validate_allowed_only_evict
[16:40:52] [PASSED] ttm_bo_validate_deleted_evict
[16:40:52] [PASSED] ttm_bo_validate_busy_domain_evict
[16:40:52] [PASSED] ttm_bo_validate_evict_gutting
[16:40:52] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:40:52] ================= [PASSED] ttm_bo_validate =================
[16:40:52] ============================================================
[16:40:52] Testing complete. Ran 102 tests: passed: 102
[16:40:52] Elapsed time: 10.098s total, 1.680s configuring, 7.802s building, 0.522s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (7 preceding siblings ...)
2025-06-17 16:40 ` ✓ CI.KUnit: success " Patchwork
@ 2025-06-17 17:30 ` Matthew Brost
2025-06-17 17:40 ` ✓ Xe.CI.BAT: success for " Patchwork
2025-06-18 0:33 ` ✗ Xe.CI.Full: failure " Patchwork
10 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-06-17 17:30 UTC (permalink / raw)
To: intel-xe; +Cc: thomas.hellstrom, himal.prasad.ghimiray, matthew.auld
On Tue, Jun 17, 2025 at 08:37:24AM -0700, Matthew Brost wrote:
> Use the DRM scheduler for delayed GT TLB invalidations, which properly
> fixes the issue raised in [1]. GT TLB fences have their own dma-fence
> context, so even if the invalidations are ordered, the dma-resv/DRM
> scheduler cannot squash the fences. This results in O(M*N*N) complexity
> in the garbage collector, where M is the number of ranges in the garbage
> collector and N is the number of pending GT TLB invalidations.
After this patch, the complexity is O(M*C) where C is the total number
of GT, queue tuples with GT TLB invalidations pending.
Matt
>
> Admittedly, it's quite a lot of code, but the series includes extensive
> kernel documentation and clear code comments. It introduces a generic
> dependency scheduler that can be reused in the future and is logically
> much cleaner than the previous open-coded solution for delaying GT TLB
> invalidations until a bind job completes.
>
> Matt
>
> [1] https://patchwork.freedesktop.org/patch/658370/?series=150188&rev=1
>
> Matthew Brost (6):
> drm/xe: Explicitly mark migration queues with flag
> drm/xe: Add generic dependecy jobs / scheduler
> drm/xe: Add dependency scheduler for GT TLB invalidations to bind
> queues
> drm/xe: Add xe_migrate_job_lock/unlock helpers
> drm/xe: Add GT TLB invalidation jobs
> drm/xe: Use GT TLB invalidation jobs in PT layer
>
> drivers/gpu/drm/xe/Makefile | 2 +
> drivers/gpu/drm/xe/xe_dep_job_types.h | 29 +++
> drivers/gpu/drm/xe/xe_dep_scheduler.c | 145 ++++++++++++
> drivers/gpu/drm/xe/xe_dep_scheduler.h | 21 ++
> drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++
> drivers/gpu/drm/xe/xe_exec_queue_types.h | 15 ++
> drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c | 274 +++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h | 34 +++
> drivers/gpu/drm/xe/xe_migrate.c | 44 +++-
> drivers/gpu/drm/xe/xe_migrate.h | 13 ++
> drivers/gpu/drm/xe/xe_pt.c | 193 +++++++---------
> 11 files changed, 678 insertions(+), 116 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_dep_job_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.c
> create mode 100644 drivers/gpu/drm/xe/xe_dep_scheduler.h
> create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_job.c
> create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_job.h
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Xe.CI.BAT: success for Use DRM scheduler for delayed GT TLB invalidations
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (8 preceding siblings ...)
2025-06-17 17:30 ` [PATCH 0/6] " Matthew Brost
@ 2025-06-17 17:40 ` Patchwork
2025-06-18 0:33 ` ✗ Xe.CI.Full: failure " Patchwork
10 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-06-17 17:40 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 871 bytes --]
== Series Details ==
Series: Use DRM scheduler for delayed GT TLB invalidations
URL : https://patchwork.freedesktop.org/series/150402/
State : success
== Summary ==
CI Bug Log - changes from xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea_BAT -> xe-pw-150402v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea -> xe-pw-150402v1
IGT_8413: 8413
xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea: 9b0a5c52b80dc57862c53abad32ddad241243bea
xe-pw-150402v1: 150402v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/index.html
[-- Attachment #2: Type: text/html, Size: 1419 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread* ✗ Xe.CI.Full: failure for Use DRM scheduler for delayed GT TLB invalidations
2025-06-17 15:37 [PATCH 0/6] Use DRM scheduler for delayed GT TLB invalidations Matthew Brost
` (9 preceding siblings ...)
2025-06-17 17:40 ` ✓ Xe.CI.BAT: success for " Patchwork
@ 2025-06-18 0:33 ` Patchwork
10 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-06-18 0:33 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 85141 bytes --]
== Series Details ==
Series: Use DRM scheduler for delayed GT TLB invalidations
URL : https://patchwork.freedesktop.org/series/150402/
State : failure
== Summary ==
CI Bug Log - changes from xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea_FULL -> xe-pw-150402v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-150402v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-150402v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-150402v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_system_allocator@fault-benchmark:
- shard-lnl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-7/igt@xe_exec_system_allocator@fault-benchmark.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-1/igt@xe_exec_system_allocator@fault-benchmark.html
Known issues
------------
Here are the changes found in xe-pw-150402v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@unaligned-read:
- shard-adlp: [PASS][3] -> [SKIP][4] ([Intel XE#2134])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@fbdev@unaligned-read.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@fbdev@unaligned-read.html
* igt@kms_async_flips@crc:
- shard-adlp: NOTRUN -> [SKIP][5] ([Intel XE#4950]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_async_flips@crc.html
* igt@kms_async_flips@invalid-async-flip-atomic:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#3768])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_async_flips@invalid-async-flip-atomic.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][8] ([Intel XE#316])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2327])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#316]) +5 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#1124]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: NOTRUN -> [SKIP][12] ([Intel XE#619])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#1124]) +14 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [PASS][14] -> [SKIP][15] ([Intel XE#2314] / [Intel XE#2894])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#2191]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#367]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#367])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2652] / [Intel XE#787]) +16 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2887]) +4 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#787]) +125 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#455] / [Intel XE#787]) +35 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#2907]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][24] ([Intel XE#787]) +5 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][25] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#4417]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#4416]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-adlp: NOTRUN -> [SKIP][28] ([Intel XE#306])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#306]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_color@gamma:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2325])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2252]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_frames@hdmi-crc-single:
- shard-adlp: NOTRUN -> [SKIP][32] ([Intel XE#373]) +3 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_chamelium_frames@hdmi-crc-single.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#373]) +12 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#307]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: NOTRUN -> [FAIL][35] ([Intel XE#1178])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][36] ([Intel XE#1178]) +1 other test fail
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][37] ([Intel XE#3304])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_content_protection@uevent:
- shard-dg2-set2: NOTRUN -> [FAIL][38] ([Intel XE#1188]) +1 other test fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#308]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: [PASS][40] -> [SKIP][41] ([Intel XE#2291]) +6 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: NOTRUN -> [INCOMPLETE][42] ([Intel XE#3226])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#323])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [PASS][44] -> [SKIP][45] ([Intel XE#4302])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_display_modes@extended-mode-basic.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [PASS][46] -> [SKIP][47] ([Intel XE#4354])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_dp_link_training@non-uhbr-sst.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#4356])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4356])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2244])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#4422]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbcon_fbt@psr:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#776])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [PASS][53] -> [SKIP][54] ([Intel XE#2316]) +16 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- shard-bmg: [PASS][55] -> [FAIL][56] ([Intel XE#2882])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_flip@basic-flip-vs-wf_vblank.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-dp2:
- shard-bmg: NOTRUN -> [FAIL][57] ([Intel XE#2882]) +2 other tests fail
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_flip@basic-flip-vs-wf_vblank@b-dp2.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4:
- shard-dg2-set2: [PASS][58] -> [FAIL][59] ([Intel XE#301]) +4 other tests fail
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [PASS][60] -> [INCOMPLETE][61] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-466/igt@kms_flip@flip-vs-suspend-interruptible.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@d-dp4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][62] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_flip@flip-vs-suspend@d-dp4.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-adlp: [PASS][63] -> [SKIP][64] ([Intel XE#4950]) +6 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
* igt@kms_flip@plain-flip-ts-check@b-edp1:
- shard-lnl: [PASS][65] -> [FAIL][66] ([Intel XE#886])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-7/igt@kms_flip@plain-flip-ts-check@b-edp1.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-3/igt@kms_flip@plain-flip-ts-check@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
- shard-adlp: [PASS][67] -> [SKIP][68] ([Intel XE#4947]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-adlp: NOTRUN -> [SKIP][69] ([Intel XE#455]) +4 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#455]) +20 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#651]) +47 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-adlp: NOTRUN -> [SKIP][72] ([Intel XE#656]) +4 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#4141]) +4 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][74] ([Intel XE#658]) +1 other test skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2311]) +8 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][76] ([Intel XE#651]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#2313]) +8 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
- shard-adlp: NOTRUN -> [SKIP][78] ([Intel XE#653]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg2-set2: NOTRUN -> [SKIP][79] ([Intel XE#653]) +49 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [PASS][80] -> [SKIP][81] ([Intel XE#1503])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-4/igt@kms_hdr@static-toggle-suspend.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_joiner@basic-big-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][82] ([Intel XE#346])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [PASS][83] -> [SKIP][84] ([Intel XE#3012])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-adlp: NOTRUN -> [SKIP][85] ([Intel XE#4298])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#4090])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][87] ([Intel XE#2925])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_panel_fitting@legacy:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2486])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][89] ([Intel XE#616]) +3 other tests fail
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-bmg: [PASS][90] -> [SKIP][91] ([Intel XE#4596])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-x.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#5021])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#2938])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc5-psr:
- shard-adlp: NOTRUN -> [SKIP][94] ([Intel XE#4947]) +2 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_pm_dc@dc5-psr.html
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#1129])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@deep-pkgc:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#908])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-adlp: [PASS][97] -> [SKIP][98] ([Intel XE#4962])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_pm_rpm@system-suspend-modeset.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#1489]) +13 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#1489]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-adlp: NOTRUN -> [SKIP][101] ([Intel XE#1489]) +2 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@fbc-psr-suspend:
- shard-adlp: NOTRUN -> [SKIP][102] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_psr@pr-cursor-plane-move.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#2850] / [Intel XE#929]) +22 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_psr@psr-dpms.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#2414])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#2939])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#3414] / [Intel XE#3904])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@bad-tiling:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#3414]) +3 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#1127]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#362])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [PASS][111] -> [FAIL][112] ([Intel XE#2142]) +1 other test fail
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-3/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: NOTRUN -> [SKIP][113] ([Intel XE#1499])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-dg2-set2: NOTRUN -> [SKIP][114] ([Intel XE#1091] / [Intel XE#2849])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
* igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-dg2-set2: NOTRUN -> [SKIP][116] ([Intel XE#1123])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-copy-linear-0xfd:
- shard-adlp: NOTRUN -> [SKIP][117] ([Intel XE#1123])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@xe_copy_basic@mem-copy-linear-0xfd.html
* igt@xe_copy_basic@mem-set-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#1126]) +1 other test skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfffe.html
* igt@xe_eu_stall@invalid-event-report-count:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#4497]) +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@xe_eu_stall@invalid-event-report-count.html
* igt@xe_eudebug@basic-close:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#4837]) +21 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@xe_eudebug@basic-close.html
* igt@xe_eudebug@basic-vm-access-parameters-userptr:
- shard-adlp: NOTRUN -> [SKIP][121] ([Intel XE#4837])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@xe_eudebug@basic-vm-access-parameters-userptr.html
* igt@xe_eudebug_online@breakpoint-many-sessions-single-tile:
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#4837])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_eudebug_online@breakpoint-many-sessions-single-tile.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#1392]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-invalid-userptr-fault:
- shard-adlp: NOTRUN -> [SKIP][124] ([Intel XE#288]) +6 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@xe_exec_fault_mode@many-execqueues-invalid-userptr-fault.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][125] ([Intel XE#288]) +41 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-prefetch:
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#4945]) +4 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_exec_fault_mode@twice-userptr-rebind-prefetch.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#2360])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: NOTRUN -> [DMESG-WARN][128] ([Intel XE#3876])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@once-mmap-file-nomemset:
- shard-adlp: NOTRUN -> [SKIP][129] ([Intel XE#4915]) +49 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@xe_exec_system_allocator@once-mmap-file-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][130] ([Intel XE#4943]) +10 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#4915]) +399 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][132] ([Intel XE#4911])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#2833])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#2229])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_mmap@pci-membarrier-parallel:
- shard-adlp: NOTRUN -> [SKIP][135] ([Intel XE#5100])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@xe_mmap@pci-membarrier-parallel.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159]) -> ([PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [SKIP][181], [PASS][182], [PASS][183], [PASS][184]) ([Intel XE#2457])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-7/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-1/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-2/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-4/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-2/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-2/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-4/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-4/igt@xe_module_load@load.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-5/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-5/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-1/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-1/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-7/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@xe_module_load@load.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@xe_module_load@load.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@xe_module_load@load.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-7/igt@xe_module_load@load.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-7/igt@xe_module_load@load.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@xe_module_load@load.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_module_load@load.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@xe_module_load@load.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@xe_module_load@load.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_module_load@load.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_module_load@load.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@xe_module_load@load.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@xe_module_load@load.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@xe_module_load@load.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_module_load@load.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_module_load@load.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@xe_module_load@load.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_module_load@load.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_module_load@load.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@xe_module_load@load.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_module_load@load.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@xe_module_load@load.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@xe_module_load@load.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_module_load@load.html
* igt@xe_oa@closed-fd-and-unmapped-access:
- shard-dg2-set2: NOTRUN -> [SKIP][185] ([Intel XE#2541] / [Intel XE#3573]) +7 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html
* igt@xe_oa@invalid-oa-format-id:
- shard-adlp: NOTRUN -> [SKIP][186] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@xe_oa@invalid-oa-format-id.html
* igt@xe_oa@syncs-ufence-wait:
- shard-dg2-set2: NOTRUN -> [SKIP][187] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +3 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][188] ([Intel XE#1173]) +1 other test fail
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
* igt@xe_pm@d3cold-mocs:
- shard-dg2-set2: NOTRUN -> [SKIP][189] ([Intel XE#2284])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s2idle-basic-exec:
- shard-adlp: [PASS][190] -> [DMESG-WARN][191] ([Intel XE#2953] / [Intel XE#4173])
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_pm@s2idle-basic-exec.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-9/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][192] ([Intel XE#2284] / [Intel XE#366]) +4 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-464/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@s4-basic:
- shard-adlp: [PASS][193] -> [ABORT][194] ([Intel XE#1794] / [Intel XE#2953])
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_pm@s4-basic.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-9/igt@xe_pm@s4-basic.html
* igt@xe_pmu@gt-frequency:
- shard-dg2-set2: NOTRUN -> [FAIL][195] ([Intel XE#5166]) +1 other test fail
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_pmu@gt-frequency.html
* igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][196] ([Intel XE#4733]) +1 other test skip
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][197] ([Intel XE#4733]) +3 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-adlp: NOTRUN -> [SKIP][198] ([Intel XE#4733])
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-dg2-set2: NOTRUN -> [SKIP][199] ([Intel XE#944]) +3 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_query@multigpu-query-topology:
- shard-bmg: NOTRUN -> [SKIP][200] ([Intel XE#944])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@xe_query@multigpu-query-topology.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][201] ([Intel XE#4814])
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-436/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: NOTRUN -> [SKIP][202] ([Intel XE#4351])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-433/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
* igt@xe_vm@large-split-binds-2147483648:
- shard-adlp: [PASS][203] -> [SKIP][204] ([Intel XE#4945]) +23 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_vm@large-split-binds-2147483648.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_vm@large-split-binds-2147483648.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
- shard-lnl: [FAIL][205] ([Intel XE#911]) -> [PASS][206] +3 other tests pass
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_async_flips@invalid-async-flip:
- shard-adlp: [DMESG-WARN][207] ([Intel XE#4543]) -> [PASS][208] +1 other test pass
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-3/igt@kms_async_flips@invalid-async-flip.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [FAIL][209] ([Intel XE#3908]) -> [PASS][210] +1 other test pass
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [DMESG-FAIL][211] ([Intel XE#4543]) -> [PASS][212]
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][213] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][214]
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][215] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][216]
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][217] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][218]
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [SKIP][219] ([Intel XE#2291]) -> [PASS][220] +3 other tests pass
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [SKIP][221] ([Intel XE#1340]) -> [PASS][222]
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dp_aux_dev:
- shard-bmg: [SKIP][223] ([Intel XE#3009]) -> [PASS][224]
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_dp_aux_dev.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_dp_aux_dev.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4:
- shard-dg2-set2: [FAIL][225] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][226] +1 other test pass
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4:
- shard-dg2-set2: [FAIL][227] ([Intel XE#301]) -> [PASS][228] +4 other tests pass
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-dg2-434/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-bmg: [SKIP][229] ([Intel XE#2316]) -> [PASS][230] +9 other tests pass
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-absolute-wf_vblank:
- shard-lnl: [FAIL][231] ([Intel XE#886]) -> [PASS][232] +5 other tests pass
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-6/igt@kms_flip@flip-vs-absolute-wf_vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [ABORT][233] ([Intel XE#2953]) -> [PASS][234] +1 other test pass
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_flip@flip-vs-suspend-interruptible.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][235] -> [PASS][236]
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check:
- shard-adlp: [FAIL][237] ([Intel XE#886]) -> [PASS][238] +2 other tests pass
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-3/igt@kms_flip@plain-flip-ts-check.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@c-hdmi-a3:
- shard-bmg: [FAIL][239] ([Intel XE#2882]) -> [PASS][240] +2 other tests pass
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-5/igt@kms_flip@wf_vblank-ts-check-interruptible@c-hdmi-a3.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@kms_flip@wf_vblank-ts-check-interruptible@c-hdmi-a3.html
* igt@kms_hdr@static-swap:
- shard-bmg: [SKIP][241] ([Intel XE#1503]) -> [PASS][242]
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_hdr@static-swap.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_hdr@static-swap.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [SKIP][243] ([Intel XE#3012]) -> [PASS][244]
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-bmg: [SKIP][245] ([Intel XE#2571]) -> [PASS][246]
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-bmg: [SKIP][247] ([Intel XE#1435]) -> [PASS][248]
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-3/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
- shard-lnl: [FAIL][249] ([Intel XE#4937]) -> [PASS][250]
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
* igt@xe_pm@s4-d3hot-basic-exec:
- shard-adlp: [ABORT][251] ([Intel XE#1794]) -> [PASS][252]
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-9/igt@xe_pm@s4-d3hot-basic-exec.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-3/igt@xe_pm@s4-d3hot-basic-exec.html
#### Warnings ####
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-adlp: [SKIP][253] ([Intel XE#1124]) -> [SKIP][254] ([Intel XE#4947])
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: [SKIP][255] ([Intel XE#1124]) -> [SKIP][256] ([Intel XE#2351] / [Intel XE#4947]) +1 other test skip
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- shard-adlp: [SKIP][257] ([Intel XE#316]) -> [SKIP][258] ([Intel XE#4947])
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-adlp: [SKIP][259] ([Intel XE#2191]) -> [SKIP][260] ([Intel XE#4950]) +1 other test skip
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-adlp: [SKIP][261] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][262] ([Intel XE#4947]) +2 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_chamelium_color@ctm-max:
- shard-adlp: [SKIP][263] ([Intel XE#306]) -> [SKIP][264] ([Intel XE#4950])
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_chamelium_color@ctm-max.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_hpd@vga-hpd-without-ddc:
- shard-adlp: [SKIP][265] ([Intel XE#373]) -> [SKIP][266] ([Intel XE#4950])
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-adlp: [SKIP][267] ([Intel XE#307]) -> [SKIP][268] ([Intel XE#4950])
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_content_protection@dp-mst-lic-type-0.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][269] ([Intel XE#1178]) -> [SKIP][270] ([Intel XE#2341])
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_content_protection@legacy.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@srm:
- shard-bmg: [SKIP][271] ([Intel XE#2341]) -> [FAIL][272] ([Intel XE#1178]) +1 other test fail
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-5/igt@kms_content_protection@srm.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-4/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-bmg: [FAIL][273] ([Intel XE#1188]) -> [SKIP][274] ([Intel XE#2341])
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_content_protection@uevent.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-adlp: [SKIP][275] ([Intel XE#455]) -> [SKIP][276] ([Intel XE#4950]) +1 other test skip
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-adlp: [SKIP][277] ([Intel XE#323]) -> [SKIP][278] ([Intel XE#4950])
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-adlp: [SKIP][279] ([Intel XE#4422]) -> [SKIP][280] ([Intel XE#4945])
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-adlp: [SKIP][281] ([Intel XE#455]) -> [SKIP][282] ([Intel XE#4947])
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][283] ([Intel XE#2312]) -> [SKIP][284] ([Intel XE#2311]) +13 other tests skip
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-adlp: [SKIP][285] ([Intel XE#656]) -> [SKIP][286] ([Intel XE#2351] / [Intel XE#4947])
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][287] ([Intel XE#2311]) -> [SKIP][288] ([Intel XE#2312]) +25 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move:
- shard-adlp: [SKIP][289] ([Intel XE#656]) -> [SKIP][290] ([Intel XE#4947]) +8 other tests skip
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][291] ([Intel XE#2312]) -> [SKIP][292] ([Intel XE#4141]) +5 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][293] ([Intel XE#4141]) -> [SKIP][294] ([Intel XE#2312]) +5 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-adlp: [SKIP][295] ([Intel XE#651]) -> [SKIP][296] ([Intel XE#4947])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][297] ([Intel XE#2313]) -> [SKIP][298] ([Intel XE#2312]) +31 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render:
- shard-adlp: [SKIP][299] ([Intel XE#653]) -> [SKIP][300] ([Intel XE#2351] / [Intel XE#4947])
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][301] ([Intel XE#2312]) -> [SKIP][302] ([Intel XE#2313]) +17 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][303] ([Intel XE#3544]) -> [SKIP][304] ([Intel XE#3374] / [Intel XE#3544])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-adlp: [SKIP][305] ([Intel XE#1489]) -> [SKIP][306] ([Intel XE#4947])
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-adlp: [SKIP][307] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][308] ([Intel XE#4947]) +3 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][309] ([Intel XE#2426]) -> [SKIP][310] ([Intel XE#2509])
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_eu_stall@non-blocking-read:
- shard-adlp: [SKIP][311] ([Intel XE#4497]) -> [SKIP][312] ([Intel XE#4945])
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_eu_stall@non-blocking-read.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_eu_stall@non-blocking-read.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-adlp: [SKIP][313] ([Intel XE#4837]) -> [SKIP][314] ([Intel XE#4945]) +2 other tests skip
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_evict@evict-beng-large-external-cm:
- shard-adlp: [SKIP][315] ([Intel XE#261] / [Intel XE#688]) -> [SKIP][316] ([Intel XE#4945])
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_evict@evict-beng-large-external-cm.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_evict@evict-beng-large-external-cm.html
* igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch:
- shard-adlp: [SKIP][317] ([Intel XE#288]) -> [SKIP][318] ([Intel XE#4945]) +2 other tests skip
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-shared-remap:
- shard-adlp: [SKIP][319] ([Intel XE#4915]) -> [SKIP][320] ([Intel XE#4945]) +40 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-shared-remap.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-shared-remap.html
* igt@xe_mmap@vram:
- shard-adlp: [SKIP][321] ([Intel XE#1008]) -> [SKIP][322] ([Intel XE#4945])
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_mmap@vram.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_mmap@vram.html
* igt@xe_oa@syncs-ufence-wait:
- shard-adlp: [SKIP][323] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][324] ([Intel XE#4945])
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_oa@syncs-ufence-wait.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-adlp: [SKIP][325] ([Intel XE#944]) -> [SKIP][326] ([Intel XE#4945])
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea/shard-adlp-2/igt@xe_query@multigpu-query-cs-cycles.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/shard-adlp-2/igt@xe_query@multigpu-query-cs-cycles.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4497]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4497
[Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4911
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4937
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945
[Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947
[Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950
[Intel XE#4962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4962
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5166
[Intel XE#5172]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5172
[Intel XE#5214]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5214
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea -> xe-pw-150402v1
IGT_8413: 8413
xe-3262-9b0a5c52b80dc57862c53abad32ddad241243bea: 9b0a5c52b80dc57862c53abad32ddad241243bea
xe-pw-150402v1: 150402v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150402v1/index.html
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