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From: Johan Hovold <johan@kernel.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
	mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
	bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
	kishon@kernel.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, kw@linux.com,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy
Date: Thu, 10 Jul 2025 11:43:55 +0200	[thread overview]
Message-ID: <aG-LWxKE11Ah_GS0@hovoldconsulting.com> (raw)
In-Reply-To: <25ddb70a-7442-4d63-9eff-d4c3ac509bbb@oss.qualcomm.com>

On Fri, Jun 27, 2025 at 04:50:57PM +0200, Konrad Dybcio wrote:
> On 6/25/25 11:00 AM, Ziyue Zhang wrote:
> > gcc_aux_clk is used in PCIe RC and it is not required in pcie phy, in
> > pcie phy it should be gcc_phy_aux_clk, so remove gcc_aux_clk and
> > replace it with gcc_phy_aux_clk.
> 
> GCC_PCIE_n_PHY_AUX_CLK is a downstream of the PHY's output..
> are you sure the PHY should be **consuming** it too?

Could we get a reply here, please? 

A bunch of Qualcomm SoCs in mainline do exactly this currently even
though it may not be correct (and some downstream dts do not use these
clocks).

Johan

WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
	mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
	bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
	kishon@kernel.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, kw@linux.com,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy
Date: Thu, 10 Jul 2025 11:43:55 +0200	[thread overview]
Message-ID: <aG-LWxKE11Ah_GS0@hovoldconsulting.com> (raw)
In-Reply-To: <25ddb70a-7442-4d63-9eff-d4c3ac509bbb@oss.qualcomm.com>

On Fri, Jun 27, 2025 at 04:50:57PM +0200, Konrad Dybcio wrote:
> On 6/25/25 11:00 AM, Ziyue Zhang wrote:
> > gcc_aux_clk is used in PCIe RC and it is not required in pcie phy, in
> > pcie phy it should be gcc_phy_aux_clk, so remove gcc_aux_clk and
> > replace it with gcc_phy_aux_clk.
> 
> GCC_PCIE_n_PHY_AUX_CLK is a downstream of the PHY's output..
> are you sure the PHY should be **consuming** it too?

Could we get a reply here, please? 

A bunch of Qualcomm SoCs in mainline do exactly this currently even
though it may not be correct (and some downstream dts do not use these
clocks).

Johan

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2025-07-10  9:44 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-25  9:00 [PATCH v3 0/4] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Ziyue Zhang
2025-06-25  9:00 ` Ziyue Zhang
2025-06-25  9:00 ` [PATCH v3 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings Ziyue Zhang
2025-06-25  9:00   ` Ziyue Zhang
2025-06-27  9:27   ` Johan Hovold
2025-06-27  9:27     ` Johan Hovold
2025-06-25  9:00 ` [PATCH v3 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset Ziyue Zhang
2025-06-25  9:00   ` Ziyue Zhang
2025-06-27  7:08   ` Krzysztof Kozlowski
2025-06-27  7:08     ` Krzysztof Kozlowski
2025-07-11  8:26     ` Ziyue Zhang
2025-07-11  8:26       ` Ziyue Zhang
2025-07-11  8:44       ` Krzysztof Kozlowski
2025-07-11  8:44         ` Krzysztof Kozlowski
2025-07-11  9:57         ` Konrad Dybcio
2025-07-11  9:57           ` Konrad Dybcio
2025-06-27  9:28   ` Johan Hovold
2025-06-27  9:28     ` Johan Hovold
2025-06-25  9:00 ` [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Ziyue Zhang
2025-06-25  9:00   ` Ziyue Zhang
2025-06-27 14:50   ` Konrad Dybcio
2025-06-27 14:50     ` Konrad Dybcio
2025-07-10  9:43     ` Johan Hovold [this message]
2025-07-10  9:43       ` Johan Hovold
2025-07-10 10:24       ` Ziyue Zhang
2025-07-10 10:24         ` Ziyue Zhang
2025-07-10 10:44         ` Johan Hovold
2025-07-10 10:44           ` Johan Hovold
2025-07-15 11:47         ` Konrad Dybcio
2025-07-15 11:47           ` Konrad Dybcio
2025-06-25  9:00 ` [PATCH v3 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie Ziyue Zhang
2025-06-25  9:00   ` Ziyue Zhang

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