[PATCH 0/4] mips: dts: Updates for RTL9300

[PATCH 0/4] mips: dts: Updates for RTL9300

[Chris Packham]

This is a series of small dts changes for the RTL9300 to enable various
peripherals.

Chris Packham (4):
  mips: dts: cameo-rtl9302c: Add switch block
  mips: dts: realtek: Add switch interrupts
  mips: dts: realtek: Add watchdog
  mips: dts: realtek: Add gpio block

 .../cameo-rtl9302c-2x-rtl8224-2xge.dts        | 96 +++++++++++++++++++
 arch/mips/boot/dts/realtek/rtl930x.dtsi       | 31 ++++++
 2 files changed, 127 insertions(+)

-- 
2.49.0

[PATCH 1/4] mips: dts: cameo-rtl9302c: Add switch block

[Chris Packham]

Add the switch port and phys to the cameo-rtl9302c-2x-rtl8224-2xge
board.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    This was originally part of the series adding the MDIO driver[1] however
    the mips specific part wasn't picked up for net-next so I've rolled it
    into this series of changes for linux-mips.
    
    This is needed to comply with the updated bindings. It could
    possibly be split to add the ports then the PHYs. Technically the
    ports are the required property that dtbs_check will complain about
    but it didn't seem worth separating out the PHYs.
    
    [1] - https://lore.kernel.org/all/20250204030249.1965444-7-chris.packham@alliedtelesis.co.nz/

 .../cameo-rtl9302c-2x-rtl8224-2xge.dts        | 96 +++++++++++++++++++
 1 file changed, 96 insertions(+)

diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
index 6789bf374044..6f6a05d4088e 100644
--- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
+++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
@@ -71,3 +71,99 @@ partition@1180000 {
 		};
 	};
 };
+
+&mdio0 {
+	/* External RTL8224 */
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy2: ethernet-phy@2 {
+		reg = <2>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy3: ethernet-phy@3 {
+		reg = <3>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+};
+
+&mdio1 {
+	/* External RTL8224 */
+	phy4: ethernet-phy@0 {
+		reg = <0>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy5: ethernet-phy@1 {
+		reg = <1>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy6: ethernet-phy@2 {
+		reg = <2>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+	phy7: ethernet-phy@3 {
+		reg = <3>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+	};
+};
+
+&switch0 {
+	ethernet-ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			phy-handle = <&phy0>;
+			phy-mode = "usxgmii";
+		};
+		port@1 {
+			reg = <1>;
+			phy-handle = <&phy1>;
+			phy-mode = "usxgmii";
+		};
+		port@2 {
+			reg = <2>;
+			phy-handle = <&phy2>;
+			phy-mode = "usxgmii";
+		};
+		port@3 {
+			reg = <3>;
+			phy-handle = <&phy3>;
+			phy-mode = "usxgmii";
+		};
+		port@16 {
+			reg = <16>;
+			phy-handle = <&phy4>;
+			phy-mode = "usxgmii";
+		};
+		port@17 {
+			reg = <17>;
+			phy-handle = <&phy5>;
+			phy-mode = "usxgmii";
+		};
+		port@18 {
+			reg = <18>;
+			phy-handle = <&phy6>;
+			phy-mode = "usxgmii";
+		};
+		port@19 {
+			reg = <19>;
+			phy-handle = <&phy7>;
+			phy-mode = "usxgmii";
+		};
+		port@24{
+			reg = <24>;
+			phy-mode = "10gbase-r";
+		};
+		port@25{
+			reg = <25>;
+			phy-mode = "10gbase-r";
+		};
+	};
+};
-- 
2.49.0

[PATCH 2/4] mips: dts: realtek: Add switch interrupts

[Chris Packham]

Add interrupts for the rtl9301-switch.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 arch/mips/boot/dts/realtek/rtl930x.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index 101bab72a95f..74b30704f188 100644
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -48,6 +48,10 @@ switch0: switch@1b000000 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 
+		interrupt-parent = <&intc>;
+		interrupts = <23>, <24>;
+		interrupt-names = "switch", "nic";
+
 		reboot@c {
 			compatible = "syscon-reboot";
 			reg = <0x0c 0x4>;
-- 
2.49.0

[PATCH 3/4] mips: dts: realtek: Add watchdog

[Chris Packham]

The RTL9300 has an integrated watchdog. Add this to the devicetree.

This is taken from openwrt[1] the only difference is removing the
unnecessary second cell from the interrupts.

[1] - https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/realtek/dts/rtl930x.dtsi

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 arch/mips/boot/dts/realtek/rtl930x.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index 74b30704f188..77a854034aba 100644
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -142,6 +142,20 @@ timer0: timer@3200 {
 			clocks = <&lx_clk>;
 		};
 
+		watchdog0: watchdog@3260 {
+			compatible = "realtek,rtl9300-wdt";
+			reg = <0x3260 0xc>;
+
+			realtek,reset-mode = "soc";
+
+			clocks = <&lx_clk>;
+			timeout-sec = <30>;
+
+			interrupt-parent = <&intc>;
+			interrupt-names = "phase1", "phase2";
+			interrupts = <5>, <6>;
+		};
+
 		snand: spi@1a400 {
 			compatible = "realtek,rtl9301-snand";
 			reg = <0x1a400 0x44>;
-- 
2.49.0

[PATCH 4/4] mips: dts: realtek: Add gpio block

[Chris Packham]

The RTL9300 has a block of GPIOs included in the SoC. Add these to the
devicetree.

This is taken from openwrt[1] the differences are removing the
unnecessary second cell from the interrupt and removing the -controller
from the node name to conform to the dtschema.

[1] - https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/realtek/dts/rtl930x.dtsi

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 arch/mips/boot/dts/realtek/rtl930x.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index 77a854034aba..24e262e2dc2a 100644
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -156,6 +156,19 @@ watchdog0: watchdog@3260 {
 			interrupts = <5>, <6>;
 		};
 
+		gpio0: gpio@3300 {
+			compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
+			reg = <0x3300 0x1c>, <0x3338 0x8>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <24>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupts = <13>;
+		};
+
 		snand: spi@1a400 {
 			compatible = "realtek,rtl9301-snand";
 			reg = <0x1a400 0x44>;
-- 
2.49.0

Re: [PATCH 0/4] mips: dts: Updates for RTL9300

[Thomas Bogendoerfer]

On Thu, Jun 19, 2025 at 01:07:50PM +1200, Chris Packham wrote:
> This is a series of small dts changes for the RTL9300 to enable various
> peripherals.
> 
> Chris Packham (4):
>   mips: dts: cameo-rtl9302c: Add switch block
>   mips: dts: realtek: Add switch interrupts
>   mips: dts: realtek: Add watchdog
>   mips: dts: realtek: Add gpio block
> 
>  .../cameo-rtl9302c-2x-rtl8224-2xge.dts        | 96 +++++++++++++++++++
>  arch/mips/boot/dts/realtek/rtl930x.dtsi       | 31 ++++++
>  2 files changed, 127 insertions(+)

series applied to mips-next.

Thomas.

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