From: Nicolin Chen <nicolinc@nvidia.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Cc: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>,
<eric.auger@redhat.com>, <peter.maydell@linaro.org>,
<jgg@nvidia.com>, <ddutile@redhat.com>, <berrange@redhat.com>,
<imammedo@redhat.com>, <nathanc@nvidia.com>, <mochs@nvidia.com>,
<smostafa@google.com>, <gustavo.romero@linaro.org>,
<mst@redhat.com>, <marcel.apfelbaum@gmail.com>,
<linuxarm@huawei.com>, <wangzhou1@hisilicon.com>,
<jiangkunkun@huawei.com>, <jonathan.cameron@huawei.com>,
<zhangfei.gao@linaro.org>
Subject: Re: [PATCH v7 07/12] hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval
Date: Thu, 10 Jul 2025 15:59:14 -0700 [thread overview]
Message-ID: <aHBFwlEeE9iIEsBD@Asurada-Nvidia> (raw)
In-Reply-To: <20250708154055.101012-8-shameerali.kolothum.thodi@huawei.com>
On Tue, Jul 08, 2025 at 04:40:50PM +0100, Shameer Kolothum wrote:
> Currently, pci_setup_iommu() registers IOMMU ops for a given PCIBus.
> However, when retrieving IOMMU ops for a device using
> pci_device_get_iommu_bus_devfn(), the function checks the parent_dev
> and fetches IOMMU ops from the parent device, even if the current
> bus does not have any associated IOMMU ops.
>
> This behavior works for now because QEMU's IOMMU implementations are
> globally scoped, and host bridges rely on the bypass_iommu property
> to skip IOMMU translation when needed.
>
> However, this model will break with the soon to be introduced
> arm-smmuv3 device, which allows users to associate the IOMMU
> with a specific PCIe root complex (e.g., the default pcie.0
> or a pxb-pcie root complex).
>
> For example, consider the following setup with multiple root
> complexes:
>
> -device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0 \
> ...
> -device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \
> -device pcie-root-port,id=pcie.port1,bus=pcie.1 \
> -device virtio-net-pci,bus=pcie.port1
>
> In Qemu, pxb-pcie acts as a special root complex whose parent is
> effectively the default root complex(pcie.0). Hence, though pcie.1
> has no associated SMMUv3 as per above, pci_device_get_iommu_bus_devfn()
> will incorrectly return the IOMMU ops from pcie.0 due to the fallback
> via parent_dev.
>
> To fix this, introduce a new helper pci_setup_iommu_per_bus() that
> explicitly sets the new iommu_per_bus field in the PCIBus structure.
> This helper will be used in a subsequent patch that adds support for
> the new arm-smmuv3 device.
>
> Update pci_device_get_iommu_bus_devfn() to use iommu_per_bus when
> determining the correct IOMMU ops, ensuring accurate behavior for
> per-bus IOMMUs.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Reviewed-by: Eric Auger <eric.auger@redhat.com>
> Tested-by: Nathan Chen <nathanc@nvidia.com>
> Tested-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
With a nit:
> + /*
> + * When multiple PCI Express Root Buses are defined using pxb-pcie,
> + * the IOMMU configuration may be specific to each root bus. However,
> + * pxb-pcie acts as a special root complex whose parent is effectively
> + * the default root complex(pcie.0). Ensure that we retrieve the
> + * correct IOMMU ops(if any) in such cases.
> + */
> + if (pci_bus_is_express(iommu_bus) && pci_bus_is_root(iommu_bus)) {
> + if (!iommu_bus->iommu_per_bus && parent_bus->iommu_per_bus) {
> + break;
> + }
I think this should just check "if (parent_bus->iommu_per_bus)",
which means that the parent's iommu bus is private so not shared
with any other PCI buses.
next prev parent reply other threads:[~2025-07-10 23:00 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-08 15:40 [PATCH v7 00/12] hw/arm/virt: Add support for user creatable SMMUv3 device Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 01/12] hw/arm/virt-acpi-build: Don't create ITS id mappings by default Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-10 13:59 ` Eric Auger
2025-07-10 15:20 ` Peter Maydell
2025-07-08 15:40 ` [PATCH v7 02/12] hw/arm/smmu-common: Check SMMU has PCIe Root Complex association Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 20:57 ` Nicolin Chen
2025-07-09 8:08 ` Shameerali Kolothum Thodi via
2025-07-09 8:08 ` Shameerali Kolothum Thodi via
2025-07-09 23:54 ` Nicolin Chen
2025-07-10 7:27 ` Shameerali Kolothum Thodi via
2025-07-10 7:27 ` Shameerali Kolothum Thodi via
2025-07-10 17:02 ` Nicolin Chen
2025-07-10 17:07 ` Nicolin Chen
2025-07-08 15:40 ` [PATCH v7 03/12] hw/arm/virt-acpi-build: Re-arrange SMMUv3 IORT build Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 04/12] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 devices Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 05/12] hw/arm/virt: Factor out common SMMUV3 dt bindings code Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 06/12] hw/arm/virt: Add an SMMU_IO_LEN macro Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 07/12] hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 21:26 ` Nicolin Chen
2025-07-09 8:20 ` Shameerali Kolothum Thodi via
2025-07-09 8:20 ` Shameerali Kolothum Thodi via
2025-07-10 0:06 ` Nicolin Chen
2025-07-10 7:37 ` Shameerali Kolothum Thodi via
2025-07-10 7:37 ` Shameerali Kolothum Thodi via
2025-07-10 15:59 ` Donald Dutile
2025-07-10 16:21 ` Shameerali Kolothum Thodi via
2025-07-10 16:21 ` Shameerali Kolothum Thodi via
2025-07-10 16:55 ` Nicolin Chen
2025-07-10 21:40 ` Shameerali Kolothum Thodi via
2025-07-10 21:40 ` Shameerali Kolothum Thodi via
2025-07-10 22:56 ` Nicolin Chen
2025-07-10 16:58 ` Donald Dutile
2025-07-10 22:59 ` Nicolin Chen [this message]
2025-07-08 15:40 ` [PATCH v7 08/12] hw/arm/virt: Allow user-creatable SMMUv3 dev instantiation Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 21:34 ` Nicolin Chen
2025-07-08 15:40 ` [PATCH v7 09/12] qemu-options.hx: Document the arm-smmuv3 device Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 10/12] bios-tables-test: Allow for smmuv3 test data Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 11/12] qtest/bios-tables-test: Add tests for legacy smmuv3 and smmuv3 device Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-08 15:40 ` [PATCH v7 12/12] qtest/bios-tables-test: Update tables for smmuv3 tests Shameer Kolothum via
2025-07-08 15:40 ` Shameer Kolothum via
2025-07-10 10:10 ` [PATCH v7 00/12] hw/arm/virt: Add support for user creatable SMMUv3 device Shameerali Kolothum Thodi via
2025-07-10 10:10 ` Shameerali Kolothum Thodi via
2025-07-10 11:48 ` Peter Maydell
2025-07-10 23:04 ` Nicolin Chen
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