* [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG
@ 2025-07-08 13:25 Maíra Canal
2025-07-08 13:25 ` [PATCH v5 1/8] drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET Maíra Canal
` (12 more replies)
0 siblings, 13 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal,
Min Ma, Lizhi Hou, Oded Gabbay, Frank Binns, Matt Coster,
Qiang Yu, Lyude Paul, Alex Deucher, Christian König
TL;DR: The only two patches that are lacking R-b's are:
[PATCH 2/8] drm/sched: Allow drivers to skip the reset and keep on running
[PATCH 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
-> If Intel CI succeeds, it's Reviewed-by: Matthew Brost <matthew.brost@intel.com>
For those two patches, it would be great to gather feedback and/or R-b's,
particularly from the Intel folks.
Thanks for all the reviews so far!
---
When the DRM scheduler times out, it's possible that the GPU isn't hung;
instead, a job may still be running, and there may be no valid reason to
reset the hardware. This can occur in two situations:
1. The GPU exposes some mechanism that ensures the GPU is still making
progress. By checking this mechanism, the driver can safely skip the
reset, re-arm the timeout, and allow the job to continue running until
completion. This is the case for v3d, Etnaviv, and Xe.
2. Timeout has fired before the free-job worker. Consequently, the
scheduler calls `timedout_job()` for a job that isn't timed out.
These two scenarios are problematic because the job was removed from the
`sched->pending_list` before calling `sched->ops->timedout_job()`, which
means that when the job finishes, it won't be freed by the scheduler
though `sched->ops->free_job()`. As a result, the job and its resources
won't be freed, leading to a memory leak.
For v3d specifically, we have observed that these memory leaks can be
significant in certain scenarios, as reported by users in [1][2]. To
address this situation, I submitted a patch similar to commit 704d3d60fec4
("drm/etnaviv: don't block scheduler when GPU is still active") for v3d [3].
This patch has already landed in drm-misc-fixes and successfully resolved
the users' issues.
However, as I mentioned in [3], exposing the scheduler's internals within
the drivers isn't ideal and I believe this specific situation can be
addressed within the DRM scheduler framework.
This series aims to resolve this issue by adding a new DRM sched status
that allows a driver to skip the reset. This new status will indicate that
the job should be reinserted into the pending list, and the driver will
still signal its completion.
[1] https://gitlab.freedesktop.org/mesa/mesa/-/issues/12227
[2] https://github.com/raspberrypi/linux/issues/6817
[3] https://lore.kernel.org/dri-devel/20250430210643.57924-1-mcanal@igalia.com/T/
Best Regards,
- Maíra
---
v1 -> v2:
- Fix several grammar nits across the documentation and commit messages.
- Drop "drm/sched: Always free the job after the timeout" (Tvrtko Ursulin)
- [1/8] NEW PATCH: Rename DRM_GPU_SCHED_STAT_NOMINAL to a more semantic
name (Tvrtko Ursulin, Philipp Stanner)
- [2/8] Rename DRM_GPU_SCHED_STAT_RUNNING to DRM_GPU_SCHED_STAT_NO_HANG (Tvrtko Ursulin, Philipp Stanner)
- [2/8] Requeue free-job work after reinserting the job to the pending list (Matthew Brost)
- [2/8] Create a helper function to reinsert the job (Philipp Stanner)
- [2/8] Rewrite the commit message (Philipp Stanner)
- [2/8] Add a comment to `drm_sched_start()` documentation, similar to what
was commented in `drm_sched_stop()` (Philipp Stanner)
- [3/8] Keep HZ as timeout for `drm_mock_sched_job_wait_scheduled()` (Tvrtko Ursulin)
- [4/8] Use a job flag to indicate that `timedout_job()` should skip the
reset (Tvrtko Ursulin)
- [7/8] Use DRM_GPU_SCHED_STAT_NO_HANG to re-arm the timer in other cases
as well (Matthew Brost)
- Link to v1: https://lore.kernel.org/r/20250503-sched-skip-reset-v1-0-ed0d6701a3fe@igalia.com
v2 -> v3:
- [2/8] Address comments about the commit message (Philipp Stanner)
- [2/8] Improve comments and documentation style (Philipp Stanner)
- [3/8] Rename the commit title to "drm/sched: Make timeout KUnit tests faster" (Philipp Stanner)
- [3/8] Add Tvrtko's R-b (Tvrtko Ursulin)
- [4/8] Instead of setting up a job duration, advance it manually (Tvrtko Ursulin)
- [4/8] Wait for 2 * MOCK_TIMEOUT instead of MOCK_TIMEOUT (Tvrtko Ursulin)
- [5/8, 6/8, 7/8, 8/8] Use Philipp's suggestion to improve the commit messages (Philipp Stanner)
- Link to v2: https://lore.kernel.org/r/20250530-sched-skip-reset-v2-0-c40a8d2d8daa@igalia.com
v3 -> v4:
- [1/8] s/betters/better and Philipp's R-b (Philipp Stanner)
- [2/8] Apply some documentation nits (Philipp Stanner)
- [3/8] Add Philipp's A-b (Philipp Stanner)
- [4/8, 5/8] Add Tvrtko's R-b (Tvrtko Ursulin)
- [6/8] Add Lucas' R-b (Lucas Stach)
- Link to v3: https://lore.kernel.org/r/20250618-sched-skip-reset-v3-0-8be5cca2725d@igalia.com
v4 -> v5:
- Rebased on top of drm-tip (for Intel CI)
- [2/8] Reword the commit message (Philipp Stanner)
- [2/8] Reword several comments (Philipp Stanner)
- [4/8] Add Philipp's R-b (Philipp Stanner)
- Link to v4: https://lore.kernel.org/r/20250707-sched-skip-reset-v4-0-036c0f0f584f@igalia.com
---
Maíra Canal (8):
drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
drm/sched: Allow drivers to skip the reset and keep on running
drm/sched: Make timeout KUnit tests faster
drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG
drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
drm/etnaviv: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
drivers/accel/amdxdna/aie2_ctx.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 16 +++----
drivers/gpu/drm/imagination/pvr_queue.c | 4 +-
drivers/gpu/drm/lima/lima_sched.c | 6 +--
drivers/gpu/drm/nouveau/nouveau_exec.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_sched.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_job.c | 10 ++---
drivers/gpu/drm/panthor/panthor_mmu.c | 2 +-
drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
drivers/gpu/drm/scheduler/sched_main.c | 48 +++++++++++++++++++--
drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 7 ++-
drivers/gpu/drm/scheduler/tests/sched_tests.h | 1 +
drivers/gpu/drm/scheduler/tests/tests_basic.c | 55 ++++++++++++++++++++++--
drivers/gpu/drm/v3d/v3d_sched.c | 18 ++------
drivers/gpu/drm/xe/xe_guc_submit.c | 14 ++----
include/drm/gpu_scheduler.h | 7 ++-
17 files changed, 137 insertions(+), 61 deletions(-)
---
base-commit: 8b32b5509128873da8ecfc06beefcb58927eb50b
change-id: 20250502-sched-skip-reset-bf7c163233da
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v5 1/8] drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running Maíra Canal
` (11 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal,
Min Ma, Lizhi Hou, Oded Gabbay, Frank Binns, Matt Coster,
Qiang Yu, Lyude Paul, Alex Deucher, Christian König
Among the scheduler's statuses, the only one that indicates an error is
DRM_GPU_SCHED_STAT_ENODEV. Any status other than DRM_GPU_SCHED_STAT_ENODEV
signifies that the operation succeeded and the GPU is in a nominal state.
However, to provide more information about the GPU's status, it is needed
to convey more information than just "OK".
Therefore, rename DRM_GPU_SCHED_STAT_NOMINAL to
DRM_GPU_SCHED_STAT_RESET, which better communicates the meaning of this
status. The status DRM_GPU_SCHED_STAT_RESET indicates that the GPU has
hung, but it has been successfully reset and is now in a nominal state
again.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Philipp Stanner <phasta@kernel.org>
---
To: Min Ma <min.ma@amd.com>
To: Lizhi Hou <lizhi.hou@amd.com>
To: Oded Gabbay <ogabbay@kernel.org>
To: Frank Binns <frank.binns@imgtec.com>
To: Matt Coster <matt.coster@imgtec.com>
To: Qiang Yu <yuq825@gmail.com>
To: Lyude Paul <lyude@redhat.com>
To: Alex Deucher <alexander.deucher@amd.com>
To: Christian König <christian.koenig@amd.com>
---
drivers/accel/amdxdna/aie2_ctx.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 4 ++--
drivers/gpu/drm/imagination/pvr_queue.c | 4 ++--
drivers/gpu/drm/lima/lima_sched.c | 6 +++---
drivers/gpu/drm/nouveau/nouveau_exec.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_sched.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_job.c | 6 +++---
drivers/gpu/drm/panthor/panthor_mmu.c | 2 +-
drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
drivers/gpu/drm/scheduler/sched_main.c | 2 +-
drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 2 +-
drivers/gpu/drm/v3d/v3d_sched.c | 6 +++---
drivers/gpu/drm/xe/xe_guc_submit.c | 6 +++---
include/drm/gpu_scheduler.h | 4 ++--
15 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/accel/amdxdna/aie2_ctx.c b/drivers/accel/amdxdna/aie2_ctx.c
index f20999f2d66864fd4a6b7069e866727c37befb39..2cff5419bd2facb59ff5df6388aba0512fd45d5c 100644
--- a/drivers/accel/amdxdna/aie2_ctx.c
+++ b/drivers/accel/amdxdna/aie2_ctx.c
@@ -361,7 +361,7 @@ aie2_sched_job_timedout(struct drm_sched_job *sched_job)
aie2_hwctx_restart(xdna, hwctx);
mutex_unlock(&xdna->dev_lock);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static const struct drm_sched_backend_ops sched_ops = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 2b58e353cca154223ee5314f0285cc1f805430f6..b9ecb13930894430c206a7d80a9c870ec2635b68 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -176,7 +176,7 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job)
exit:
drm_dev_exit(idx);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
int amdgpu_job_alloc(struct amdgpu_device *adev, struct amdgpu_vm *vm,
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index 71e2e6b9d71393d5f81eadd109a50e1b83f85e5f..030e6c3233bed9edd5d9c2f49f842f604e57fc1c 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -87,13 +87,13 @@ static enum drm_gpu_sched_stat etnaviv_sched_timedout_job(struct drm_sched_job
drm_sched_resubmit_jobs(&gpu->sched);
drm_sched_start(&gpu->sched, 0);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
out_no_timeout:
spin_lock(&sched->job_list_lock);
list_add(&sched_job->list, &sched->pending_list);
spin_unlock(&sched->job_list_lock);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void etnaviv_sched_free_job(struct drm_sched_job *sched_job)
diff --git a/drivers/gpu/drm/imagination/pvr_queue.c b/drivers/gpu/drm/imagination/pvr_queue.c
index 5a41ee79fed646a86344cd16e78efdb45ff02e43..fc415dd0d7a73631bd4144c9f35b9b294c625a12 100644
--- a/drivers/gpu/drm/imagination/pvr_queue.c
+++ b/drivers/gpu/drm/imagination/pvr_queue.c
@@ -803,7 +803,7 @@ static void pvr_queue_start(struct pvr_queue *queue)
* the scheduler, and re-assign parent fences in the middle.
*
* Return:
- * * DRM_GPU_SCHED_STAT_NOMINAL.
+ * * DRM_GPU_SCHED_STAT_RESET.
*/
static enum drm_gpu_sched_stat
pvr_queue_timedout_job(struct drm_sched_job *s_job)
@@ -854,7 +854,7 @@ pvr_queue_timedout_job(struct drm_sched_job *s_job)
drm_sched_start(sched, 0);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
/**
diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c
index 954f4325b859b2977a2cc608a99a6ebb642f1000..739e8c6c6d909aa4263bad8a12ec07f0c6607bb2 100644
--- a/drivers/gpu/drm/lima/lima_sched.c
+++ b/drivers/gpu/drm/lima/lima_sched.c
@@ -412,7 +412,7 @@ static enum drm_gpu_sched_stat lima_sched_timedout_job(struct drm_sched_job *job
*/
if (dma_fence_is_signaled(task->fence)) {
DRM_WARN("%s spurious timeout\n", lima_ip_name(ip));
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
/*
@@ -429,7 +429,7 @@ static enum drm_gpu_sched_stat lima_sched_timedout_job(struct drm_sched_job *job
if (dma_fence_is_signaled(task->fence)) {
DRM_WARN("%s unexpectedly high interrupt latency\n", lima_ip_name(ip));
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
/*
@@ -467,7 +467,7 @@ static enum drm_gpu_sched_stat lima_sched_timedout_job(struct drm_sched_job *job
drm_sched_resubmit_jobs(&pipe->base);
drm_sched_start(&pipe->base, 0);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void lima_sched_free_job(struct drm_sched_job *job)
diff --git a/drivers/gpu/drm/nouveau/nouveau_exec.c b/drivers/gpu/drm/nouveau/nouveau_exec.c
index 41b7c608c9054869ddadfe17c96100266e44c254..edbbda78bac90432c4877aa39a9587cf976705c7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_exec.c
+++ b/drivers/gpu/drm/nouveau/nouveau_exec.c
@@ -189,7 +189,7 @@ nouveau_exec_job_timeout(struct nouveau_job *job)
NV_PRINTK(warn, job->cli, "job timeout, channel %d killed!\n",
chan->chid);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static const struct nouveau_job_ops nouveau_exec_job_ops = {
diff --git a/drivers/gpu/drm/nouveau/nouveau_sched.c b/drivers/gpu/drm/nouveau/nouveau_sched.c
index 460a5fb024129a0557f2b55008278e1378019d89..e60f7892f5ce9aff0c5fa1908c1a0445891927ed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sched.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sched.c
@@ -371,7 +371,7 @@ nouveau_sched_timedout_job(struct drm_sched_job *sched_job)
{
struct drm_gpu_scheduler *sched = sched_job->sched;
struct nouveau_job *job = to_nouveau_job(sched_job);
- enum drm_gpu_sched_stat stat = DRM_GPU_SCHED_STAT_NOMINAL;
+ enum drm_gpu_sched_stat stat = DRM_GPU_SCHED_STAT_RESET;
drm_sched_stop(sched, sched_job);
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
index 5657106c2f7d0a0ca6162850767f58f3200cce13..afcffe7f8fe9e11f84e4ab7e8f5a72f7bf583690 100644
--- a/drivers/gpu/drm/panfrost/panfrost_job.c
+++ b/drivers/gpu/drm/panfrost/panfrost_job.c
@@ -755,7 +755,7 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job
* spurious. Bail out.
*/
if (dma_fence_is_signaled(job->done_fence))
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
/*
* Panfrost IRQ handler may take a long time to process an interrupt
@@ -770,7 +770,7 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job
if (dma_fence_is_signaled(job->done_fence)) {
dev_warn(pfdev->dev, "unexpectedly high interrupt latency\n");
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
dev_err(pfdev->dev, "gpu sched timeout, js=%d, config=0x%x, status=0x%x, head=0x%x, tail=0x%x, sched_job=%p",
@@ -786,7 +786,7 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job
atomic_set(&pfdev->reset.pending, 1);
panfrost_reset(pfdev, sched_job);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void panfrost_reset_work(struct work_struct *work)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
index b39ea6acc6a9681f2ffa7d52248b6d2c119d1f1b..d0ae462015510bd0c25aaffc059d28084e600372 100644
--- a/drivers/gpu/drm/panthor/panthor_mmu.c
+++ b/drivers/gpu/drm/panthor/panthor_mmu.c
@@ -2270,7 +2270,7 @@ static enum drm_gpu_sched_stat
panthor_vm_bind_timedout_job(struct drm_sched_job *sched_job)
{
WARN(1, "VM_BIND ops are synchronous for now, there should be no timeout!");
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static const struct drm_sched_backend_ops panthor_vm_bind_ops = {
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c
index a2248f692a030c1c84869b9a1948ad1cb0c0b490..8f17394cc82aad9eaf01e473cd9d3dea46fa3d61 100644
--- a/drivers/gpu/drm/panthor/panthor_sched.c
+++ b/drivers/gpu/drm/panthor/panthor_sched.c
@@ -3241,7 +3241,7 @@ queue_timedout_job(struct drm_sched_job *sched_job)
queue_start(queue);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void queue_free_job(struct drm_sched_job *sched_job)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 648b5d2feff886bc12e81af3c35335fa4e5dd050..0f32e2cb43d6af294408968a970990f9f5c47bee 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -535,7 +535,7 @@ static void drm_sched_job_timedout(struct work_struct *work)
{
struct drm_gpu_scheduler *sched;
struct drm_sched_job *job;
- enum drm_gpu_sched_stat status = DRM_GPU_SCHED_STAT_NOMINAL;
+ enum drm_gpu_sched_stat status = DRM_GPU_SCHED_STAT_RESET;
sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work);
diff --git a/drivers/gpu/drm/scheduler/tests/mock_scheduler.c b/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
index 49d067fecd67f705f7a7b957ce04699e3cc7af76..998162202972eb5919dfff4c8784ecc22c00ec9d 100644
--- a/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
+++ b/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
@@ -231,7 +231,7 @@ mock_sched_timedout_job(struct drm_sched_job *sched_job)
drm_sched_job_cleanup(sched_job);
/* Mock job itself is freed by the kunit framework. */
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void mock_sched_free_job(struct drm_sched_job *sched_job)
diff --git a/drivers/gpu/drm/v3d/v3d_sched.c b/drivers/gpu/drm/v3d/v3d_sched.c
index 42df9d3567e79e54bf16045f31d8785d0c765670..ebbafedef952a575a3ec2e690c1391d3385782a1 100644
--- a/drivers/gpu/drm/v3d/v3d_sched.c
+++ b/drivers/gpu/drm/v3d/v3d_sched.c
@@ -745,7 +745,7 @@ v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job *sched_job)
mutex_unlock(&v3d->reset_lock);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void
@@ -777,7 +777,7 @@ v3d_cl_job_timedout(struct drm_sched_job *sched_job, enum v3d_queue q,
*timedout_ctra = ctra;
v3d_sched_skip_reset(sched_job);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
return v3d_gpu_reset_for_timeout(v3d, sched_job);
@@ -823,7 +823,7 @@ v3d_csd_job_timedout(struct drm_sched_job *sched_job)
job->timedout_batches = batches;
v3d_sched_skip_reset(sched_job);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
return v3d_gpu_reset_for_timeout(v3d, sched_job);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 5f91b9a6ab7d73aa1dceede7a76919fa36a194a8..1430b58d096b03a78292e523e3ee7c5dddd7efdd 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1097,7 +1097,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
xe_sched_add_pending_job(sched, job);
xe_sched_submission_start(sched);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
/* Kill the run_job entry point */
@@ -1267,7 +1267,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
/* Start fence signaling */
xe_hw_fence_irq_start(q->fence_irq);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
sched_enable:
enable_scheduling(q);
@@ -1280,7 +1280,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
xe_sched_add_pending_job(sched, job);
xe_sched_submission_start(sched);
- return DRM_GPU_SCHED_STAT_NOMINAL;
+ return DRM_GPU_SCHED_STAT_RESET;
}
static void __guc_exec_queue_fini_async(struct work_struct *w)
diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
index e62a7214e05217d72de5c6e5168544d47099090a..83e5c00d8dd9a83ab20547a93d6fc572de97616e 100644
--- a/include/drm/gpu_scheduler.h
+++ b/include/drm/gpu_scheduler.h
@@ -391,12 +391,12 @@ struct drm_sched_job {
* enum drm_gpu_sched_stat - the scheduler's status
*
* @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
- * @DRM_GPU_SCHED_STAT_NOMINAL: Operation succeeded.
+ * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
* @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
*/
enum drm_gpu_sched_stat {
DRM_GPU_SCHED_STAT_NONE,
- DRM_GPU_SCHED_STAT_NOMINAL,
+ DRM_GPU_SCHED_STAT_RESET,
DRM_GPU_SCHED_STAT_ENODEV,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
2025-07-08 13:25 ` [PATCH v5 1/8] drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-09 13:08 ` Philipp Stanner
2025-07-11 13:22 ` Christian König
2025-07-08 13:25 ` [PATCH v5 3/8] drm/sched: Make timeout KUnit tests faster Maíra Canal
` (10 subsequent siblings)
12 siblings, 2 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
When the DRM scheduler times out, it's possible that the GPU isn't hung;
instead, a job just took unusually long (longer than the timeout) but is
still running, and there is, thus, no reason to reset the hardware. This
can occur in two scenarios:
1. The job is taking longer than the timeout, but the driver determined
through a GPU-specific mechanism that the hardware is still making
progress. Hence, the driver would like the scheduler to skip the
timeout and treat the job as still pending from then onward. This
happens in v3d, Etnaviv, and Xe.
2. Timeout has fired before the free-job worker. Consequently, the
scheduler calls `sched->ops->timedout_job()` for a job that isn't
timed out.
These two scenarios are problematic because the job was removed from the
`sched->pending_list` before calling `sched->ops->timedout_job()`, which
means that when the job finishes, it won't be freed by the scheduler
though `sched->ops->free_job()` - leading to a memory leak.
To solve these problems, create a new `drm_gpu_sched_stat`, called
DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
new status will indicate that the job must be reinserted into
`sched->pending_list`, and the hardware / driver will still complete that
job.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
---
drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
include/drm/gpu_scheduler.h | 3 +++
2 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
{
struct drm_sched_job *job;
- spin_lock(&sched->job_list_lock);
job = list_first_entry_or_null(&sched->pending_list,
struct drm_sched_job, list);
if (job && dma_fence_is_signaled(&job->s_fence->finished))
__drm_sched_run_free_queue(sched);
+}
+
+static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
+{
+ spin_lock(&sched->job_list_lock);
+ drm_sched_run_free_queue(sched);
spin_unlock(&sched->job_list_lock);
}
@@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
spin_unlock(&sched->job_list_lock);
}
+/**
+ * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
+ * @sched: scheduler instance
+ * @job: job to be reinserted on the pending list
+ *
+ * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
+ * hung and is making progress, the scheduler must reinsert the job back into
+ * @sched->pending_list. Otherwise, the job and its resources won't be freed
+ * through the &struct drm_sched_backend_ops.free_job callback.
+ *
+ * This function must be used in "false timeout" cases only.
+ */
+static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
+ struct drm_sched_job *job)
+{
+ spin_lock(&sched->job_list_lock);
+ list_add(&job->list, &sched->pending_list);
+
+ /* After reinserting the job, the scheduler enqueues the free-job work
+ * again if ready. Otherwise, a signaled job could be added to the
+ * pending list, but never freed.
+ */
+ drm_sched_run_free_queue(sched);
+ spin_unlock(&sched->job_list_lock);
+}
+
static void drm_sched_job_timedout(struct work_struct *work)
{
struct drm_gpu_scheduler *sched;
@@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
job->sched->ops->free_job(job);
sched->free_guilty = false;
}
+
+ if (status == DRM_GPU_SCHED_STAT_NO_HANG)
+ drm_sched_job_reinsert_on_false_timeout(sched, job);
} else {
spin_unlock(&sched->job_list_lock);
}
@@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
* This function is typically used for reset recovery (see the docu of
* drm_sched_backend_ops.timedout_job() for details). Do not call it for
* scheduler teardown, i.e., before calling drm_sched_fini().
+ *
+ * As it's only used for reset recovery, drivers must not call this function
+ * in their &struct drm_sched_backend_ops.timedout_job callback when they
+ * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
*/
void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
{
@@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
* drm_sched_backend_ops.timedout_job() for details). Do not call it for
* scheduler startup. The scheduler itself is fully operational after
* drm_sched_init() succeeded.
+ *
+ * As it's only used for reset recovery, drivers must not call this function
+ * in their &struct drm_sched_backend_ops.timedout_job callback when they
+ * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
*/
void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
{
@@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
if (job)
sched->ops->free_job(job);
- drm_sched_run_free_queue(sched);
+ drm_sched_run_free_queue_unlocked(sched);
drm_sched_run_job_queue(sched);
}
diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
--- a/include/drm/gpu_scheduler.h
+++ b/include/drm/gpu_scheduler.h
@@ -393,11 +393,14 @@ struct drm_sched_job {
* @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
* @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
* @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
+ * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
+ * did not hang and is still running.
*/
enum drm_gpu_sched_stat {
DRM_GPU_SCHED_STAT_NONE,
DRM_GPU_SCHED_STAT_RESET,
DRM_GPU_SCHED_STAT_ENODEV,
+ DRM_GPU_SCHED_STAT_NO_HANG,
};
/**
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 3/8] drm/sched: Make timeout KUnit tests faster
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
2025-07-08 13:25 ` [PATCH v5 1/8] drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET Maíra Canal
2025-07-08 13:25 ` [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 4/8] drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (9 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
As more KUnit tests are introduced to evaluate the basic capabilities of
the `timedout_job()` hook, the test suite will continue to increase in
duration. To reduce the overall running time of the test suite, decrease
the scheduler's timeout for the timeout tests.
Before this commit:
[15:42:26] Elapsed time: 15.637s total, 0.002s configuring, 10.387s building, 5.229s running
After this commit:
[15:45:26] Elapsed time: 9.263s total, 0.002s configuring, 5.168s building, 4.037s running
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Acked-by: Philipp Stanner <phasta@kernel.org>
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/tests/tests_basic.c b/drivers/gpu/drm/scheduler/tests/tests_basic.c
index 7230057e0594c6246f02608f07fcb1f8d738ac75..41c648782f4548e202bd8711b45d28eead9bd0b2 100644
--- a/drivers/gpu/drm/scheduler/tests/tests_basic.c
+++ b/drivers/gpu/drm/scheduler/tests/tests_basic.c
@@ -5,6 +5,8 @@
#include "sched_tests.h"
+#define MOCK_TIMEOUT (HZ / 5)
+
/*
* DRM scheduler basic tests should check the basic functional correctness of
* the scheduler, including some very light smoke testing. More targeted tests,
@@ -28,7 +30,7 @@ static void drm_sched_basic_exit(struct kunit *test)
static int drm_sched_timeout_init(struct kunit *test)
{
- test->priv = drm_mock_sched_new(test, HZ);
+ test->priv = drm_mock_sched_new(test, MOCK_TIMEOUT);
return 0;
}
@@ -227,14 +229,14 @@ static void drm_sched_basic_timeout(struct kunit *test)
done = drm_mock_sched_job_wait_scheduled(job, HZ);
KUNIT_ASSERT_TRUE(test, done);
- done = drm_mock_sched_job_wait_finished(job, HZ / 2);
+ done = drm_mock_sched_job_wait_finished(job, MOCK_TIMEOUT / 2);
KUNIT_ASSERT_FALSE(test, done);
KUNIT_ASSERT_EQ(test,
job->flags & DRM_MOCK_SCHED_JOB_TIMEDOUT,
0);
- done = drm_mock_sched_job_wait_finished(job, HZ);
+ done = drm_mock_sched_job_wait_finished(job, MOCK_TIMEOUT);
KUNIT_ASSERT_FALSE(test, done);
KUNIT_ASSERT_EQ(test,
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 4/8] drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (2 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 3/8] drm/sched: Make timeout KUnit tests faster Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 5/8] drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset Maíra Canal
` (8 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
Add a test to submit a single job against a scheduler with the timeout
configured and verify that if the job is still running, the timeout
handler will skip the reset and allow the job to complete.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Philipp Stanner <phasta@kernel.org>
---
drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 5 +++
drivers/gpu/drm/scheduler/tests/sched_tests.h | 1 +
drivers/gpu/drm/scheduler/tests/tests_basic.c | 47 ++++++++++++++++++++++++
3 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/scheduler/tests/mock_scheduler.c b/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
index 998162202972eb5919dfff4c8784ecc22c00ec9d..b3b33f85b7ae30c8e6bba97866a74978b0a96fa7 100644
--- a/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
+++ b/drivers/gpu/drm/scheduler/tests/mock_scheduler.c
@@ -231,6 +231,11 @@ mock_sched_timedout_job(struct drm_sched_job *sched_job)
drm_sched_job_cleanup(sched_job);
/* Mock job itself is freed by the kunit framework. */
+ if (job->flags & DRM_MOCK_SCHED_JOB_DONT_RESET) {
+ job->flags &= ~DRM_MOCK_SCHED_JOB_DONT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
+ }
+
return DRM_GPU_SCHED_STAT_RESET;
}
diff --git a/drivers/gpu/drm/scheduler/tests/sched_tests.h b/drivers/gpu/drm/scheduler/tests/sched_tests.h
index fbba38137f0c324cf2472fe5b3a8a78ec016e829..4adf961e1930203fe94241a8a0ae5f7817874a39 100644
--- a/drivers/gpu/drm/scheduler/tests/sched_tests.h
+++ b/drivers/gpu/drm/scheduler/tests/sched_tests.h
@@ -98,6 +98,7 @@ struct drm_mock_sched_job {
#define DRM_MOCK_SCHED_JOB_DONE 0x1
#define DRM_MOCK_SCHED_JOB_TIMEDOUT 0x2
+#define DRM_MOCK_SCHED_JOB_DONT_RESET 0x4
unsigned long flags;
struct list_head link;
diff --git a/drivers/gpu/drm/scheduler/tests/tests_basic.c b/drivers/gpu/drm/scheduler/tests/tests_basic.c
index 41c648782f4548e202bd8711b45d28eead9bd0b2..91c0449590ed24c3da18ab7d930cca47d7c317c7 100644
--- a/drivers/gpu/drm/scheduler/tests/tests_basic.c
+++ b/drivers/gpu/drm/scheduler/tests/tests_basic.c
@@ -246,8 +246,55 @@ static void drm_sched_basic_timeout(struct kunit *test)
drm_mock_sched_entity_free(entity);
}
+static void drm_sched_skip_reset(struct kunit *test)
+{
+ struct drm_mock_scheduler *sched = test->priv;
+ struct drm_mock_sched_entity *entity;
+ struct drm_mock_sched_job *job;
+ unsigned int i;
+ bool done;
+
+ /*
+ * Submit a single job against a scheduler with the timeout configured
+ * and verify that if the job is still running, the timeout handler
+ * will skip the reset and allow the job to complete.
+ */
+
+ entity = drm_mock_sched_entity_new(test,
+ DRM_SCHED_PRIORITY_NORMAL,
+ sched);
+ job = drm_mock_sched_job_new(test, entity);
+
+ job->flags = DRM_MOCK_SCHED_JOB_DONT_RESET;
+
+ drm_mock_sched_job_submit(job);
+
+ done = drm_mock_sched_job_wait_scheduled(job, HZ);
+ KUNIT_ASSERT_TRUE(test, done);
+
+ done = drm_mock_sched_job_wait_finished(job, 2 * MOCK_TIMEOUT);
+ KUNIT_ASSERT_FALSE(test, done);
+
+ KUNIT_ASSERT_EQ(test,
+ job->flags & DRM_MOCK_SCHED_JOB_TIMEDOUT,
+ DRM_MOCK_SCHED_JOB_TIMEDOUT);
+
+ KUNIT_ASSERT_EQ(test,
+ job->flags & DRM_MOCK_SCHED_JOB_DONT_RESET,
+ 0);
+
+ i = drm_mock_sched_advance(sched, 1);
+ KUNIT_ASSERT_EQ(test, i, 1);
+
+ done = drm_mock_sched_job_wait_finished(job, HZ);
+ KUNIT_ASSERT_TRUE(test, done);
+
+ drm_mock_sched_entity_free(entity);
+}
+
static struct kunit_case drm_sched_timeout_tests[] = {
KUNIT_CASE(drm_sched_basic_timeout),
+ KUNIT_CASE(drm_sched_skip_reset),
{}
};
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 5/8] drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (3 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 4/8] drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 6/8] drm/etnaviv: " Maíra Canal
` (7 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
When a CL/CSD job times out, we check if the GPU has made any progress
since the last timeout. If so, instead of resetting the hardware, we skip
the reset and allow the timer to be rearmed. This gives long-running jobs
a chance to complete.
Instead of manipulating scheduler's internals, inform the scheduler that
the job did not actually timeout and no reset was performed through
the new status code DRM_GPU_SCHED_STAT_NO_HANG.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/v3d/v3d_sched.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_sched.c b/drivers/gpu/drm/v3d/v3d_sched.c
index ebbafedef952a575a3ec2e690c1391d3385782a1..cb9df8822472a4602a5cf7a029ee2ca0a9abc28c 100644
--- a/drivers/gpu/drm/v3d/v3d_sched.c
+++ b/drivers/gpu/drm/v3d/v3d_sched.c
@@ -748,16 +748,6 @@ v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job *sched_job)
return DRM_GPU_SCHED_STAT_RESET;
}
-static void
-v3d_sched_skip_reset(struct drm_sched_job *sched_job)
-{
- struct drm_gpu_scheduler *sched = sched_job->sched;
-
- spin_lock(&sched->job_list_lock);
- list_add(&sched_job->list, &sched->pending_list);
- spin_unlock(&sched->job_list_lock);
-}
-
static enum drm_gpu_sched_stat
v3d_cl_job_timedout(struct drm_sched_job *sched_job, enum v3d_queue q,
u32 *timedout_ctca, u32 *timedout_ctra)
@@ -776,8 +766,7 @@ v3d_cl_job_timedout(struct drm_sched_job *sched_job, enum v3d_queue q,
*timedout_ctca = ctca;
*timedout_ctra = ctra;
- v3d_sched_skip_reset(sched_job);
- return DRM_GPU_SCHED_STAT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
}
return v3d_gpu_reset_for_timeout(v3d, sched_job);
@@ -822,8 +811,7 @@ v3d_csd_job_timedout(struct drm_sched_job *sched_job)
if (job->timedout_batches != batches) {
job->timedout_batches = batches;
- v3d_sched_skip_reset(sched_job);
- return DRM_GPU_SCHED_STAT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
}
return v3d_gpu_reset_for_timeout(v3d, sched_job);
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 6/8] drm/etnaviv: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (4 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 5/8] drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 7/8] drm/xe: " Maíra Canal
` (6 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
Etnaviv can skip a hardware reset in two situations:
1. TDR has fired before the free-job worker and the timeout is spurious.
2. The GPU is still making progress on the front-end and we can give
the job a chance to complete.
Instead of manipulating scheduler's internals, inform the scheduler that
the job did not actually timeout and no reset was performed through
the new status code DRM_GPU_SCHED_STAT_NO_HANG.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index 030e6c3233bed9edd5d9c2f49f842f604e57fc1c..46f5391e84a12232b247886cf1311f8e09f42f04 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -35,17 +35,16 @@ static enum drm_gpu_sched_stat etnaviv_sched_timedout_job(struct drm_sched_job
*sched_job)
{
struct etnaviv_gem_submit *submit = to_etnaviv_submit(sched_job);
- struct drm_gpu_scheduler *sched = sched_job->sched;
struct etnaviv_gpu *gpu = submit->gpu;
u32 dma_addr, primid = 0;
int change;
/*
- * If the GPU managed to complete this jobs fence, the timout is
- * spurious. Bail out.
+ * If the GPU managed to complete this jobs fence, the timeout has
+ * fired before free-job worker. The timeout is spurious, so bail out.
*/
if (dma_fence_is_signaled(submit->out_fence))
- goto out_no_timeout;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
/*
* If the GPU is still making forward progress on the front-end (which
@@ -71,7 +70,7 @@ static enum drm_gpu_sched_stat etnaviv_sched_timedout_job(struct drm_sched_job
gpu->hangcheck_dma_addr = dma_addr;
gpu->hangcheck_primid = primid;
gpu->hangcheck_fence = gpu->completed_fence;
- goto out_no_timeout;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
}
/* block scheduler */
@@ -87,12 +86,7 @@ static enum drm_gpu_sched_stat etnaviv_sched_timedout_job(struct drm_sched_job
drm_sched_resubmit_jobs(&gpu->sched);
drm_sched_start(&gpu->sched, 0);
- return DRM_GPU_SCHED_STAT_RESET;
-out_no_timeout:
- spin_lock(&sched->job_list_lock);
- list_add(&sched_job->list, &sched->pending_list);
- spin_unlock(&sched->job_list_lock);
return DRM_GPU_SCHED_STAT_RESET;
}
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (5 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 6/8] drm/etnaviv: " Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 18:35 ` Matthew Brost
2025-07-08 13:25 ` [PATCH v5 8/8] drm/panfrost: " Maíra Canal
` (5 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
Xe can skip the reset if TDR has fired before the free job worker and can
also re-arm the timeout timer in some scenarios. Instead of manipulating
scheduler's internals, inform the scheduler that the job did not actually
timeout and no reset was performed through the new status code
DRM_GPU_SCHED_STAT_NO_HANG.
Note that, in the first case, there is no need to restart submission if it
hasn't been stopped.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 1430b58d096b03a78292e523e3ee7c5dddd7efdd..cafb47711e9b3fab3b4b4197965835197caabe9b 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1093,12 +1093,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
* list so job can be freed and kick scheduler ensuring free job is not
* lost.
*/
- if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags)) {
- xe_sched_add_pending_job(sched, job);
- xe_sched_submission_start(sched);
-
- return DRM_GPU_SCHED_STAT_RESET;
- }
+ if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags))
+ return DRM_GPU_SCHED_STAT_NO_HANG;
/* Kill the run_job entry point */
xe_sched_submission_stop(sched);
@@ -1277,10 +1273,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
* but there is not currently an easy way to do in DRM scheduler. With
* some thought, do this in a follow up.
*/
- xe_sched_add_pending_job(sched, job);
xe_sched_submission_start(sched);
-
- return DRM_GPU_SCHED_STAT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
}
static void __guc_exec_queue_fini_async(struct work_struct *w)
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 8/8] drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (6 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 7/8] drm/xe: " Maíra Canal
@ 2025-07-08 13:25 ` Maíra Canal
2025-07-08 15:33 ` ✗ CI.checkpatch: warning for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4) Patchwork
` (4 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-08 13:25 UTC (permalink / raw)
To: Matthew Brost, Danilo Krummrich, Philipp Stanner,
Christian König, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Maíra Canal
Panfrost can skip the reset if TDR has fired before the free-job worker.
Currently, since Panfrost doesn't take any action on these scenarios, the
job is being leaked, considering that `free_job()` won't be called.
To avoid such leaks, inform the scheduler that the job did not actually
timeout and no reset was performed through the new status code
DRM_GPU_SCHED_STAT_NO_HANG.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Steven Price <steven.price@arm.com>
---
drivers/gpu/drm/panfrost/panfrost_job.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
index afcffe7f8fe9e11f84e4ab7e8f5a72f7bf583690..842e012cdc68e130a13e08ffae3b7fdf5f8e1acc 100644
--- a/drivers/gpu/drm/panfrost/panfrost_job.c
+++ b/drivers/gpu/drm/panfrost/panfrost_job.c
@@ -751,11 +751,11 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job
int js = panfrost_job_get_slot(job);
/*
- * If the GPU managed to complete this jobs fence, the timeout is
- * spurious. Bail out.
+ * If the GPU managed to complete this jobs fence, the timeout has
+ * fired before free-job worker. The timeout is spurious, so bail out.
*/
if (dma_fence_is_signaled(job->done_fence))
- return DRM_GPU_SCHED_STAT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
/*
* Panfrost IRQ handler may take a long time to process an interrupt
@@ -770,7 +770,7 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job
if (dma_fence_is_signaled(job->done_fence)) {
dev_warn(pfdev->dev, "unexpectedly high interrupt latency\n");
- return DRM_GPU_SCHED_STAT_RESET;
+ return DRM_GPU_SCHED_STAT_NO_HANG;
}
dev_err(pfdev->dev, "gpu sched timeout, js=%d, config=0x%x, status=0x%x, head=0x%x, tail=0x%x, sched_job=%p",
--
2.50.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* ✗ CI.checkpatch: warning for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (7 preceding siblings ...)
2025-07-08 13:25 ` [PATCH v5 8/8] drm/panfrost: " Maíra Canal
@ 2025-07-08 15:33 ` Patchwork
2025-07-08 15:34 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-07-08 15:33 UTC (permalink / raw)
To: Maíra Canal; +Cc: intel-xe
== Series Details ==
Series: drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
URL : https://patchwork.freedesktop.org/series/149696/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
43254c2aa575037fc031c7ac21b0d031c700b2bf
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit bf9623d3b5d3a0aaa6d840733a2a3fb8704d595a
Author: Maíra Canal <mcanal@igalia.com>
Date: Tue Jul 8 10:25:48 2025 -0300
drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
Panfrost can skip the reset if TDR has fired before the free-job worker.
Currently, since Panfrost doesn't take any action on these scenarios, the
job is being leaked, considering that `free_job()` won't be called.
To avoid such leaks, inform the scheduler that the job did not actually
timeout and no reset was performed through the new status code
DRM_GPU_SCHED_STAT_NO_HANG.
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Steven Price <steven.price@arm.com>
+ /mt/dim checkpatch a47871d8948c3cd802af1ee3684799cc798067d8 drm-intel
5da8124cfdcf drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
31a35e5254f4 drm/sched: Allow drivers to skip the reset and keep on running
b3398ab45c08 drm/sched: Make timeout KUnit tests faster
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#16:
[15:42:26] Elapsed time: 15.637s total, 0.002s configuring, 10.387s building, 5.229s running
total: 0 errors, 1 warnings, 0 checks, 32 lines checked
60cad55c3f89 drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG
62be011678a2 drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
dbccd2c25038 drm/etnaviv: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
95347bd1b3b1 drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
bf9623d3b5d3 drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✓ CI.KUnit: success for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (8 preceding siblings ...)
2025-07-08 15:33 ` ✗ CI.checkpatch: warning for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4) Patchwork
@ 2025-07-08 15:34 ` Patchwork
2025-07-08 16:22 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
12 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-07-08 15:34 UTC (permalink / raw)
To: Maíra Canal; +Cc: intel-xe
== Series Details ==
Series: drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
URL : https://patchwork.freedesktop.org/series/149696/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:33:14] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:33:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:33:45] Starting KUnit Kernel (1/1)...
[15:33:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:33:45] ================== guc_buf (11 subtests) ===================
[15:33:45] [PASSED] test_smallest
[15:33:45] [PASSED] test_largest
[15:33:45] [PASSED] test_granular
[15:33:45] [PASSED] test_unique
[15:33:45] [PASSED] test_overlap
[15:33:45] [PASSED] test_reusable
[15:33:45] [PASSED] test_too_big
[15:33:45] [PASSED] test_flush
[15:33:45] [PASSED] test_lookup
[15:33:45] [PASSED] test_data
[15:33:45] [PASSED] test_class
[15:33:45] ===================== [PASSED] guc_buf =====================
[15:33:45] =================== guc_dbm (7 subtests) ===================
[15:33:45] [PASSED] test_empty
[15:33:45] [PASSED] test_default
[15:33:45] ======================== test_size ========================
[15:33:45] [PASSED] 4
[15:33:45] [PASSED] 8
[15:33:45] [PASSED] 32
[15:33:45] [PASSED] 256
[15:33:45] ==================== [PASSED] test_size ====================
[15:33:45] ======================= test_reuse ========================
[15:33:45] [PASSED] 4
[15:33:45] [PASSED] 8
[15:33:45] [PASSED] 32
[15:33:45] [PASSED] 256
[15:33:45] =================== [PASSED] test_reuse ====================
[15:33:45] =================== test_range_overlap ====================
[15:33:45] [PASSED] 4
[15:33:45] [PASSED] 8
[15:33:45] [PASSED] 32
[15:33:45] [PASSED] 256
[15:33:45] =============== [PASSED] test_range_overlap ================
[15:33:45] =================== test_range_compact ====================
[15:33:45] [PASSED] 4
[15:33:45] [PASSED] 8
[15:33:45] [PASSED] 32
[15:33:45] [PASSED] 256
[15:33:45] =============== [PASSED] test_range_compact ================
[15:33:45] ==================== test_range_spare =====================
[15:33:45] [PASSED] 4
[15:33:45] [PASSED] 8
[15:33:45] [PASSED] 32
[15:33:45] [PASSED] 256
[15:33:45] ================ [PASSED] test_range_spare =================
[15:33:45] ===================== [PASSED] guc_dbm =====================
[15:33:45] =================== guc_idm (6 subtests) ===================
[15:33:45] [PASSED] bad_init
[15:33:45] [PASSED] no_init
[15:33:45] [PASSED] init_fini
[15:33:45] [PASSED] check_used
[15:33:46] [PASSED] check_quota
[15:33:46] [PASSED] check_all
[15:33:46] ===================== [PASSED] guc_idm =====================
[15:33:46] ================== no_relay (3 subtests) ===================
[15:33:46] [PASSED] xe_drops_guc2pf_if_not_ready
[15:33:46] [PASSED] xe_drops_guc2vf_if_not_ready
[15:33:46] [PASSED] xe_rejects_send_if_not_ready
[15:33:46] ==================== [PASSED] no_relay =====================
[15:33:46] ================== pf_relay (14 subtests) ==================
[15:33:46] [PASSED] pf_rejects_guc2pf_too_short
[15:33:46] [PASSED] pf_rejects_guc2pf_too_long
[15:33:46] [PASSED] pf_rejects_guc2pf_no_payload
[15:33:46] [PASSED] pf_fails_no_payload
[15:33:46] [PASSED] pf_fails_bad_origin
[15:33:46] [PASSED] pf_fails_bad_type
[15:33:46] [PASSED] pf_txn_reports_error
[15:33:46] [PASSED] pf_txn_sends_pf2guc
[15:33:46] [PASSED] pf_sends_pf2guc
[15:33:46] [SKIPPED] pf_loopback_nop
[15:33:46] [SKIPPED] pf_loopback_echo
[15:33:46] [SKIPPED] pf_loopback_fail
[15:33:46] [SKIPPED] pf_loopback_busy
[15:33:46] [SKIPPED] pf_loopback_retry
[15:33:46] ==================== [PASSED] pf_relay =====================
[15:33:46] ================== vf_relay (3 subtests) ===================
[15:33:46] [PASSED] vf_rejects_guc2vf_too_short
[15:33:46] [PASSED] vf_rejects_guc2vf_too_long
[15:33:46] [PASSED] vf_rejects_guc2vf_no_payload
[15:33:46] ==================== [PASSED] vf_relay =====================
[15:33:46] ================= pf_service (11 subtests) =================
[15:33:46] [PASSED] pf_negotiate_any
[15:33:46] [PASSED] pf_negotiate_base_match
[15:33:46] [PASSED] pf_negotiate_base_newer
[15:33:46] [PASSED] pf_negotiate_base_next
[15:33:46] [SKIPPED] pf_negotiate_base_older
[15:33:46] [PASSED] pf_negotiate_base_prev
[15:33:46] [PASSED] pf_negotiate_latest_match
[15:33:46] [PASSED] pf_negotiate_latest_newer
[15:33:46] [PASSED] pf_negotiate_latest_next
[15:33:46] [SKIPPED] pf_negotiate_latest_older
[15:33:46] [SKIPPED] pf_negotiate_latest_prev
[15:33:46] =================== [PASSED] pf_service ====================
[15:33:46] ===================== lmtt (1 subtest) =====================
[15:33:46] ======================== test_ops =========================
[15:33:46] [PASSED] 2-level
[15:33:46] [PASSED] multi-level
[15:33:46] ==================== [PASSED] test_ops =====================
[15:33:46] ====================== [PASSED] lmtt =======================
[15:33:46] =================== xe_mocs (2 subtests) ===================
[15:33:46] ================ xe_live_mocs_kernel_kunit ================
[15:33:46] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:33:46] ================ xe_live_mocs_reset_kunit =================
[15:33:46] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:33:46] ==================== [SKIPPED] xe_mocs =====================
[15:33:46] ================= xe_migrate (2 subtests) ==================
[15:33:46] ================= xe_migrate_sanity_kunit =================
[15:33:46] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:33:46] ================== xe_validate_ccs_kunit ==================
[15:33:46] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:33:46] =================== [SKIPPED] xe_migrate ===================
[15:33:46] ================== xe_dma_buf (1 subtest) ==================
[15:33:46] ==================== xe_dma_buf_kunit =====================
[15:33:46] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:33:46] =================== [SKIPPED] xe_dma_buf ===================
[15:33:46] ================= xe_bo_shrink (1 subtest) =================
[15:33:46] =================== xe_bo_shrink_kunit ====================
[15:33:46] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:33:46] ================== [SKIPPED] xe_bo_shrink ==================
[15:33:46] ==================== xe_bo (2 subtests) ====================
[15:33:46] ================== xe_ccs_migrate_kunit ===================
[15:33:46] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:33:46] ==================== xe_bo_evict_kunit ====================
[15:33:46] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:33:46] ===================== [SKIPPED] xe_bo ======================
[15:33:46] ==================== args (11 subtests) ====================
[15:33:46] [PASSED] count_args_test
[15:33:46] [PASSED] call_args_example
[15:33:46] [PASSED] call_args_test
[15:33:46] [PASSED] drop_first_arg_example
[15:33:46] [PASSED] drop_first_arg_test
[15:33:46] [PASSED] first_arg_example
[15:33:46] [PASSED] first_arg_test
[15:33:46] [PASSED] last_arg_example
[15:33:46] [PASSED] last_arg_test
[15:33:46] [PASSED] pick_arg_example
[15:33:46] [PASSED] sep_comma_example
[15:33:46] ====================== [PASSED] args =======================
[15:33:46] =================== xe_pci (3 subtests) ====================
[15:33:46] ==================== check_graphics_ip ====================
[15:33:46] [PASSED] 12.70 Xe_LPG
[15:33:46] [PASSED] 12.71 Xe_LPG
[15:33:46] [PASSED] 12.74 Xe_LPG+
[15:33:46] [PASSED] 20.01 Xe2_HPG
[15:33:46] [PASSED] 20.02 Xe2_HPG
[15:33:46] [PASSED] 20.04 Xe2_LPG
[15:33:46] [PASSED] 30.00 Xe3_LPG
[15:33:46] [PASSED] 30.01 Xe3_LPG
[15:33:46] [PASSED] 30.03 Xe3_LPG
[15:33:46] ================ [PASSED] check_graphics_ip ================
[15:33:46] ===================== check_media_ip ======================
[15:33:46] [PASSED] 13.00 Xe_LPM+
[15:33:46] [PASSED] 13.01 Xe2_HPM
[15:33:46] [PASSED] 20.00 Xe2_LPM
[15:33:46] [PASSED] 30.00 Xe3_LPM
[15:33:46] [PASSED] 30.02 Xe3_LPM
[15:33:46] ================= [PASSED] check_media_ip ==================
[15:33:46] ================= check_platform_gt_count =================
[15:33:46] [PASSED] 0x9A60 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A68 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A70 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A40 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A49 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A59 (TIGERLAKE)
[15:33:46] [PASSED] 0x9A78 (TIGERLAKE)
[15:33:46] [PASSED] 0x9AC0 (TIGERLAKE)
[15:33:46] [PASSED] 0x9AC9 (TIGERLAKE)
[15:33:46] [PASSED] 0x9AD9 (TIGERLAKE)
[15:33:46] [PASSED] 0x9AF8 (TIGERLAKE)
[15:33:46] [PASSED] 0x4C80 (ROCKETLAKE)
[15:33:46] [PASSED] 0x4C8A (ROCKETLAKE)
[15:33:46] [PASSED] 0x4C8B (ROCKETLAKE)
[15:33:46] [PASSED] 0x4C8C (ROCKETLAKE)
[15:33:46] [PASSED] 0x4C90 (ROCKETLAKE)
[15:33:46] [PASSED] 0x4C9A (ROCKETLAKE)
[15:33:46] [PASSED] 0x4680 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4682 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4688 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x468A (ALDERLAKE_S)
[15:33:46] [PASSED] 0x468B (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4690 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4692 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4693 (ALDERLAKE_S)
[15:33:46] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46AA (ALDERLAKE_P)
[15:33:46] [PASSED] 0x462A (ALDERLAKE_P)
[15:33:46] [PASSED] 0x4626 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x4628 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:33:46] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:33:46] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:33:46] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:33:46] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:33:46] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:33:46] [PASSED] 0xA721 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA720 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:33:46] [PASSED] 0xA780 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA781 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA782 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA783 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA788 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA789 (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA78A (ALDERLAKE_S)
[15:33:46] [PASSED] 0xA78B (ALDERLAKE_S)
[15:33:46] [PASSED] 0x4905 (DG1)
[15:33:46] [PASSED] 0x4906 (DG1)
[15:33:46] [PASSED] 0x4907 (DG1)
[15:33:46] [PASSED] 0x4908 (DG1)
[15:33:46] [PASSED] 0x4909 (DG1)
[15:33:46] [PASSED] 0x56C0 (DG2)
[15:33:46] [PASSED] 0x56C2 (DG2)
[15:33:46] [PASSED] 0x56C1 (DG2)
[15:33:46] [PASSED] 0x7D51 (METEORLAKE)
[15:33:46] [PASSED] 0x7DD1 (METEORLAKE)
[15:33:46] [PASSED] 0x7D41 (METEORLAKE)
[15:33:46] [PASSED] 0x7D67 (METEORLAKE)
[15:33:46] [PASSED] 0xB640 (METEORLAKE)
[15:33:46] [PASSED] 0x56A0 (DG2)
[15:33:46] [PASSED] 0x56A1 (DG2)
[15:33:46] [PASSED] 0x56A2 (DG2)
[15:33:46] [PASSED] 0x56BE (DG2)
[15:33:46] [PASSED] 0x56BF (DG2)
[15:33:46] [PASSED] 0x5690 (DG2)
[15:33:46] [PASSED] 0x5691 (DG2)
[15:33:46] [PASSED] 0x5692 (DG2)
[15:33:46] [PASSED] 0x56A5 (DG2)
[15:33:46] [PASSED] 0x56A6 (DG2)
[15:33:46] [PASSED] 0x56B0 (DG2)
[15:33:46] [PASSED] 0x56B1 (DG2)
[15:33:46] [PASSED] 0x56BA (DG2)
[15:33:46] [PASSED] 0x56BB (DG2)
[15:33:46] [PASSED] 0x56BC (DG2)
[15:33:46] [PASSED] 0x56BD (DG2)
[15:33:46] [PASSED] 0x5693 (DG2)
[15:33:46] [PASSED] 0x5694 (DG2)
[15:33:46] [PASSED] 0x5695 (DG2)
[15:33:46] [PASSED] 0x56A3 (DG2)
[15:33:46] [PASSED] 0x56A4 (DG2)
[15:33:46] [PASSED] 0x56B2 (DG2)
[15:33:46] [PASSED] 0x56B3 (DG2)
[15:33:46] [PASSED] 0x5696 (DG2)
[15:33:46] [PASSED] 0x5697 (DG2)
[15:33:46] [PASSED] 0xB69 (PVC)
[15:33:46] [PASSED] 0xB6E (PVC)
[15:33:46] [PASSED] 0xBD4 (PVC)
[15:33:46] [PASSED] 0xBD5 (PVC)
[15:33:46] [PASSED] 0xBD6 (PVC)
[15:33:46] [PASSED] 0xBD7 (PVC)
[15:33:46] [PASSED] 0xBD8 (PVC)
[15:33:46] [PASSED] 0xBD9 (PVC)
[15:33:46] [PASSED] 0xBDA (PVC)
[15:33:46] [PASSED] 0xBDB (PVC)
[15:33:46] [PASSED] 0xBE0 (PVC)
[15:33:46] [PASSED] 0xBE1 (PVC)
[15:33:46] [PASSED] 0xBE5 (PVC)
[15:33:46] [PASSED] 0x7D40 (METEORLAKE)
[15:33:46] [PASSED] 0x7D45 (METEORLAKE)
[15:33:46] [PASSED] 0x7D55 (METEORLAKE)
[15:33:46] [PASSED] 0x7D60 (METEORLAKE)
[15:33:46] [PASSED] 0x7DD5 (METEORLAKE)
[15:33:46] [PASSED] 0x6420 (LUNARLAKE)
[15:33:46] [PASSED] 0x64A0 (LUNARLAKE)
[15:33:46] [PASSED] 0x64B0 (LUNARLAKE)
[15:33:46] [PASSED] 0xE202 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE209 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE20B (BATTLEMAGE)
[15:33:46] [PASSED] 0xE20C (BATTLEMAGE)
[15:33:46] [PASSED] 0xE20D (BATTLEMAGE)
[15:33:46] [PASSED] 0xE210 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE211 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE212 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE216 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE220 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE221 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE222 (BATTLEMAGE)
[15:33:46] [PASSED] 0xE223 (BATTLEMAGE)
[15:33:46] [PASSED] 0xB080 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB081 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB082 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB083 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB084 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB085 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB086 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB087 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB08F (PANTHERLAKE)
[15:33:46] [PASSED] 0xB090 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:33:46] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:33:46] [PASSED] 0xFD80 (PANTHERLAKE)
[15:33:46] [PASSED] 0xFD81 (PANTHERLAKE)
[15:33:46] ============= [PASSED] check_platform_gt_count =============
[15:33:46] ===================== [PASSED] xe_pci ======================
[15:33:46] =================== xe_rtp (2 subtests) ====================
[15:33:46] =============== xe_rtp_process_to_sr_tests ================
[15:33:46] [PASSED] coalesce-same-reg
[15:33:46] [PASSED] no-match-no-add
[15:33:46] [PASSED] match-or
[15:33:46] [PASSED] match-or-xfail
[15:33:46] [PASSED] no-match-no-add-multiple-rules
[15:33:46] [PASSED] two-regs-two-entries
[15:33:46] [PASSED] clr-one-set-other
[15:33:46] [PASSED] set-field
[15:33:46] [PASSED] conflict-duplicate
[15:33:46] [PASSED] conflict-not-disjoint
[15:33:46] [PASSED] conflict-reg-type
[15:33:46] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:33:46] ================== xe_rtp_process_tests ===================
[15:33:46] [PASSED] active1
[15:33:46] [PASSED] active2
[15:33:46] [PASSED] active-inactive
[15:33:46] [PASSED] inactive-active
[15:33:46] [PASSED] inactive-1st_or_active-inactive
[15:33:46] [PASSED] inactive-2nd_or_active-inactive
[15:33:46] [PASSED] inactive-last_or_active-inactive
[15:33:46] [PASSED] inactive-no_or_active-inactive
[15:33:46] ============== [PASSED] xe_rtp_process_tests ===============
[15:33:46] ===================== [PASSED] xe_rtp ======================
[15:33:46] ==================== xe_wa (1 subtest) =====================
[15:33:46] ======================== xe_wa_gt =========================
[15:33:46] [PASSED] TIGERLAKE (B0)
[15:33:46] [PASSED] DG1 (A0)
[15:33:46] [PASSED] DG1 (B0)
[15:33:46] [PASSED] ALDERLAKE_S (A0)
[15:33:46] [PASSED] ALDERLAKE_S (B0)
[15:33:46] [PASSED] ALDERLAKE_S (C0)
[15:33:46] [PASSED] ALDERLAKE_S (D0)
[15:33:46] [PASSED] ALDERLAKE_P (A0)
[15:33:46] [PASSED] ALDERLAKE_P (B0)
[15:33:46] [PASSED] ALDERLAKE_P (C0)
[15:33:46] [PASSED] ALDERLAKE_S_RPLS (D0)
[15:33:46] [PASSED] ALDERLAKE_P_RPLU (E0)
[15:33:46] [PASSED] DG2_G10 (C0)
[15:33:46] [PASSED] DG2_G11 (B1)
[15:33:46] [PASSED] DG2_G12 (A1)
[15:33:46] [PASSED] METEORLAKE (g:A0, m:A0)
[15:33:46] [PASSED] METEORLAKE (g:A0, m:A0)
[15:33:46] [PASSED] METEORLAKE (g:A0, m:A0)
[15:33:46] [PASSED] LUNARLAKE (g:A0, m:A0)
[15:33:46] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[15:33:46] [PASSED] BATTLEMAGE (g:A0, m:A1)
[15:33:46] ==================== [PASSED] xe_wa_gt =====================
[15:33:46] ====================== [PASSED] xe_wa ======================
[15:33:46] ============================================================
[15:33:46] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[15:33:46] Elapsed time: 31.436s total, 4.236s configuring, 26.883s building, 0.309s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:33:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:33:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:34:09] Starting KUnit Kernel (1/1)...
[15:34:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:34:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:34:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:34:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:34:09] =========== drm_validate_clone_mode (2 subtests) ===========
[15:34:09] ============== drm_test_check_in_clone_mode ===============
[15:34:09] [PASSED] in_clone_mode
[15:34:09] [PASSED] not_in_clone_mode
[15:34:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:34:09] =============== drm_test_check_valid_clones ===============
[15:34:09] [PASSED] not_in_clone_mode
[15:34:09] [PASSED] valid_clone
[15:34:09] [PASSED] invalid_clone
[15:34:09] =========== [PASSED] drm_test_check_valid_clones ===========
[15:34:09] ============= [PASSED] drm_validate_clone_mode =============
[15:34:09] ============= drm_validate_modeset (1 subtest) =============
[15:34:09] [PASSED] drm_test_check_connector_changed_modeset
[15:34:09] ============== [PASSED] drm_validate_modeset ===============
[15:34:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:34:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:34:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:34:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:34:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:34:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:34:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:34:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:34:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:34:09] ============== drm_bridge_alloc (2 subtests) ===============
[15:34:09] [PASSED] drm_test_drm_bridge_alloc_basic
[15:34:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:34:09] ================ [PASSED] drm_bridge_alloc =================
[15:34:09] ================== drm_buddy (7 subtests) ==================
[15:34:09] [PASSED] drm_test_buddy_alloc_limit
[15:34:09] [PASSED] drm_test_buddy_alloc_optimistic
[15:34:09] [PASSED] drm_test_buddy_alloc_pessimistic
[15:34:09] [PASSED] drm_test_buddy_alloc_pathological
[15:34:09] [PASSED] drm_test_buddy_alloc_contiguous
[15:34:09] [PASSED] drm_test_buddy_alloc_clear
[15:34:09] [PASSED] drm_test_buddy_alloc_range_bias
[15:34:09] ==================== [PASSED] drm_buddy ====================
[15:34:09] ============= drm_cmdline_parser (40 subtests) =============
[15:34:09] [PASSED] drm_test_cmdline_force_d_only
[15:34:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:34:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:34:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:34:09] [PASSED] drm_test_cmdline_force_e_only
[15:34:09] [PASSED] drm_test_cmdline_res
[15:34:09] [PASSED] drm_test_cmdline_res_vesa
[15:34:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:34:09] [PASSED] drm_test_cmdline_res_rblank
[15:34:09] [PASSED] drm_test_cmdline_res_bpp
[15:34:09] [PASSED] drm_test_cmdline_res_refresh
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:34:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:34:09] [PASSED] drm_test_cmdline_res_margins_force_on
[15:34:09] [PASSED] drm_test_cmdline_res_vesa_margins
[15:34:09] [PASSED] drm_test_cmdline_name
[15:34:09] [PASSED] drm_test_cmdline_name_bpp
[15:34:09] [PASSED] drm_test_cmdline_name_option
[15:34:09] [PASSED] drm_test_cmdline_name_bpp_option
[15:34:09] [PASSED] drm_test_cmdline_rotate_0
[15:34:09] [PASSED] drm_test_cmdline_rotate_90
[15:34:09] [PASSED] drm_test_cmdline_rotate_180
[15:34:09] [PASSED] drm_test_cmdline_rotate_270
[15:34:09] [PASSED] drm_test_cmdline_hmirror
[15:34:09] [PASSED] drm_test_cmdline_vmirror
[15:34:09] [PASSED] drm_test_cmdline_margin_options
[15:34:09] [PASSED] drm_test_cmdline_multiple_options
[15:34:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:34:09] [PASSED] drm_test_cmdline_extra_and_option
[15:34:09] [PASSED] drm_test_cmdline_freestanding_options
[15:34:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:34:09] [PASSED] drm_test_cmdline_panel_orientation
[15:34:09] ================ drm_test_cmdline_invalid =================
[15:34:09] [PASSED] margin_only
[15:34:09] [PASSED] interlace_only
[15:34:09] [PASSED] res_missing_x
[15:34:09] [PASSED] res_missing_y
[15:34:09] [PASSED] res_bad_y
[15:34:09] [PASSED] res_missing_y_bpp
[15:34:09] [PASSED] res_bad_bpp
[15:34:09] [PASSED] res_bad_refresh
[15:34:09] [PASSED] res_bpp_refresh_force_on_off
[15:34:09] [PASSED] res_invalid_mode
[15:34:09] [PASSED] res_bpp_wrong_place_mode
[15:34:09] [PASSED] name_bpp_refresh
[15:34:09] [PASSED] name_refresh
[15:34:09] [PASSED] name_refresh_wrong_mode
[15:34:09] [PASSED] name_refresh_invalid_mode
[15:34:09] [PASSED] rotate_multiple
[15:34:09] [PASSED] rotate_invalid_val
[15:34:09] [PASSED] rotate_truncated
[15:34:09] [PASSED] invalid_option
[15:34:09] [PASSED] invalid_tv_option
[15:34:09] [PASSED] truncated_tv_option
[15:34:09] ============ [PASSED] drm_test_cmdline_invalid =============
[15:34:09] =============== drm_test_cmdline_tv_options ===============
[15:34:09] [PASSED] NTSC
[15:34:09] [PASSED] NTSC_443
[15:34:09] [PASSED] NTSC_J
[15:34:09] [PASSED] PAL
[15:34:09] [PASSED] PAL_M
[15:34:09] [PASSED] PAL_N
[15:34:09] [PASSED] SECAM
[15:34:09] [PASSED] MONO_525
[15:34:09] [PASSED] MONO_625
[15:34:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:34:09] =============== [PASSED] drm_cmdline_parser ================
[15:34:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:34:09] [PASSED] drm_test_connector_hdmi_init_valid
[15:34:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:34:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:34:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:34:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:34:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:34:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:34:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:34:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:34:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:34:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:34:09] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:34:09] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:34:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:34:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:34:09] [PASSED] drm_test_connector_hdmi_init_null_product
[15:34:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:34:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:34:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:34:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:34:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:34:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:34:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:34:09] ========= drm_test_connector_hdmi_init_type_valid =========
[15:34:09] [PASSED] HDMI-A
[15:34:09] [PASSED] HDMI-B
[15:34:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:34:09] ======== drm_test_connector_hdmi_init_type_invalid ========
[15:34:09] [PASSED] Unknown
[15:34:09] [PASSED] VGA
[15:34:09] [PASSED] DVI-I
[15:34:09] [PASSED] DVI-D
[15:34:09] [PASSED] DVI-A
[15:34:09] [PASSED] Composite
[15:34:09] [PASSED] SVIDEO
[15:34:09] [PASSED] LVDS
[15:34:09] [PASSED] Component
[15:34:09] [PASSED] DIN
[15:34:09] [PASSED] DP
[15:34:09] [PASSED] TV
[15:34:09] [PASSED] eDP
[15:34:09] [PASSED] Virtual
[15:34:09] [PASSED] DSI
[15:34:09] [PASSED] DPI
[15:34:09] [PASSED] Writeback
[15:34:09] [PASSED] SPI
[15:34:09] [PASSED] USB
[15:34:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:34:09] ============ [PASSED] drmm_connector_hdmi_init =============
[15:34:09] ============= drmm_connector_init (3 subtests) =============
[15:34:09] [PASSED] drm_test_drmm_connector_init
[15:34:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:34:09] ========= drm_test_drmm_connector_init_type_valid =========
[15:34:09] [PASSED] Unknown
[15:34:09] [PASSED] VGA
[15:34:09] [PASSED] DVI-I
[15:34:09] [PASSED] DVI-D
[15:34:09] [PASSED] DVI-A
[15:34:09] [PASSED] Composite
[15:34:09] [PASSED] SVIDEO
[15:34:09] [PASSED] LVDS
[15:34:09] [PASSED] Component
[15:34:09] [PASSED] DIN
[15:34:09] [PASSED] DP
[15:34:09] [PASSED] HDMI-A
[15:34:09] [PASSED] HDMI-B
[15:34:09] [PASSED] TV
[15:34:09] [PASSED] eDP
[15:34:09] [PASSED] Virtual
[15:34:09] [PASSED] DSI
[15:34:09] [PASSED] DPI
[15:34:09] [PASSED] Writeback
[15:34:09] [PASSED] SPI
[15:34:09] [PASSED] USB
[15:34:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:34:09] =============== [PASSED] drmm_connector_init ===============
[15:34:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_init
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:34:09] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[15:34:09] [PASSED] Unknown
[15:34:09] [PASSED] VGA
[15:34:09] [PASSED] DVI-I
[15:34:09] [PASSED] DVI-D
[15:34:09] [PASSED] DVI-A
[15:34:09] [PASSED] Composite
[15:34:09] [PASSED] SVIDEO
[15:34:09] [PASSED] LVDS
[15:34:09] [PASSED] Component
[15:34:09] [PASSED] DIN
[15:34:09] [PASSED] DP
[15:34:09] [PASSED] HDMI-A
[15:34:09] [PASSED] HDMI-B
[15:34:09] [PASSED] TV
[15:34:09] [PASSED] eDP
[15:34:09] [PASSED] Virtual
[15:34:09] [PASSED] DSI
[15:34:09] [PASSED] DPI
[15:34:09] [PASSED] Writeback
[15:34:09] [PASSED] SPI
[15:34:09] [PASSED] USB
[15:34:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:34:09] ======== drm_test_drm_connector_dynamic_init_name =========
[15:34:09] [PASSED] Unknown
[15:34:09] [PASSED] VGA
[15:34:09] [PASSED] DVI-I
[15:34:09] [PASSED] DVI-D
[15:34:09] [PASSED] DVI-A
[15:34:09] [PASSED] Composite
[15:34:09] [PASSED] SVIDEO
[15:34:09] [PASSED] LVDS
[15:34:09] [PASSED] Component
[15:34:09] [PASSED] DIN
[15:34:09] [PASSED] DP
[15:34:09] [PASSED] HDMI-A
[15:34:09] [PASSED] HDMI-B
[15:34:09] [PASSED] TV
[15:34:09] [PASSED] eDP
[15:34:09] [PASSED] Virtual
[15:34:09] [PASSED] DSI
[15:34:09] [PASSED] DPI
[15:34:09] [PASSED] Writeback
[15:34:09] [PASSED] SPI
[15:34:09] [PASSED] USB
[15:34:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:34:09] =========== [PASSED] drm_connector_dynamic_init ============
[15:34:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:34:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:34:09] ======= drm_connector_dynamic_register (7 subtests) ========
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:34:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:34:09] ========= [PASSED] drm_connector_dynamic_register ==========
[15:34:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:34:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:34:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:34:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:34:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:34:09] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:34:09] [PASSED] NTSC
[15:34:09] [PASSED] NTSC-443
[15:34:09] [PASSED] NTSC-J
[15:34:09] [PASSED] PAL
[15:34:09] [PASSED] PAL-M
[15:34:09] [PASSED] PAL-N
[15:34:09] [PASSED] SECAM
[15:34:09] [PASSED] Mono
[15:34:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:34:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:34:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:34:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:34:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:34:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[15:34:09] [PASSED] VIC 96
[15:34:09] [PASSED] VIC 97
[15:34:09] [PASSED] VIC 101
[15:34:09] [PASSED] VIC 102
[15:34:09] [PASSED] VIC 106
[15:34:09] [PASSED] VIC 107
[15:34:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:34:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:34:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:34:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:34:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:34:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:34:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:34:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:34:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[15:34:09] [PASSED] Automatic
[15:34:09] [PASSED] Full
[15:34:09] [PASSED] Limited 16:235
[15:34:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:34:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:34:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:34:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:34:09] === drm_test_drm_hdmi_connector_get_output_format_name ====
[15:34:09] [PASSED] RGB
[15:34:09] [PASSED] YUV 4:2:0
[15:34:09] [PASSED] YUV 4:2:2
[15:34:09] [PASSED] YUV 4:4:4
[15:34:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:34:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:34:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:34:09] ============= drm_damage_helper (21 subtests) ==============
[15:34:09] [PASSED] drm_test_damage_iter_no_damage
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:34:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:34:09] [PASSED] drm_test_damage_iter_simple_damage
[15:34:09] [PASSED] drm_test_damage_iter_single_damage
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:34:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:34:09] [PASSED] drm_test_damage_iter_damage
[15:34:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:34:09] [PASSED] drm_test_damage_iter_damage_one_outside
[15:34:09] [PASSED] drm_test_damage_iter_damage_src_moved
[15:34:09] [PASSED] drm_test_damage_iter_damage_not_visible
[15:34:09] ================ [PASSED] drm_damage_helper ================
[15:34:09] ============== drm_dp_mst_helper (3 subtests) ==============
[15:34:09] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:34:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:34:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:34:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:34:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:34:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:34:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:34:09] ============== drm_test_dp_mst_calc_pbn_div ===============
[15:34:09] [PASSED] Link rate 2000000 lane count 4
[15:34:09] [PASSED] Link rate 2000000 lane count 2
[15:34:09] [PASSED] Link rate 2000000 lane count 1
[15:34:09] [PASSED] Link rate 1350000 lane count 4
[15:34:09] [PASSED] Link rate 1350000 lane count 2
[15:34:09] [PASSED] Link rate 1350000 lane count 1
[15:34:09] [PASSED] Link rate 1000000 lane count 4
[15:34:09] [PASSED] Link rate 1000000 lane count 2
[15:34:09] [PASSED] Link rate 1000000 lane count 1
[15:34:09] [PASSED] Link rate 810000 lane count 4
[15:34:09] [PASSED] Link rate 810000 lane count 2
[15:34:09] [PASSED] Link rate 810000 lane count 1
[15:34:09] [PASSED] Link rate 540000 lane count 4
[15:34:09] [PASSED] Link rate 540000 lane count 2
[15:34:09] [PASSED] Link rate 540000 lane count 1
[15:34:09] [PASSED] Link rate 270000 lane count 4
[15:34:09] [PASSED] Link rate 270000 lane count 2
[15:34:09] [PASSED] Link rate 270000 lane count 1
[15:34:09] [PASSED] Link rate 162000 lane count 4
[15:34:09] [PASSED] Link rate 162000 lane count 2
[15:34:09] [PASSED] Link rate 162000 lane count 1
[15:34:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:34:09] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:34:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:34:09] [PASSED] DP_POWER_UP_PHY with port number
[15:34:09] [PASSED] DP_POWER_DOWN_PHY with port number
[15:34:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:34:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:34:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:34:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:34:09] [PASSED] DP_QUERY_PAYLOAD with port number
[15:34:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:34:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:34:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:34:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:34:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:34:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:34:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:34:09] [PASSED] DP_REMOTE_I2C_READ with port number
[15:34:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:34:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:34:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:34:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:34:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:34:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:34:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:34:09] ================ [PASSED] drm_dp_mst_helper ================
[15:34:09] ================== drm_exec (7 subtests) ===================
[15:34:09] [PASSED] sanitycheck
[15:34:09] [PASSED] test_lock
[15:34:09] [PASSED] test_lock_unlock
[15:34:09] [PASSED] test_duplicates
[15:34:09] [PASSED] test_prepare
[15:34:09] [PASSED] test_prepare_array
[15:34:09] [PASSED] test_multiple_loops
[15:34:09] ==================== [PASSED] drm_exec =====================
[15:34:09] =========== drm_format_helper_test (17 subtests) ===========
[15:34:09] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:34:09] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:34:09] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:34:09] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:34:09] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:34:09] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:34:09] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:34:09] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:34:09] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:34:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:34:09] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:34:09] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:34:09] ==================== drm_test_fb_swab =====================
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ================ [PASSED] drm_test_fb_swab =================
[15:34:09] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:34:09] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[15:34:09] [PASSED] single_pixel_source_buffer
[15:34:09] [PASSED] single_pixel_clip_rectangle
[15:34:09] [PASSED] well_known_colors
[15:34:09] [PASSED] destination_pitch
[15:34:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:34:09] ================= drm_test_fb_clip_offset =================
[15:34:09] [PASSED] pass through
[15:34:09] [PASSED] horizontal offset
[15:34:09] [PASSED] vertical offset
[15:34:09] [PASSED] horizontal and vertical offset
[15:34:09] [PASSED] horizontal offset (custom pitch)
[15:34:09] [PASSED] vertical offset (custom pitch)
[15:34:09] [PASSED] horizontal and vertical offset (custom pitch)
[15:34:09] ============= [PASSED] drm_test_fb_clip_offset =============
[15:34:09] =================== drm_test_fb_memcpy ====================
[15:34:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:34:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:34:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:34:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:34:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:34:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:34:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:34:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:34:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:34:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:34:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:34:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:34:09] =============== [PASSED] drm_test_fb_memcpy ================
[15:34:09] ============= [PASSED] drm_format_helper_test ==============
[15:34:09] ================= drm_format (18 subtests) =================
[15:34:09] [PASSED] drm_test_format_block_width_invalid
[15:34:09] [PASSED] drm_test_format_block_width_one_plane
[15:34:09] [PASSED] drm_test_format_block_width_two_plane
[15:34:09] [PASSED] drm_test_format_block_width_three_plane
[15:34:09] [PASSED] drm_test_format_block_width_tiled
[15:34:09] [PASSED] drm_test_format_block_height_invalid
[15:34:09] [PASSED] drm_test_format_block_height_one_plane
[15:34:09] [PASSED] drm_test_format_block_height_two_plane
[15:34:09] [PASSED] drm_test_format_block_height_three_plane
[15:34:09] [PASSED] drm_test_format_block_height_tiled
[15:34:09] [PASSED] drm_test_format_min_pitch_invalid
[15:34:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:34:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:34:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:34:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:34:09] [PASSED] drm_test_format_min_pitch_two_plane
[15:34:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:34:09] [PASSED] drm_test_format_min_pitch_tiled
[15:34:09] =================== [PASSED] drm_format ====================
[15:34:09] ============== drm_framebuffer (10 subtests) ===============
[15:34:09] ========== drm_test_framebuffer_check_src_coords ==========
[15:34:09] [PASSED] Success: source fits into fb
[15:34:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:34:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:34:09] [PASSED] Fail: overflowing fb with source width
[15:34:09] [PASSED] Fail: overflowing fb with source height
[15:34:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:34:09] [PASSED] drm_test_framebuffer_cleanup
[15:34:09] =============== drm_test_framebuffer_create ===============
[15:34:09] [PASSED] ABGR8888 normal sizes
[15:34:09] [PASSED] ABGR8888 max sizes
[15:34:09] [PASSED] ABGR8888 pitch greater than min required
[15:34:09] [PASSED] ABGR8888 pitch less than min required
[15:34:09] [PASSED] ABGR8888 Invalid width
[15:34:09] [PASSED] ABGR8888 Invalid buffer handle
[15:34:09] [PASSED] No pixel format
[15:34:09] [PASSED] ABGR8888 Width 0
[15:34:09] [PASSED] ABGR8888 Height 0
[15:34:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:34:09] [PASSED] ABGR8888 Large buffer offset
[15:34:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:34:09] [PASSED] ABGR8888 Invalid flag
[15:34:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:34:09] [PASSED] ABGR8888 Valid buffer modifier
[15:34:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:34:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] NV12 Normal sizes
[15:34:09] [PASSED] NV12 Max sizes
[15:34:09] [PASSED] NV12 Invalid pitch
[15:34:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:34:09] [PASSED] NV12 different modifier per-plane
[15:34:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:34:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] NV12 Modifier for inexistent plane
[15:34:09] [PASSED] NV12 Handle for inexistent plane
[15:34:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:34:09] [PASSED] YVU420 Normal sizes
[15:34:09] [PASSED] YVU420 Max sizes
[15:34:09] [PASSED] YVU420 Invalid pitch
[15:34:09] [PASSED] YVU420 Different pitches
[15:34:09] [PASSED] YVU420 Different buffer offsets/pitches
[15:34:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:34:09] [PASSED] YVU420 Valid modifier
[15:34:09] [PASSED] YVU420 Different modifiers per plane
[15:34:09] [PASSED] YVU420 Modifier for inexistent plane
[15:34:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:34:09] [PASSED] X0L2 Normal sizes
[15:34:09] [PASSED] X0L2 Max sizes
[15:34:09] [PASSED] X0L2 Invalid pitch
[15:34:09] [PASSED] X0L2 Pitch greater than minimum required
[15:34:09] [PASSED] X0L2 Handle for inexistent plane
[15:34:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:34:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:34:09] [PASSED] X0L2 Valid modifier
[15:34:09] [PASSED] X0L2 Modifier for inexistent plane
[15:34:09] =========== [PASSED] drm_test_framebuffer_create ===========
[15:34:09] [PASSED] drm_test_framebuffer_free
[15:34:09] [PASSED] drm_test_framebuffer_init
[15:34:09] [PASSED] drm_test_framebuffer_init_bad_format
[15:34:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:34:09] [PASSED] drm_test_framebuffer_lookup
[15:34:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:34:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:34:09] ================= [PASSED] drm_framebuffer =================
[15:34:09] ================ drm_gem_shmem (8 subtests) ================
[15:34:09] [PASSED] drm_gem_shmem_test_obj_create
[15:34:09] [PASSED] drm_gem_shmem_test_obj_create_private
[15:34:09] [PASSED] drm_gem_shmem_test_pin_pages
[15:34:09] [PASSED] drm_gem_shmem_test_vmap
[15:34:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:34:09] [PASSED] drm_gem_shmem_test_get_sg_table
[15:34:09] [PASSED] drm_gem_shmem_test_madvise
[15:34:09] [PASSED] drm_gem_shmem_test_purge
[15:34:09] ================== [PASSED] drm_gem_shmem ==================
[15:34:09] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:34:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[15:34:09] [PASSED] Automatic
[15:34:09] [PASSED] Full
[15:34:09] [PASSED] Limited 16:235
[15:34:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:34:09] [PASSED] drm_test_check_disable_connector
[15:34:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:34:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:34:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:34:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:34:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:34:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:34:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:34:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:34:09] [PASSED] drm_test_check_output_bpc_dvi
[15:34:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:34:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:34:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:34:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:34:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:34:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:34:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:34:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:34:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:34:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:34:09] [PASSED] drm_test_check_broadcast_rgb_value
[15:34:09] [PASSED] drm_test_check_bpc_8_value
[15:34:09] [PASSED] drm_test_check_bpc_10_value
[15:34:09] [PASSED] drm_test_check_bpc_12_value
[15:34:09] [PASSED] drm_test_check_format_value
[15:34:09] [PASSED] drm_test_check_tmds_char_value
[15:34:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:34:09] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:34:09] [PASSED] drm_test_check_mode_valid
[15:34:09] [PASSED] drm_test_check_mode_valid_reject
[15:34:09] [PASSED] drm_test_check_mode_valid_reject_rate
[15:34:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:34:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:34:09] ================= drm_managed (2 subtests) =================
[15:34:09] [PASSED] drm_test_managed_release_action
[15:34:09] [PASSED] drm_test_managed_run_action
[15:34:09] =================== [PASSED] drm_managed ===================
[15:34:09] =================== drm_mm (6 subtests) ====================
[15:34:09] [PASSED] drm_test_mm_init
[15:34:09] [PASSED] drm_test_mm_debug
[15:34:09] [PASSED] drm_test_mm_align32
[15:34:09] [PASSED] drm_test_mm_align64
[15:34:09] [PASSED] drm_test_mm_lowest
[15:34:09] [PASSED] drm_test_mm_highest
[15:34:09] ===================== [PASSED] drm_mm ======================
[15:34:09] ============= drm_modes_analog_tv (5 subtests) =============
[15:34:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:34:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:34:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:34:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:34:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:34:09] =============== [PASSED] drm_modes_analog_tv ===============
[15:34:09] ============== drm_plane_helper (2 subtests) ===============
[15:34:09] =============== drm_test_check_plane_state ================
[15:34:09] [PASSED] clipping_simple
[15:34:09] [PASSED] clipping_rotate_reflect
[15:34:09] [PASSED] positioning_simple
[15:34:09] [PASSED] upscaling
[15:34:09] [PASSED] downscaling
[15:34:09] [PASSED] rounding1
[15:34:09] [PASSED] rounding2
[15:34:09] [PASSED] rounding3
[15:34:09] [PASSED] rounding4
[15:34:09] =========== [PASSED] drm_test_check_plane_state ============
[15:34:09] =========== drm_test_check_invalid_plane_state ============
[15:34:09] [PASSED] positioning_invalid
[15:34:09] [PASSED] upscaling_invalid
[15:34:09] [PASSED] downscaling_invalid
[15:34:09] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:34:09] ================ [PASSED] drm_plane_helper =================
[15:34:09] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:34:09] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:34:09] [PASSED] None
[15:34:09] [PASSED] PAL
[15:34:09] [PASSED] NTSC
[15:34:09] [PASSED] Both, NTSC Default
[15:34:09] [PASSED] Both, PAL Default
[15:34:09] [PASSED] Both, NTSC Default, with PAL on command-line
[15:34:09] [PASSED] Both, PAL Default, with NTSC on command-line
[15:34:09] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:34:09] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:34:09] ================== drm_rect (9 subtests) ===================
[15:34:09] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:34:09] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:34:09] [PASSED] drm_test_rect_clip_scaled_clipped
[15:34:09] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:34:09] ================= drm_test_rect_intersect =================
[15:34:09] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:34:09] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:34:09] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:34:09] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:34:09] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:34:09] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:34:09] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:34:09] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:34:09] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:34:09] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:34:09] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:34:09] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:34:09] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:34:09] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:34:09] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:34:09] ============= [PASSED] drm_test_rect_intersect =============
[15:34:09] ================ drm_test_rect_calc_hscale ================
[15:34:09] [PASSED] normal use
[15:34:09] [PASSED] out of max range
[15:34:09] [PASSED] out of min range
[15:34:09] [PASSED] zero dst
[15:34:09] [PASSED] negative src
[15:34:09] [PASSED] negative dst
[15:34:09] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:34:09] ================ drm_test_rect_calc_vscale ================
[15:34:09] [PASSED] normal use
[15:34:09] [PASSED] out of max range
[15:34:09] [PASSED] out of min range
[15:34:09] [PASSED] zero dst
[15:34:09] [PASSED] negative src
[15:34:09] [PASSED] negative dst
[15:34:09] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:34:09] ================== drm_test_rect_rotate ===================
[15:34:09] [PASSED] reflect-x
[15:34:09] [PASSED] reflect-y
[15:34:09] [PASSED] rotate-0
[15:34:09] [PASSED] rotate-90
[15:34:09] [PASSED] rotate-180
[15:34:09] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[15:34:09] ============== [PASSED] drm_test_rect_rotate ===============
[15:34:09] ================ drm_test_rect_rotate_inv =================
[15:34:09] [PASSED] reflect-x
[15:34:09] [PASSED] reflect-y
[15:34:09] [PASSED] rotate-0
[15:34:09] [PASSED] rotate-90
[15:34:09] [PASSED] rotate-180
[15:34:09] [PASSED] rotate-270
[15:34:09] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:34:09] ==================== [PASSED] drm_rect =====================
[15:34:09] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:34:09] ============ drm_test_sysfb_build_fourcc_list =============
[15:34:09] [PASSED] no native formats
[15:34:09] [PASSED] XRGB8888 as native format
[15:34:09] [PASSED] remove duplicates
[15:34:09] [PASSED] convert alpha formats
[15:34:09] [PASSED] random formats
[15:34:09] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:34:09] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:34:09] ============================================================
[15:34:09] Testing complete. Ran 616 tests: passed: 616
[15:34:09] Elapsed time: 23.437s total, 1.679s configuring, 21.586s building, 0.141s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:34:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:34:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:34:19] Starting KUnit Kernel (1/1)...
[15:34:19] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:34:19] ================= ttm_device (5 subtests) ==================
[15:34:19] [PASSED] ttm_device_init_basic
[15:34:19] [PASSED] ttm_device_init_multiple
[15:34:19] [PASSED] ttm_device_fini_basic
[15:34:19] [PASSED] ttm_device_init_no_vma_man
[15:34:19] ================== ttm_device_init_pools ==================
[15:34:19] [PASSED] No DMA allocations, no DMA32 required
[15:34:19] [PASSED] DMA allocations, DMA32 required
[15:34:19] [PASSED] No DMA allocations, DMA32 required
[15:34:19] [PASSED] DMA allocations, no DMA32 required
[15:34:19] ============== [PASSED] ttm_device_init_pools ==============
[15:34:19] =================== [PASSED] ttm_device ====================
[15:34:19] ================== ttm_pool (8 subtests) ===================
[15:34:19] ================== ttm_pool_alloc_basic ===================
[15:34:19] [PASSED] One page
[15:34:19] [PASSED] More than one page
[15:34:19] [PASSED] Above the allocation limit
[15:34:19] [PASSED] One page, with coherent DMA mappings enabled
[15:34:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:34:19] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:34:19] ============== ttm_pool_alloc_basic_dma_addr ==============
[15:34:19] [PASSED] One page
[15:34:19] [PASSED] More than one page
[15:34:19] [PASSED] Above the allocation limit
[15:34:19] [PASSED] One page, with coherent DMA mappings enabled
[15:34:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:34:19] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:34:19] [PASSED] ttm_pool_alloc_order_caching_match
[15:34:19] [PASSED] ttm_pool_alloc_caching_mismatch
[15:34:19] [PASSED] ttm_pool_alloc_order_mismatch
[15:34:19] [PASSED] ttm_pool_free_dma_alloc
[15:34:19] [PASSED] ttm_pool_free_no_dma_alloc
[15:34:19] [PASSED] ttm_pool_fini_basic
[15:34:19] ==================== [PASSED] ttm_pool =====================
[15:34:19] ================ ttm_resource (8 subtests) =================
[15:34:19] ================= ttm_resource_init_basic =================
[15:34:19] [PASSED] Init resource in TTM_PL_SYSTEM
[15:34:19] [PASSED] Init resource in TTM_PL_VRAM
[15:34:19] [PASSED] Init resource in a private placement
[15:34:19] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:34:19] ============= [PASSED] ttm_resource_init_basic =============
[15:34:19] [PASSED] ttm_resource_init_pinned
[15:34:19] [PASSED] ttm_resource_fini_basic
[15:34:19] [PASSED] ttm_resource_manager_init_basic
[15:34:19] [PASSED] ttm_resource_manager_usage_basic
[15:34:19] [PASSED] ttm_resource_manager_set_used_basic
[15:34:19] [PASSED] ttm_sys_man_alloc_basic
[15:34:19] [PASSED] ttm_sys_man_free_basic
[15:34:19] ================== [PASSED] ttm_resource ===================
[15:34:19] =================== ttm_tt (15 subtests) ===================
[15:34:19] ==================== ttm_tt_init_basic ====================
[15:34:19] [PASSED] Page-aligned size
[15:34:19] [PASSED] Extra pages requested
[15:34:19] ================ [PASSED] ttm_tt_init_basic ================
[15:34:19] [PASSED] ttm_tt_init_misaligned
[15:34:19] [PASSED] ttm_tt_fini_basic
[15:34:19] [PASSED] ttm_tt_fini_sg
[15:34:19] [PASSED] ttm_tt_fini_shmem
[15:34:19] [PASSED] ttm_tt_create_basic
[15:34:19] [PASSED] ttm_tt_create_invalid_bo_type
[15:34:19] [PASSED] ttm_tt_create_ttm_exists
[15:34:19] [PASSED] ttm_tt_create_failed
[15:34:19] [PASSED] ttm_tt_destroy_basic
[15:34:19] [PASSED] ttm_tt_populate_null_ttm
[15:34:19] [PASSED] ttm_tt_populate_populated_ttm
[15:34:19] [PASSED] ttm_tt_unpopulate_basic
[15:34:19] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:34:19] [PASSED] ttm_tt_swapin_basic
[15:34:19] ===================== [PASSED] ttm_tt ======================
[15:34:19] =================== ttm_bo (14 subtests) ===================
[15:34:19] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[15:34:19] [PASSED] Cannot be interrupted and sleeps
[15:34:19] [PASSED] Cannot be interrupted, locks straight away
[15:34:19] [PASSED] Can be interrupted, sleeps
[15:34:19] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:34:19] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:34:19] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:34:19] [PASSED] ttm_bo_reserve_double_resv
[15:34:19] [PASSED] ttm_bo_reserve_interrupted
[15:34:19] [PASSED] ttm_bo_reserve_deadlock
[15:34:19] [PASSED] ttm_bo_unreserve_basic
[15:34:19] [PASSED] ttm_bo_unreserve_pinned
[15:34:19] [PASSED] ttm_bo_unreserve_bulk
[15:34:19] [PASSED] ttm_bo_put_basic
[15:34:19] [PASSED] ttm_bo_put_shared_resv
[15:34:19] [PASSED] ttm_bo_pin_basic
[15:34:19] [PASSED] ttm_bo_pin_unpin_resource
[15:34:19] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:34:19] ===================== [PASSED] ttm_bo ======================
[15:34:19] ============== ttm_bo_validate (22 subtests) ===============
[15:34:19] ============== ttm_bo_init_reserved_sys_man ===============
[15:34:19] [PASSED] Buffer object for userspace
[15:34:19] [PASSED] Kernel buffer object
[15:34:19] [PASSED] Shared buffer object
[15:34:19] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:34:19] ============== ttm_bo_init_reserved_mock_man ==============
[15:34:19] [PASSED] Buffer object for userspace
[15:34:19] [PASSED] Kernel buffer object
[15:34:19] [PASSED] Shared buffer object
[15:34:19] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:34:19] [PASSED] ttm_bo_init_reserved_resv
[15:34:19] ================== ttm_bo_validate_basic ==================
[15:34:19] [PASSED] Buffer object for userspace
[15:34:19] [PASSED] Kernel buffer object
[15:34:19] [PASSED] Shared buffer object
[15:34:19] ============== [PASSED] ttm_bo_validate_basic ==============
[15:34:19] [PASSED] ttm_bo_validate_invalid_placement
[15:34:19] ============= ttm_bo_validate_same_placement ==============
[15:34:19] [PASSED] System manager
[15:34:19] [PASSED] VRAM manager
[15:34:19] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:34:19] [PASSED] ttm_bo_validate_failed_alloc
[15:34:19] [PASSED] ttm_bo_validate_pinned
[15:34:19] [PASSED] ttm_bo_validate_busy_placement
[15:34:19] ================ ttm_bo_validate_multihop =================
[15:34:19] [PASSED] Buffer object for userspace
[15:34:19] [PASSED] Kernel buffer object
[15:34:19] [PASSED] Shared buffer object
[15:34:19] ============ [PASSED] ttm_bo_validate_multihop =============
[15:34:19] ========== ttm_bo_validate_no_placement_signaled ==========
[15:34:19] [PASSED] Buffer object in system domain, no page vector
[15:34:19] [PASSED] Buffer object in system domain with an existing page vector
[15:34:19] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:34:19] ======== ttm_bo_validate_no_placement_not_signaled ========
[15:34:19] [PASSED] Buffer object for userspace
[15:34:19] [PASSED] Kernel buffer object
[15:34:19] [PASSED] Shared buffer object
[15:34:19] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:34:19] [PASSED] ttm_bo_validate_move_fence_signaled
[15:34:19] ========= ttm_bo_validate_move_fence_not_signaled =========
[15:34:19] [PASSED] Waits for GPU
[15:34:19] [PASSED] Tries to lock straight away
[15:34:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:34:19] [PASSED] ttm_bo_validate_swapout
[15:34:19] [PASSED] ttm_bo_validate_happy_evict
[15:34:19] [PASSED] ttm_bo_validate_all_pinned_evict
[15:34:19] [PASSED] ttm_bo_validate_allowed_only_evict
[15:34:19] [PASSED] ttm_bo_validate_deleted_evict
[15:34:19] [PASSED] ttm_bo_validate_busy_domain_evict
[15:34:19] [PASSED] ttm_bo_validate_evict_gutting
[15:34:19] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:34:19] ================= [PASSED] ttm_bo_validate =================
[15:34:19] ============================================================
[15:34:19] Testing complete. Ran 102 tests: passed: 102
[15:34:19] Elapsed time: 10.010s total, 1.647s configuring, 7.746s building, 0.531s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✓ Xe.CI.BAT: success for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (9 preceding siblings ...)
2025-07-08 15:34 ` ✓ CI.KUnit: success " Patchwork
@ 2025-07-08 16:22 ` Patchwork
2025-07-08 18:14 ` ✓ Xe.CI.Full: " Patchwork
2025-07-09 13:14 ` [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Philipp Stanner
12 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-07-08 16:22 UTC (permalink / raw)
To: Maíra Canal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 897 bytes --]
== Series Details ==
Series: drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
URL : https://patchwork.freedesktop.org/series/149696/
State : success
== Summary ==
CI Bug Log - changes from xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996_BAT -> xe-pw-149696v4_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996 -> xe-pw-149696v4
IGT_8445: 8445
xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996: 56ce5c21690fd8995ee447f790a15485cb49b996
xe-pw-149696v4: 149696v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/index.html
[-- Attachment #2: Type: text/html, Size: 1445 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✓ Xe.CI.Full: success for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (10 preceding siblings ...)
2025-07-08 16:22 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-07-08 18:14 ` Patchwork
2025-07-09 13:14 ` [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Philipp Stanner
12 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-07-08 18:14 UTC (permalink / raw)
To: Maíra Canal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 81248 bytes --]
== Series Details ==
Series: drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4)
URL : https://patchwork.freedesktop.org/series/149696/
State : success
== Summary ==
CI Bug Log - changes from xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996_FULL -> xe-pw-149696v4_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-149696v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- shard-dg2-set2: [PASS][1] -> [SKIP][2] ([Intel XE#2134]) +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@fbdev@info.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@fbdev@info.html
* igt@intel_sysfs_debugfs@xe-forcewake:
- shard-dg2-set2: [PASS][3] -> [SKIP][4] ([Intel XE#4208] / [Intel XE#4618])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@intel_sysfs_debugfs@xe-forcewake.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@intel_sysfs_debugfs@xe-forcewake.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-adlp: [PASS][5] -> [DMESG-WARN][6] ([Intel XE#2953] / [Intel XE#4173]) +4 other tests dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2370])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][8] -> [FAIL][9] ([Intel XE#3908]) +1 other test fail
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-9/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@x-tiled-addfb:
- shard-dg2-set2: [PASS][10] -> [SKIP][11] ([Intel XE#2351] / [Intel XE#4208]) +13 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_big_fb@x-tiled-addfb.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_big_fb@x-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1124])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2887]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#787]) +146 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#455] / [Intel XE#787]) +20 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [PASS][16] -> [INCOMPLETE][17] ([Intel XE#3862]) +1 other test incomplete
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][18] -> [INCOMPLETE][19] ([Intel XE#1727] / [Intel XE#3113])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_cdclk@mode-transition@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#4417]) +3 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html
* igt@kms_chamelium_color@degamma:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2325]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2252])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2320])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2291])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [PASS][25] -> [SKIP][26] ([Intel XE#2291]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2286])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dp_aux_dev:
- shard-bmg: [PASS][28] -> [SKIP][29] ([Intel XE#3009])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-8/igt@kms_dp_aux_dev.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_dp_aux_dev.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2244])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#2316]) +4 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-8/igt@kms_flip@2x-flip-vs-dpms.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1:
- shard-adlp: [PASS][33] -> [DMESG-WARN][34] ([Intel XE#4543]) +1 other test dmesg-warn
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][35] -> [FAIL][36] ([Intel XE#301])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend:
- shard-bmg: [PASS][37] -> [INCOMPLETE][38] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-8/igt@kms_flip@flip-vs-suspend.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-1/igt@kms_flip@flip-vs-suspend.html
- shard-dg2-set2: [PASS][39] -> [INCOMPLETE][40] ([Intel XE#2049] / [Intel XE#2597])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-432/igt@kms_flip@flip-vs-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend@c-dp4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][41] ([Intel XE#2049] / [Intel XE#2597])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_flip@flip-vs-suspend@c-dp4.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#455]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x:
- shard-adlp: [PASS][43] -> [DMESG-FAIL][44] ([Intel XE#4543])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y:
- shard-adlp: [PASS][45] -> [FAIL][46] ([Intel XE#1874])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2311]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2313]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2312]) +6 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: [PASS][50] -> [SKIP][51] ([Intel XE#455])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-434/igt@kms_hdr@invalid-hdr.html
* igt@kms_pm_backlight@basic-brightness:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#870])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#1489]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr2-basic:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_psr@fbc-psr2-basic.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#3414] / [Intel XE#3904])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2413])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_vblank@accuracy-idle:
- shard-dg2-set2: [PASS][57] -> [SKIP][58] ([Intel XE#4208] / [i915#2575]) +86 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_vblank@accuracy-idle.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_vblank@accuracy-idle.html
* igt@kms_vrr@flip-suspend:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#1499])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@kms_vrr@flip-suspend.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#4837]) +2 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-dg2-set2: [PASS][61] -> [SKIP][62] ([Intel XE#4208]) +177 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: [PASS][63] -> [SKIP][64] ([Intel XE#1392]) +2 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-464/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2322]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: NOTRUN -> [DMESG-WARN][66] ([Intel XE#3876])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#4943]) +3 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-huge-nomemset.html
* igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][68] ([Intel XE#1173])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#4650])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_query@multigpu-query-topology:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#944])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@xe_query@multigpu-query-topology.html
#### Possible fixes ####
* igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries:
- shard-dg2-set2: [SKIP][71] ([Intel XE#4208] / [Intel XE#4618]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][73] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [SKIP][75] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][76] +9 other tests pass
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-bmg: [SKIP][77] ([Intel XE#2291]) -> [PASS][78] +2 other tests pass
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-bmg: [SKIP][79] ([Intel XE#2316]) -> [PASS][80] +8 other tests pass
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-3/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-lnl: [FAIL][81] ([Intel XE#301]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-adlp: [DMESG-WARN][83] -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-4/igt@kms_flip@flip-vs-rmfb-interruptible.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-4/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][85] ([Intel XE#4543]) -> [PASS][86] +2 other tests pass
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-4/igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a1.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-4/igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y:
- shard-adlp: [DMESG-FAIL][87] ([Intel XE#4543]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x:
- shard-adlp: [FAIL][89] ([Intel XE#1874]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][91] ([Intel XE#1503]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [SKIP][93] ([Intel XE#3012]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-3/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_lease@lease-invalid-crtc:
- shard-dg2-set2: [SKIP][95] ([Intel XE#4208] / [i915#2575]) -> [PASS][96] +89 other tests pass
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_lease@lease-invalid-crtc.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_lease@lease-invalid-crtc.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][97] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][98] +8 other tests pass
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-adlp-3/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-adlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [SKIP][99] ([Intel XE#4596]) -> [PASS][100] +1 other test pass
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [FAIL][101] ([Intel XE#2883]) -> [PASS][102] +2 other tests pass
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-lnl-2/igt@kms_setmode@basic@pipe-b-edp-1.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-lnl-1/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-bmg: [SKIP][103] ([Intel XE#1435]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-7/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
- shard-dg2-set2: [SKIP][105] ([Intel XE#1392]) -> [PASS][106] +1 other test pass
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
* igt@xe_module_load@reload:
- shard-dg2-set2: [FAIL][107] ([Intel XE#4208]) -> [PASS][108] +3 other tests pass
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_module_load@reload.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_module_load@reload.html
* igt@xe_vm@large-split-binds-536870912:
- shard-dg2-set2: [SKIP][109] ([Intel XE#4208]) -> [PASS][110] +199 other tests pass
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_vm@large-split-binds-536870912.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_vm@large-split-binds-536870912.html
#### Warnings ####
* igt@kms_async_flips@invalid-async-flip:
- shard-dg2-set2: [SKIP][111] ([Intel XE#873]) -> [SKIP][112] ([Intel XE#4208] / [i915#2575])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_async_flips@invalid-async-flip.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-dg2-set2: [SKIP][113] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][114] ([Intel XE#316])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-dg2-set2: [SKIP][115] ([Intel XE#316]) -> [SKIP][116] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-270:
- shard-dg2-set2: [SKIP][117] ([Intel XE#316]) -> [SKIP][118] ([Intel XE#4208]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-dg2-set2: [SKIP][119] ([Intel XE#4208]) -> [SKIP][120] ([Intel XE#316]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][121] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][122] ([Intel XE#607])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
- shard-dg2-set2: [SKIP][123] ([Intel XE#4208]) -> [SKIP][124] ([Intel XE#1124]) +4 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-dg2-set2: [SKIP][125] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][126] ([Intel XE#1124]) +3 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][127] ([Intel XE#1124]) -> [SKIP][128] ([Intel XE#2351] / [Intel XE#4208]) +4 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
- shard-dg2-set2: [SKIP][129] ([Intel XE#1124]) -> [SKIP][130] ([Intel XE#4208]) +6 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: [SKIP][131] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][132] ([Intel XE#619])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][133] ([Intel XE#4208]) -> [SKIP][134] ([Intel XE#610])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-dg2-set2: [SKIP][135] ([Intel XE#4208] / [i915#2575]) -> [SKIP][136] ([Intel XE#2191])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2160x1440p:
- shard-dg2-set2: [SKIP][137] ([Intel XE#4208] / [i915#2575]) -> [SKIP][138] ([Intel XE#367]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2560x1440p:
- shard-dg2-set2: [SKIP][139] ([Intel XE#367]) -> [SKIP][140] ([Intel XE#4208] / [i915#2575]) +3 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
- shard-dg2-set2: [SKIP][141] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][142] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][143] ([Intel XE#4208]) -> [SKIP][144] ([Intel XE#3442])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-set2: [SKIP][145] ([Intel XE#3442]) -> [SKIP][146] ([Intel XE#4208])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][147] ([Intel XE#2907]) -> [SKIP][148] ([Intel XE#4208]) +2 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-dg2-set2: [SKIP][149] ([Intel XE#4208]) -> [SKIP][150] ([Intel XE#2907])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs:
- shard-dg2-set2: [SKIP][151] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][152] ([Intel XE#2351] / [Intel XE#4208])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][153] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [INCOMPLETE][154] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs:
- shard-dg2-set2: [SKIP][155] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][156] ([Intel XE#4208]) +9 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs:
- shard-dg2-set2: [SKIP][157] ([Intel XE#4208]) -> [SKIP][158] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-dg2-set2: [SKIP][159] ([Intel XE#306]) -> [SKIP][160] ([Intel XE#4208] / [i915#2575])
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_chamelium_color@ctm-0-50.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-dg2-set2: [SKIP][161] ([Intel XE#4208] / [i915#2575]) -> [SKIP][162] ([Intel XE#306]) +3 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_chamelium_color@ctm-limited-range.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2-set2: [SKIP][163] ([Intel XE#4208] / [i915#2575]) -> [SKIP][164] ([Intel XE#373]) +6 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd:
- shard-dg2-set2: [SKIP][165] ([Intel XE#373]) -> [SKIP][166] ([Intel XE#4208] / [i915#2575]) +9 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_chamelium_hpd@vga-hpd.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_chamelium_hpd@vga-hpd.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][167] ([Intel XE#1178]) -> [SKIP][168] ([Intel XE#2341])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-7/igt@kms_content_protection@legacy.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2-set2: [SKIP][169] ([Intel XE#308]) -> [SKIP][170] ([Intel XE#4208] / [i915#2575]) +3 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_cursor_crc@cursor-onscreen-512x170.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-dg2-set2: [SKIP][171] ([Intel XE#4208] / [i915#2575]) -> [SKIP][172] ([Intel XE#308]) +2 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_cursor_crc@cursor-onscreen-512x512.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg2-set2: [SKIP][173] ([Intel XE#4208] / [i915#2575]) -> [SKIP][174] ([Intel XE#323])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-dg2-set2: [SKIP][175] ([Intel XE#4356]) -> [SKIP][176] ([Intel XE#4208])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_dp_link_training@uhbr-sst.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2-set2: [SKIP][177] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][178] ([Intel XE#455]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_dsc@dsc-with-bpc-formats.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2-set2: [SKIP][179] ([Intel XE#4208] / [i915#2575]) -> [SKIP][180] ([Intel XE#703])
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_feature_discovery@display-3x.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2-set2: [SKIP][181] ([Intel XE#4208] / [i915#2575]) -> [SKIP][182] ([Intel XE#1137])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_feature_discovery@dp-mst.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-dg2-set2: [SKIP][183] ([Intel XE#455]) -> [SKIP][184] ([Intel XE#4208]) +4 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-dg2-set2: [SKIP][185] ([Intel XE#455]) -> [SKIP][186] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
- shard-dg2-set2: [SKIP][187] ([Intel XE#4208]) -> [SKIP][188] ([Intel XE#455]) +1 other test skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][189] ([Intel XE#4208]) -> [SKIP][190] ([Intel XE#651]) +23 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][191] ([Intel XE#2312]) -> [SKIP][192] ([Intel XE#2311]) +16 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][193] ([Intel XE#2312]) -> [SKIP][194] ([Intel XE#5390]) +6 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][195] ([Intel XE#5390]) -> [SKIP][196] ([Intel XE#2312]) +5 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: [SKIP][197] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][198] ([Intel XE#651]) +4 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
- shard-dg2-set2: [SKIP][199] ([Intel XE#651]) -> [SKIP][200] ([Intel XE#4208]) +15 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][201] ([Intel XE#2311]) -> [SKIP][202] ([Intel XE#2312]) +10 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [SKIP][203] ([Intel XE#651]) -> [SKIP][204] ([Intel XE#2351] / [Intel XE#4208]) +12 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][205] ([Intel XE#2313]) -> [SKIP][206] ([Intel XE#2312]) +10 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][207] ([Intel XE#2312]) -> [SKIP][208] ([Intel XE#2313]) +14 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render:
- shard-dg2-set2: [SKIP][209] ([Intel XE#653]) -> [SKIP][210] ([Intel XE#2351] / [Intel XE#4208]) +13 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg2-set2: [SKIP][211] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][212] ([Intel XE#653]) +5 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2-set2: [SKIP][213] ([Intel XE#658]) -> [SKIP][214] ([Intel XE#2351] / [Intel XE#4208])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][215] ([Intel XE#653]) -> [SKIP][216] ([Intel XE#4208]) +15 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-dg2-set2: [SKIP][217] ([Intel XE#4208]) -> [SKIP][218] ([Intel XE#653]) +23 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-slowdraw.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-slowdraw.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-dg2-set2: [SKIP][219] ([Intel XE#2925]) -> [SKIP][220] ([Intel XE#4208]) +1 other test skip
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2-set2: [SKIP][221] ([Intel XE#4359]) -> [SKIP][222] ([Intel XE#4208])
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2-set2: [SKIP][223] ([Intel XE#5020]) -> [SKIP][224] ([Intel XE#4208] / [i915#2575])
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_plane_multiple@tiling-y.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_plane_multiple@tiling-y.html
* igt@kms_pm_backlight@fade:
- shard-dg2-set2: [SKIP][225] ([Intel XE#4208]) -> [SKIP][226] ([Intel XE#870]) +1 other test skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_pm_backlight@fade.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_pm_backlight@fade.html
* igt@kms_pm_dc@dc6-dpms:
- shard-dg2-set2: [SKIP][227] ([Intel XE#908]) -> [SKIP][228] ([Intel XE#2351] / [Intel XE#4208])
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_pm_dc@dc6-dpms.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-dg2-set2: [SKIP][229] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][230] ([Intel XE#1129])
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_pm_dc@dc6-psr.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: [SKIP][231] ([Intel XE#1489]) -> [SKIP][232] ([Intel XE#4208]) +7 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
- shard-dg2-set2: [SKIP][233] ([Intel XE#4208]) -> [SKIP][234] ([Intel XE#1489]) +7 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-dg2-set2: [SKIP][235] ([Intel XE#4208]) -> [SKIP][236] ([Intel XE#1122])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_psr2_su@frontbuffer-xrgb8888.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-psr2-no-drrs:
- shard-dg2-set2: [SKIP][237] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][238] ([Intel XE#4208]) +11 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_psr@fbc-psr2-no-drrs.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_psr@fbc-psr2-no-drrs.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-dg2-set2: [SKIP][239] ([Intel XE#4208]) -> [SKIP][240] ([Intel XE#2850] / [Intel XE#929]) +10 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-move.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: [SKIP][241] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][242] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_psr@psr-dpms.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@kms_psr@psr-dpms.html
* igt@kms_psr@psr-sprite-blt:
- shard-dg2-set2: [SKIP][243] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][244] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@kms_psr@psr-sprite-blt.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_psr@psr-sprite-blt.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2-set2: [SKIP][245] ([Intel XE#3414]) -> [SKIP][246] ([Intel XE#4208] / [i915#2575])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-dg2-set2: [SKIP][247] ([Intel XE#455]) -> [SKIP][248] ([Intel XE#4208] / [i915#2575]) +5 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@kms_scaling_modes@scaling-mode-full.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_scaling_modes@scaling-mode-full.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: [SKIP][249] ([Intel XE#362]) -> [SKIP][250] ([Intel XE#1500])
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_tv_load_detect@load-detect:
- shard-dg2-set2: [SKIP][251] ([Intel XE#330]) -> [SKIP][252] ([Intel XE#4208] / [i915#2575])
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@kms_tv_load_detect@load-detect.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flipline:
- shard-dg2-set2: [SKIP][253] ([Intel XE#4208] / [i915#2575]) -> [SKIP][254] ([Intel XE#455]) +5 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@kms_vrr@flipline.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@kms_vrr@flipline.html
* igt@xe_compute_preempt@compute-preempt-many:
- shard-dg2-set2: [SKIP][255] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][256] ([Intel XE#4208])
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_compute_preempt@compute-preempt-many.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_compute_preempt@compute-preempt-many.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-dg2-set2: [SKIP][257] ([Intel XE#1126]) -> [SKIP][258] ([Intel XE#4208]) +1 other test skip
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0x3fff.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_eu_stall@invalid-event-report-count:
- shard-dg2-set2: [SKIP][259] ([Intel XE#5419]) -> [SKIP][260] ([Intel XE#4208]) +1 other test skip
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@xe_eu_stall@invalid-event-report-count.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_eu_stall@invalid-event-report-count.html
* igt@xe_eu_stall@invalid-gt-id:
- shard-dg2-set2: [SKIP][261] ([Intel XE#4208]) -> [SKIP][262] ([Intel XE#5419]) +1 other test skip
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_eu_stall@invalid-gt-id.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@xe_eu_stall@invalid-gt-id.html
* igt@xe_eudebug@vm-bind-clear-faultable:
- shard-dg2-set2: [SKIP][263] ([Intel XE#4837]) -> [SKIP][264] ([Intel XE#4208]) +13 other tests skip
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@xe_eudebug@vm-bind-clear-faultable.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_eudebug@vm-bind-clear-faultable.html
* igt@xe_eudebug_online@resume-dss:
- shard-dg2-set2: [SKIP][265] ([Intel XE#4208]) -> [SKIP][266] ([Intel XE#4837]) +11 other tests skip
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_eudebug_online@resume-dss.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_eudebug_online@resume-dss.html
* igt@xe_exec_fault_mode@once-invalid-userptr-fault:
- shard-dg2-set2: [SKIP][267] ([Intel XE#4208]) -> [SKIP][268] ([Intel XE#288]) +22 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html
* igt@xe_exec_fault_mode@twice-invalid-fault:
- shard-dg2-set2: [SKIP][269] ([Intel XE#288]) -> [SKIP][270] ([Intel XE#4208]) +22 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_exec_fault_mode@twice-invalid-fault.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_exec_fault_mode@twice-invalid-fault.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-dg2-set2: [SKIP][271] ([Intel XE#4208]) -> [DMESG-WARN][272] ([Intel XE#3876])
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_exec_reset@parallel-gt-reset.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc:
- shard-dg2-set2: [SKIP][273] ([Intel XE#4208]) -> [SKIP][274] ([Intel XE#4915]) +246 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck:
- shard-dg2-set2: [SKIP][275] ([Intel XE#4915]) -> [SKIP][276] ([Intel XE#4208]) +247 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-dg2-set2: [SKIP][277] ([Intel XE#4208]) -> [ABORT][278] ([Intel XE#4917])
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-432/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_oa@create-destroy-userspace-config:
- shard-dg2-set2: [SKIP][279] ([Intel XE#4208]) -> [SKIP][280] ([Intel XE#2541] / [Intel XE#3573]) +6 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_oa@create-destroy-userspace-config.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_oa@create-destroy-userspace-config.html
* igt@xe_oa@oa-unit-exclusive-stream-sample-oa:
- shard-dg2-set2: [SKIP][281] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][282] ([Intel XE#4208]) +5 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
* igt@xe_oa@syncs-syncobj-wait:
- shard-dg2-set2: [SKIP][283] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][284] ([Intel XE#4208])
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@xe_oa@syncs-syncobj-wait.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_oa@syncs-syncobj-wait.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: [SKIP][285] ([Intel XE#4208]) -> [SKIP][286] ([Intel XE#2838] / [Intel XE#979])
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_pat@pat-index-xehpc.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-433/igt@xe_pat@pat-index-xehpc.html
* igt@xe_peer2peer@write:
- shard-dg2-set2: [SKIP][287] ([Intel XE#1061] / [Intel XE#4208]) -> [FAIL][288] ([Intel XE#1173])
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_peer2peer@write.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-mmap-system:
- shard-dg2-set2: [SKIP][289] ([Intel XE#4208]) -> [SKIP][290] ([Intel XE#2284] / [Intel XE#366])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_pm@d3cold-mmap-system.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_pm@d3cold-mmap-system.html
* igt@xe_pm@s3-d3cold-basic-exec:
- shard-dg2-set2: [SKIP][291] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][292] ([Intel XE#4208])
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@xe_pm@s3-d3cold-basic-exec.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_pm@s3-d3cold-basic-exec.html
* igt@xe_pxp@display-pxp-fb:
- shard-dg2-set2: [SKIP][293] ([Intel XE#4208]) -> [SKIP][294] ([Intel XE#4733]) +2 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_pxp@display-pxp-fb.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_pxp@display-pxp-fb.html
* igt@xe_pxp@pxp-stale-bo-bind-post-suspend:
- shard-dg2-set2: [SKIP][295] ([Intel XE#4733]) -> [SKIP][296] ([Intel XE#4208]) +2 other tests skip
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html
* igt@xe_query@multigpu-query-engines:
- shard-dg2-set2: [SKIP][297] ([Intel XE#944]) -> [SKIP][298] ([Intel XE#4208]) +2 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@xe_query@multigpu-query-engines.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_query@multigpu-query-engines.html
* igt@xe_query@multigpu-query-topology:
- shard-dg2-set2: [SKIP][299] ([Intel XE#4208]) -> [SKIP][300] ([Intel XE#944]) +1 other test skip
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_query@multigpu-query-topology.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_query@multigpu-query-topology.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-dg2-set2: [SKIP][301] ([Intel XE#4208]) -> [SKIP][302] ([Intel XE#4814])
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_render_copy@render-stress-4-copies.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-dg2-set2: [SKIP][303] ([Intel XE#4208]) -> [SKIP][304] ([Intel XE#4821])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_spin_batch@spin-mem-copy.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-435/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-dg2-set2: [SKIP][305] ([Intel XE#4130]) -> [SKIP][306] ([Intel XE#4208])
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: [SKIP][307] ([Intel XE#3342]) -> [SKIP][308] ([Intel XE#4208])
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-434/igt@xe_sriov_flr@flr-each-isolation.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_flr@flr-twice:
- shard-dg2-set2: [SKIP][309] ([Intel XE#4273]) -> [SKIP][310] ([Intel XE#4208])
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-466/igt@xe_sriov_flr@flr-twice.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-436/igt@xe_sriov_flr@flr-twice.html
* igt@xe_sriov_scheduling@equal-throughput:
- shard-dg2-set2: [SKIP][311] ([Intel XE#4208]) -> [SKIP][312] ([Intel XE#4351])
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996/shard-dg2-436/igt@xe_sriov_scheduling@equal-throughput.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/shard-dg2-464/igt@xe_sriov_scheduling@equal-throughput.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
[Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4618
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5419
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* Linux: xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996 -> xe-pw-149696v4
IGT_8445: 8445
xe-3370-56ce5c21690fd8995ee447f790a15485cb49b996: 56ce5c21690fd8995ee447f790a15485cb49b996
xe-pw-149696v4: 149696v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149696v4/index.html
[-- Attachment #2: Type: text/html, Size: 101633 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
2025-07-08 13:25 ` [PATCH v5 7/8] drm/xe: " Maíra Canal
@ 2025-07-08 18:35 ` Matthew Brost
0 siblings, 0 replies; 27+ messages in thread
From: Matthew Brost @ 2025-07-08 18:35 UTC (permalink / raw)
To: Maíra Canal
Cc: Danilo Krummrich, Philipp Stanner, Christian König,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau, kernel-dev, dri-devel, etnaviv,
intel-xe
On Tue, Jul 08, 2025 at 10:25:47AM -0300, Maíra Canal wrote:
> Xe can skip the reset if TDR has fired before the free job worker and can
> also re-arm the timeout timer in some scenarios. Instead of manipulating
> scheduler's internals, inform the scheduler that the job did not actually
> timeout and no reset was performed through the new status code
> DRM_GPU_SCHED_STAT_NO_HANG.
>
> Note that, in the first case, there is no need to restart submission if it
> hasn't been stopped.
>
> Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_submit.c | 12 +++---------
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 1430b58d096b03a78292e523e3ee7c5dddd7efdd..cafb47711e9b3fab3b4b4197965835197caabe9b 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -1093,12 +1093,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> * list so job can be freed and kick scheduler ensuring free job is not
> * lost.
> */
> - if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags)) {
> - xe_sched_add_pending_job(sched, job);
> - xe_sched_submission_start(sched);
> -
> - return DRM_GPU_SCHED_STAT_RESET;
> - }
> + if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags))
> + return DRM_GPU_SCHED_STAT_NO_HANG;
>
> /* Kill the run_job entry point */
> xe_sched_submission_stop(sched);
> @@ -1277,10 +1273,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> * but there is not currently an easy way to do in DRM scheduler. With
> * some thought, do this in a follow up.
> */
> - xe_sched_add_pending_job(sched, job);
> xe_sched_submission_start(sched);
> -
> - return DRM_GPU_SCHED_STAT_RESET;
> + return DRM_GPU_SCHED_STAT_NO_HANG;
> }
>
> static void __guc_exec_queue_fini_async(struct work_struct *w)
>
> --
> 2.50.0
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-08 13:25 ` [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running Maíra Canal
@ 2025-07-09 13:08 ` Philipp Stanner
2025-07-11 13:22 ` Christian König
1 sibling, 0 replies; 27+ messages in thread
From: Philipp Stanner @ 2025-07-09 13:08 UTC (permalink / raw)
To: Maíra Canal, Matthew Brost, Danilo Krummrich,
Philipp Stanner, Christian König, Tvrtko Ursulin,
Simona Vetter, David Airlie, Melissa Wen, Lucas Stach,
Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On Tue, 2025-07-08 at 10:25 -0300, Maíra Canal wrote:
> When the DRM scheduler times out, it's possible that the GPU isn't
> hung;
> instead, a job just took unusually long (longer than the timeout) but
> is
> still running, and there is, thus, no reason to reset the hardware.
> This
> can occur in two scenarios:
>
> 1. The job is taking longer than the timeout, but the driver
> determined
> through a GPU-specific mechanism that the hardware is still
> making
> progress. Hence, the driver would like the scheduler to skip the
> timeout and treat the job as still pending from then onward.
> This
> happens in v3d, Etnaviv, and Xe.
> 2. Timeout has fired before the free-job worker. Consequently, the
> scheduler calls `sched->ops->timedout_job()` for a job that
> isn't
> timed out.
>
> These two scenarios are problematic because the job was removed from
> the
> `sched->pending_list` before calling `sched->ops->timedout_job()`,
> which
> means that when the job finishes, it won't be freed by the scheduler
> though `sched->ops->free_job()` - leading to a memory leak.
>
> To solve these problems, create a new `drm_gpu_sched_stat`, called
> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset.
> The
> new status will indicate that the job must be reinserted into
> `sched->pending_list`, and the hardware / driver will still complete
> that
> job.
>
> Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Philipp Stanner <phasta@kernel.org>
> ---
> drivers/gpu/drm/scheduler/sched_main.c | 46
> ++++++++++++++++++++++++++++++++--
> include/drm/gpu_scheduler.h | 3 +++
> 2 files changed, 47 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c
> b/drivers/gpu/drm/scheduler/sched_main.c
> index
> 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3
> d025c1e6bfc9f 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct
> drm_gpu_scheduler *sched)
> {
> struct drm_sched_job *job;
>
> - spin_lock(&sched->job_list_lock);
> job = list_first_entry_or_null(&sched->pending_list,
> struct drm_sched_job, list);
> if (job && dma_fence_is_signaled(&job->s_fence->finished))
> __drm_sched_run_free_queue(sched);
> +}
> +
> +static void drm_sched_run_free_queue_unlocked(struct
> drm_gpu_scheduler *sched)
> +{
> + spin_lock(&sched->job_list_lock);
> + drm_sched_run_free_queue(sched);
> spin_unlock(&sched->job_list_lock);
> }
>
> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct
> drm_sched_job *s_job)
> spin_unlock(&sched->job_list_lock);
> }
>
> +/**
> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a
> false timeout
> + * @sched: scheduler instance
> + * @job: job to be reinserted on the pending list
> + *
> + * In the case of a "false timeout" - when a timeout occurs but the
> GPU isn't
> + * hung and is making progress, the scheduler must reinsert the job
> back into
> + * @sched->pending_list. Otherwise, the job and its resources won't
> be freed
> + * through the &struct drm_sched_backend_ops.free_job callback.
> + *
> + * This function must be used in "false timeout" cases only.
> + */
> +static void drm_sched_job_reinsert_on_false_timeout(struct
> drm_gpu_scheduler *sched,
> + struct
> drm_sched_job *job)
> +{
> + spin_lock(&sched->job_list_lock);
> + list_add(&job->list, &sched->pending_list);
> +
> + /* After reinserting the job, the scheduler enqueues the
> free-job work
> + * again if ready. Otherwise, a signaled job could be added
> to the
> + * pending list, but never freed.
> + */
> + drm_sched_run_free_queue(sched);
> + spin_unlock(&sched->job_list_lock);
> +}
> +
> static void drm_sched_job_timedout(struct work_struct *work)
> {
> struct drm_gpu_scheduler *sched;
> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct
> work_struct *work)
> job->sched->ops->free_job(job);
> sched->free_guilty = false;
> }
> +
> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
> + drm_sched_job_reinsert_on_false_timeout(sche
> d, job);
> } else {
> spin_unlock(&sched->job_list_lock);
> }
> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct
> work_struct *work)
> * This function is typically used for reset recovery (see the docu
> of
> * drm_sched_backend_ops.timedout_job() for details). Do not call it
> for
> * scheduler teardown, i.e., before calling drm_sched_fini().
> + *
> + * As it's only used for reset recovery, drivers must not call this
> function
> + * in their &struct drm_sched_backend_ops.timedout_job callback when
> they
> + * skip a reset using &enum
> drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> */
> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct
> drm_sched_job *bad)
> {
> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
> * drm_sched_backend_ops.timedout_job() for details). Do not call it
> for
> * scheduler startup. The scheduler itself is fully operational
> after
> * drm_sched_init() succeeded.
> + *
> + * As it's only used for reset recovery, drivers must not call this
> function
> + * in their &struct drm_sched_backend_ops.timedout_job callback when
> they
> + * skip a reset using &enum
> drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> */
> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
> {
> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct
> work_struct *w)
> if (job)
> sched->ops->free_job(job);
>
> - drm_sched_run_free_queue(sched);
> + drm_sched_run_free_queue_unlocked(sched);
> drm_sched_run_job_queue(sched);
> }
>
> diff --git a/include/drm/gpu_scheduler.h
> b/include/drm/gpu_scheduler.h
> index
> 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e1
> 59de59b263c76 100644
> --- a/include/drm/gpu_scheduler.h
> +++ b/include/drm/gpu_scheduler.h
> @@ -393,11 +393,14 @@ struct drm_sched_job {
> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available
> anymore.
> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption,
> the GPU
> + * did not hang and is still running.
> */
> enum drm_gpu_sched_stat {
> DRM_GPU_SCHED_STAT_NONE,
> DRM_GPU_SCHED_STAT_RESET,
> DRM_GPU_SCHED_STAT_ENODEV,
> + DRM_GPU_SCHED_STAT_NO_HANG,
> };
>
> /**
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
` (11 preceding siblings ...)
2025-07-08 18:14 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-07-09 13:14 ` Philipp Stanner
2025-07-10 11:27 ` Maíra Canal
12 siblings, 1 reply; 27+ messages in thread
From: Philipp Stanner @ 2025-07-09 13:14 UTC (permalink / raw)
To: Maíra Canal, Matthew Brost, Danilo Krummrich,
Philipp Stanner, Christian König, Tvrtko Ursulin,
Simona Vetter, David Airlie, Melissa Wen, Lucas Stach,
Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Min Ma, Lizhi Hou,
Oded Gabbay, Frank Binns, Matt Coster, Qiang Yu, Lyude Paul,
Alex Deucher, Christian König
On Tue, 2025-07-08 at 10:25 -0300, Maíra Canal wrote:
> TL;DR: The only two patches that are lacking R-b's are:
>
> [PATCH 2/8] drm/sched: Allow drivers to skip the reset and keep on running
> [PATCH 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
> -> If Intel CI succeeds, it's Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>
> For those two patches, it would be great to gather feedback and/or R-b's,
> particularly from the Intel folks.
>
> Thanks for all the reviews so far!
>
> ---
> When the DRM scheduler times out, it's possible that the GPU isn't hung;
> instead, a job may still be running, and there may be no valid reason to
> reset the hardware. This can occur in two situations:
>
> 1. The GPU exposes some mechanism that ensures the GPU is still making
> progress. By checking this mechanism, the driver can safely skip the
> reset, re-arm the timeout, and allow the job to continue running until
> completion. This is the case for v3d, Etnaviv, and Xe.
>
> 2. Timeout has fired before the free-job worker. Consequently, the
> scheduler calls `timedout_job()` for a job that isn't timed out.
>
> These two scenarios are problematic because the job was removed from the
> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
> means that when the job finishes, it won't be freed by the scheduler
> though `sched->ops->free_job()`. As a result, the job and its resources
> won't be freed, leading to a memory leak.
>
> For v3d specifically, we have observed that these memory leaks can be
> significant in certain scenarios, as reported by users in [1][2]. To
> address this situation, I submitted a patch similar to commit 704d3d60fec4
> ("drm/etnaviv: don't block scheduler when GPU is still active") for v3d [3].
> This patch has already landed in drm-misc-fixes and successfully resolved
> the users' issues.
>
> However, as I mentioned in [3], exposing the scheduler's internals within
> the drivers isn't ideal and I believe this specific situation can be
> addressed within the DRM scheduler framework.
>
> This series aims to resolve this issue by adding a new DRM sched status
> that allows a driver to skip the reset. This new status will indicate that
> the job should be reinserted into the pending list, and the driver will
> still signal its completion.
>
> [1] https://gitlab.freedesktop.org/mesa/mesa/-/issues/12227
> [2] https://github.com/raspberrypi/linux/issues/6817
> [3] https://lore.kernel.org/dri-devel/20250430210643.57924-1-mcanal@igalia.com/T/
>
> Best Regards,
> - Maíra
>
> ---
> v1 -> v2:
>
> - Fix several grammar nits across the documentation and commit messages.
> - Drop "drm/sched: Always free the job after the timeout" (Tvrtko Ursulin)
> - [1/8] NEW PATCH: Rename DRM_GPU_SCHED_STAT_NOMINAL to a more semantic
> name (Tvrtko Ursulin, Philipp Stanner)
> - [2/8] Rename DRM_GPU_SCHED_STAT_RUNNING to DRM_GPU_SCHED_STAT_NO_HANG (Tvrtko Ursulin, Philipp Stanner)
> - [2/8] Requeue free-job work after reinserting the job to the pending list (Matthew Brost)
> - [2/8] Create a helper function to reinsert the job (Philipp Stanner)
> - [2/8] Rewrite the commit message (Philipp Stanner)
> - [2/8] Add a comment to `drm_sched_start()` documentation, similar to what
> was commented in `drm_sched_stop()` (Philipp Stanner)
> - [3/8] Keep HZ as timeout for `drm_mock_sched_job_wait_scheduled()` (Tvrtko Ursulin)
> - [4/8] Use a job flag to indicate that `timedout_job()` should skip the
> reset (Tvrtko Ursulin)
> - [7/8] Use DRM_GPU_SCHED_STAT_NO_HANG to re-arm the timer in other cases
> as well (Matthew Brost)
> - Link to v1: https://lore.kernel.org/r/20250503-sched-skip-reset-v1-0-ed0d6701a3fe@igalia.com
>
> v2 -> v3:
>
> - [2/8] Address comments about the commit message (Philipp Stanner)
> - [2/8] Improve comments and documentation style (Philipp Stanner)
> - [3/8] Rename the commit title to "drm/sched: Make timeout KUnit tests faster" (Philipp Stanner)
> - [3/8] Add Tvrtko's R-b (Tvrtko Ursulin)
> - [4/8] Instead of setting up a job duration, advance it manually (Tvrtko Ursulin)
> - [4/8] Wait for 2 * MOCK_TIMEOUT instead of MOCK_TIMEOUT (Tvrtko Ursulin)
> - [5/8, 6/8, 7/8, 8/8] Use Philipp's suggestion to improve the commit messages (Philipp Stanner)
> - Link to v2: https://lore.kernel.org/r/20250530-sched-skip-reset-v2-0-c40a8d2d8daa@igalia.com
>
> v3 -> v4:
>
> - [1/8] s/betters/better and Philipp's R-b (Philipp Stanner)
> - [2/8] Apply some documentation nits (Philipp Stanner)
> - [3/8] Add Philipp's A-b (Philipp Stanner)
> - [4/8, 5/8] Add Tvrtko's R-b (Tvrtko Ursulin)
> - [6/8] Add Lucas' R-b (Lucas Stach)
> - Link to v3: https://lore.kernel.org/r/20250618-sched-skip-reset-v3-0-8be5cca2725d@igalia.com
>
> v4 -> v5:
>
> - Rebased on top of drm-tip (for Intel CI)
> - [2/8] Reword the commit message (Philipp Stanner)
> - [2/8] Reword several comments (Philipp Stanner)
> - [4/8] Add Philipp's R-b (Philipp Stanner)
> - Link to v4: https://lore.kernel.org/r/20250707-sched-skip-reset-v4-0-036c0f0f584f@igalia.com
>
> ---
> Maíra Canal (8):
> drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
> drm/sched: Allow drivers to skip the reset and keep on running
> drm/sched: Make timeout KUnit tests faster
> drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG
> drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
> drm/etnaviv: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
> drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
> drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>
> drivers/accel/amdxdna/aie2_ctx.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
> drivers/gpu/drm/etnaviv/etnaviv_sched.c | 16 +++----
> drivers/gpu/drm/imagination/pvr_queue.c | 4 +-
> drivers/gpu/drm/lima/lima_sched.c | 6 +--
> drivers/gpu/drm/nouveau/nouveau_exec.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_sched.c | 2 +-
> drivers/gpu/drm/panfrost/panfrost_job.c | 10 ++---
> drivers/gpu/drm/panthor/panthor_mmu.c | 2 +-
> drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
> drivers/gpu/drm/scheduler/sched_main.c | 48 +++++++++++++++++++--
> drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 7 ++-
> drivers/gpu/drm/scheduler/tests/sched_tests.h | 1 +
> drivers/gpu/drm/scheduler/tests/tests_basic.c | 55 ++++++++++++++++++++++--
> drivers/gpu/drm/v3d/v3d_sched.c | 18 ++------
> drivers/gpu/drm/xe/xe_guc_submit.c | 14 ++----
> include/drm/gpu_scheduler.h | 7 ++-
> 17 files changed, 137 insertions(+), 61 deletions(-)
Does not apply to drm-misc-next:
Applying: drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
error: patch failed: drivers/gpu/drm/etnaviv/etnaviv_sched.c:87
error: drivers/gpu/drm/etnaviv/etnaviv_sched.c: patch does not apply
Patch failed at 0001 drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
Awkward. That file has last been touched months ago. On what branch is
your series based?
Can you rebase?
From my POV you could also apply it yourself. Looks all good.
P.
> ---
> base-commit: 8b32b5509128873da8ecfc06beefcb58927eb50b
> change-id: 20250502-sched-skip-reset-bf7c163233da
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG
2025-07-09 13:14 ` [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Philipp Stanner
@ 2025-07-10 11:27 ` Maíra Canal
0 siblings, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-10 11:27 UTC (permalink / raw)
To: phasta, Matthew Brost, Danilo Krummrich, Christian König,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau, Thomas Zimmermann, Maxime Ripard
Cc: kernel-dev, dri-devel, etnaviv, intel-xe, Min Ma, Lizhi Hou,
Oded Gabbay, Frank Binns, Matt Coster, Qiang Yu, Lyude Paul,
Alex Deucher, Christian König
+cc Maxime, Thomas
Hi Philipp,
On 09/07/25 10:14, Philipp Stanner wrote:
> On Tue, 2025-07-08 at 10:25 -0300, Maíra Canal wrote:
>> TL;DR: The only two patches that are lacking R-b's are:
>>
>> [PATCH 2/8] drm/sched: Allow drivers to skip the reset and keep on running
>> [PATCH 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>> -> If Intel CI succeeds, it's Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>>
>> For those two patches, it would be great to gather feedback and/or R-b's,
>> particularly from the Intel folks.
>>
>> Thanks for all the reviews so far!
>>
>> ---
[...]
>> drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
>> drm/sched: Allow drivers to skip the reset and keep on running
>> drm/sched: Make timeout KUnit tests faster
>> drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG
>> drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>> drm/etnaviv: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>> drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>> drm/panfrost: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
>>
>> drivers/accel/amdxdna/aie2_ctx.c | 2 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
>> drivers/gpu/drm/etnaviv/etnaviv_sched.c | 16 +++----
>> drivers/gpu/drm/imagination/pvr_queue.c | 4 +-
>> drivers/gpu/drm/lima/lima_sched.c | 6 +--
>> drivers/gpu/drm/nouveau/nouveau_exec.c | 2 +-
>> drivers/gpu/drm/nouveau/nouveau_sched.c | 2 +-
>> drivers/gpu/drm/panfrost/panfrost_job.c | 10 ++---
>> drivers/gpu/drm/panthor/panthor_mmu.c | 2 +-
>> drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
>> drivers/gpu/drm/scheduler/sched_main.c | 48 +++++++++++++++++++--
>> drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 7 ++-
>> drivers/gpu/drm/scheduler/tests/sched_tests.h | 1 +
>> drivers/gpu/drm/scheduler/tests/tests_basic.c | 55 ++++++++++++++++++++++--
>> drivers/gpu/drm/v3d/v3d_sched.c | 18 ++------
>> drivers/gpu/drm/xe/xe_guc_submit.c | 14 ++----
>> include/drm/gpu_scheduler.h | 7 ++-
>> 17 files changed, 137 insertions(+), 61 deletions(-)
>
> Does not apply to drm-misc-next:
>
> Applying: drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
> error: patch failed: drivers/gpu/drm/etnaviv/etnaviv_sched.c:87
> error: drivers/gpu/drm/etnaviv/etnaviv_sched.c: patch does not apply
> Patch failed at 0001 drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
>
> Awkward. That file has last been touched months ago. On what branch is
> your series based?
It's based on drm-tip, otherwise, Intel CI wouldn't be able to apply the
series. drm-tip has that Etnaviv fix (commit 61ee19dedb8d "drm/etnaviv:
Protect the scheduler's pending list with its lock"), which drm-misc-
next doesn't have yet.
>
> Can you rebase?
>
> From my POV you could also apply it yourself. Looks all good.
I believe I can apply the series to drm-misc-next and solve the
conflicts in drm-tip with `dim rebuild-tip`.
@drm-misc maintainers, would it be an issue if I apply this series to
drm-misc-next and solve the conflicts?
Best Regards,
- Maíra
>
> P.
>
>
>
>> ---
>> base-commit: 8b32b5509128873da8ecfc06beefcb58927eb50b
>> change-id: 20250502-sched-skip-reset-bf7c163233da
>>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-08 13:25 ` [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running Maíra Canal
2025-07-09 13:08 ` Philipp Stanner
@ 2025-07-11 13:22 ` Christian König
2025-07-11 13:37 ` Philipp Stanner
2025-07-11 14:35 ` Maíra Canal
1 sibling, 2 replies; 27+ messages in thread
From: Christian König @ 2025-07-11 13:22 UTC (permalink / raw)
To: Maíra Canal, Matthew Brost, Danilo Krummrich,
Philipp Stanner, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On 08.07.25 15:25, Maíra Canal wrote:
> When the DRM scheduler times out, it's possible that the GPU isn't hung;
> instead, a job just took unusually long (longer than the timeout) but is
> still running, and there is, thus, no reason to reset the hardware. This
> can occur in two scenarios:
>
> 1. The job is taking longer than the timeout, but the driver determined
> through a GPU-specific mechanism that the hardware is still making
> progress. Hence, the driver would like the scheduler to skip the
> timeout and treat the job as still pending from then onward. This
> happens in v3d, Etnaviv, and Xe.
> 2. Timeout has fired before the free-job worker. Consequently, the
> scheduler calls `sched->ops->timedout_job()` for a job that isn't
> timed out.
>
> These two scenarios are problematic because the job was removed from the
> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
> means that when the job finishes, it won't be freed by the scheduler
> though `sched->ops->free_job()` - leading to a memory leak.
Yeah, that is unfortunately intentional.
> To solve these problems, create a new `drm_gpu_sched_stat`, called
> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
> new status will indicate that the job must be reinserted into
> `sched->pending_list`, and the hardware / driver will still complete that
> job.
Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
This HW fence is then given as a parameter to the driver when we run into a timeout.
This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
Regards,
Christian.
>
> Signed-off-by: Maíra Canal <mcanal@igalia.com>
> ---
> drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
> include/drm/gpu_scheduler.h | 3 +++
> 2 files changed, 47 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
> {
> struct drm_sched_job *job;
>
> - spin_lock(&sched->job_list_lock);
> job = list_first_entry_or_null(&sched->pending_list,
> struct drm_sched_job, list);
> if (job && dma_fence_is_signaled(&job->s_fence->finished))
> __drm_sched_run_free_queue(sched);
> +}
> +
> +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
> +{
> + spin_lock(&sched->job_list_lock);
> + drm_sched_run_free_queue(sched);
> spin_unlock(&sched->job_list_lock);
> }
>
> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
> spin_unlock(&sched->job_list_lock);
> }
>
> +/**
> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
> + * @sched: scheduler instance
> + * @job: job to be reinserted on the pending list
> + *
> + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
> + * hung and is making progress, the scheduler must reinsert the job back into
> + * @sched->pending_list. Otherwise, the job and its resources won't be freed
> + * through the &struct drm_sched_backend_ops.free_job callback.
> + *
> + * This function must be used in "false timeout" cases only.
> + */
> +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
> + struct drm_sched_job *job)
> +{
> + spin_lock(&sched->job_list_lock);
> + list_add(&job->list, &sched->pending_list);
> +
> + /* After reinserting the job, the scheduler enqueues the free-job work
> + * again if ready. Otherwise, a signaled job could be added to the
> + * pending list, but never freed.
> + */
> + drm_sched_run_free_queue(sched);
> + spin_unlock(&sched->job_list_lock);
> +}
> +
> static void drm_sched_job_timedout(struct work_struct *work)
> {
> struct drm_gpu_scheduler *sched;
> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
> job->sched->ops->free_job(job);
> sched->free_guilty = false;
> }
> +
> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
> + drm_sched_job_reinsert_on_false_timeout(sched, job);
> } else {
> spin_unlock(&sched->job_list_lock);
> }
> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
> * This function is typically used for reset recovery (see the docu of
> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> * scheduler teardown, i.e., before calling drm_sched_fini().
> + *
> + * As it's only used for reset recovery, drivers must not call this function
> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> */
> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
> {
> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> * scheduler startup. The scheduler itself is fully operational after
> * drm_sched_init() succeeded.
> + *
> + * As it's only used for reset recovery, drivers must not call this function
> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> */
> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
> {
> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
> if (job)
> sched->ops->free_job(job);
>
> - drm_sched_run_free_queue(sched);
> + drm_sched_run_free_queue_unlocked(sched);
> drm_sched_run_job_queue(sched);
> }
>
> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
> index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
> --- a/include/drm/gpu_scheduler.h
> +++ b/include/drm/gpu_scheduler.h
> @@ -393,11 +393,14 @@ struct drm_sched_job {
> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
> + * did not hang and is still running.
> */
> enum drm_gpu_sched_stat {
> DRM_GPU_SCHED_STAT_NONE,
> DRM_GPU_SCHED_STAT_RESET,
> DRM_GPU_SCHED_STAT_ENODEV,
> + DRM_GPU_SCHED_STAT_NO_HANG,
> };
>
> /**
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 13:22 ` Christian König
@ 2025-07-11 13:37 ` Philipp Stanner
2025-07-11 15:20 ` Christian König
2025-07-11 14:35 ` Maíra Canal
1 sibling, 1 reply; 27+ messages in thread
From: Philipp Stanner @ 2025-07-11 13:37 UTC (permalink / raw)
To: Christian König, Maíra Canal, Matthew Brost,
Danilo Krummrich, Philipp Stanner, Tvrtko Ursulin, Simona Vetter,
David Airlie, Melissa Wen, Lucas Stach, Russell King,
Christian Gmeiner, Lucas De Marchi, Thomas Hellström,
Rodrigo Vivi, Boris Brezillon, Rob Herring, Steven Price,
Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>
>
> On 08.07.25 15:25, Maíra Canal wrote:
> > When the DRM scheduler times out, it's possible that the GPU isn't hung;
> > instead, a job just took unusually long (longer than the timeout) but is
> > still running, and there is, thus, no reason to reset the hardware. This
> > can occur in two scenarios:
> >
> > 1. The job is taking longer than the timeout, but the driver determined
> > through a GPU-specific mechanism that the hardware is still making
> > progress. Hence, the driver would like the scheduler to skip the
> > timeout and treat the job as still pending from then onward. This
> > happens in v3d, Etnaviv, and Xe.
> > 2. Timeout has fired before the free-job worker. Consequently, the
> > scheduler calls `sched->ops->timedout_job()` for a job that isn't
> > timed out.
> >
> > These two scenarios are problematic because the job was removed from the
> > `sched->pending_list` before calling `sched->ops->timedout_job()`, which
> > means that when the job finishes, it won't be freed by the scheduler
> > though `sched->ops->free_job()` - leading to a memory leak.
>
> Yeah, that is unfortunately intentional.
>
> > To solve these problems, create a new `drm_gpu_sched_stat`, called
> > DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
> > new status will indicate that the job must be reinserted into
> > `sched->pending_list`, and the hardware / driver will still complete that
> > job.
>
> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>
> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
The scheduler destroys the job, through free_job().
I think we have agreed that for now the scheduler is the party
responsible for the job lifetime.
>
> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
I don't see how this series introduces a problem?
The fact is that drivers are abusing the API by just firing jobs back
into the scheduler's job list. This series legalizes the abuse by
providing scheduler functionality for that.
IOW, the series improves the situation but does not add a *new*
problem. Even less so as driver's aren't forced to use the new status
code, but can continue having job completion race with timeout
handlers.
>
> Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
>
> This HW fence is then given as a parameter to the driver when we run into a timeout.
>
> This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
I'd say that centralizing job handling in the scheduler is a
prerequisite of what you suggest. You can't clean up anything while
certain drivers (sometimes without even locking!) just willy-nilly re-
add jobs to the pending_list.
P.
>
> Regards,
> Christian.
>
> >
> > Signed-off-by: Maíra Canal <mcanal@igalia.com>
> > ---
> > drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
> > include/drm/gpu_scheduler.h | 3 +++
> > 2 files changed, 47 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> > index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
> > --- a/drivers/gpu/drm/scheduler/sched_main.c
> > +++ b/drivers/gpu/drm/scheduler/sched_main.c
> > @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
> > {
> > struct drm_sched_job *job;
> >
> > - spin_lock(&sched->job_list_lock);
> > job = list_first_entry_or_null(&sched->pending_list,
> > struct drm_sched_job, list);
> > if (job && dma_fence_is_signaled(&job->s_fence->finished))
> > __drm_sched_run_free_queue(sched);
> > +}
> > +
> > +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
> > +{
> > + spin_lock(&sched->job_list_lock);
> > + drm_sched_run_free_queue(sched);
> > spin_unlock(&sched->job_list_lock);
> > }
> >
> > @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
> > spin_unlock(&sched->job_list_lock);
> > }
> >
> > +/**
> > + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
> > + * @sched: scheduler instance
> > + * @job: job to be reinserted on the pending list
> > + *
> > + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
> > + * hung and is making progress, the scheduler must reinsert the job back into
> > + * @sched->pending_list. Otherwise, the job and its resources won't be freed
> > + * through the &struct drm_sched_backend_ops.free_job callback.
> > + *
> > + * This function must be used in "false timeout" cases only.
> > + */
> > +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
> > + struct drm_sched_job *job)
> > +{
> > + spin_lock(&sched->job_list_lock);
> > + list_add(&job->list, &sched->pending_list);
> > +
> > + /* After reinserting the job, the scheduler enqueues the free-job work
> > + * again if ready. Otherwise, a signaled job could be added to the
> > + * pending list, but never freed.
> > + */
> > + drm_sched_run_free_queue(sched);
> > + spin_unlock(&sched->job_list_lock);
> > +}
> > +
> > static void drm_sched_job_timedout(struct work_struct *work)
> > {
> > struct drm_gpu_scheduler *sched;
> > @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
> > job->sched->ops->free_job(job);
> > sched->free_guilty = false;
> > }
> > +
> > + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
> > + drm_sched_job_reinsert_on_false_timeout(sched, job);
> > } else {
> > spin_unlock(&sched->job_list_lock);
> > }
> > @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
> > * This function is typically used for reset recovery (see the docu of
> > * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> > * scheduler teardown, i.e., before calling drm_sched_fini().
> > + *
> > + * As it's only used for reset recovery, drivers must not call this function
> > + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> > + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> > */
> > void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
> > {
> > @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
> > * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> > * scheduler startup. The scheduler itself is fully operational after
> > * drm_sched_init() succeeded.
> > + *
> > + * As it's only used for reset recovery, drivers must not call this function
> > + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> > + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> > */
> > void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
> > {
> > @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
> > if (job)
> > sched->ops->free_job(job);
> >
> > - drm_sched_run_free_queue(sched);
> > + drm_sched_run_free_queue_unlocked(sched);
> > drm_sched_run_job_queue(sched);
> > }
> >
> > diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
> > index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
> > --- a/include/drm/gpu_scheduler.h
> > +++ b/include/drm/gpu_scheduler.h
> > @@ -393,11 +393,14 @@ struct drm_sched_job {
> > * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
> > * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
> > * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
> > + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
> > + * did not hang and is still running.
> > */
> > enum drm_gpu_sched_stat {
> > DRM_GPU_SCHED_STAT_NONE,
> > DRM_GPU_SCHED_STAT_RESET,
> > DRM_GPU_SCHED_STAT_ENODEV,
> > + DRM_GPU_SCHED_STAT_NO_HANG,
> > };
> >
> > /**
> >
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 13:22 ` Christian König
2025-07-11 13:37 ` Philipp Stanner
@ 2025-07-11 14:35 ` Maíra Canal
1 sibling, 0 replies; 27+ messages in thread
From: Maíra Canal @ 2025-07-11 14:35 UTC (permalink / raw)
To: Christian König, Matthew Brost, Danilo Krummrich,
Philipp Stanner, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
Hi Christian,
On 11/07/25 10:22, Christian König wrote:
>
>
> On 08.07.25 15:25, Maíra Canal wrote:
>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
>> instead, a job just took unusually long (longer than the timeout) but is
>> still running, and there is, thus, no reason to reset the hardware. This
>> can occur in two scenarios:
>>
>> 1. The job is taking longer than the timeout, but the driver determined
>> through a GPU-specific mechanism that the hardware is still making
>> progress. Hence, the driver would like the scheduler to skip the
>> timeout and treat the job as still pending from then onward. This
>> happens in v3d, Etnaviv, and Xe.
>> 2. Timeout has fired before the free-job worker. Consequently, the
>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
>> timed out.
>>
>> These two scenarios are problematic because the job was removed from the
>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
>> means that when the job finishes, it won't be freed by the scheduler
>> though `sched->ops->free_job()` - leading to a memory leak.
>
> Yeah, that is unfortunately intentional.
>
>> To solve these problems, create a new `drm_gpu_sched_stat`, called
>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
>> new status will indicate that the job must be reinserted into
>> `sched->pending_list`, and the hardware / driver will still complete that
>> job.
>
> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>
> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
I do understand that we have a race between timing out and signaling the
job. However, I believe we are taking measures to mitigate issues.
We are re-adding the job to the pending list (after it was removed in
the beginning of the timeout, so we aren't running with
drm_sched_get_finished_job()) and right after, the scheduler enqueues
the free-job work again if ready, which guarantees that if a signaled
job could be added to the pending list, it'll be freed.
Now, the drivers have the option to bail out of a reset if the timeout
has fired before the free-job worker, and most importantly, without
leaks.
Apart from that, +1 to Philipp's answer. This series is just
incorporating a common use-case to the scheduler's code (which we work
to improve later on) and it's use isn't mandatory by the drivers.
Best Regards,
- Maíra
>
> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
>
> Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
>
> This HW fence is then given as a parameter to the driver when we run into a timeout.
>
> This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
>
> Regards,
> Christian.
>
>>
>> Signed-off-by: Maíra Canal <mcanal@igalia.com>
>> ---
>> drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
>> include/drm/gpu_scheduler.h | 3 +++
>> 2 files changed, 47 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>> index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
>> {
>> struct drm_sched_job *job;
>>
>> - spin_lock(&sched->job_list_lock);
>> job = list_first_entry_or_null(&sched->pending_list,
>> struct drm_sched_job, list);
>> if (job && dma_fence_is_signaled(&job->s_fence->finished))
>> __drm_sched_run_free_queue(sched);
>> +}
>> +
>> +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
>> +{
>> + spin_lock(&sched->job_list_lock);
>> + drm_sched_run_free_queue(sched);
>> spin_unlock(&sched->job_list_lock);
>> }
>>
>> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
>> spin_unlock(&sched->job_list_lock);
>> }
>>
>> +/**
>> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
>> + * @sched: scheduler instance
>> + * @job: job to be reinserted on the pending list
>> + *
>> + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
>> + * hung and is making progress, the scheduler must reinsert the job back into
>> + * @sched->pending_list. Otherwise, the job and its resources won't be freed
>> + * through the &struct drm_sched_backend_ops.free_job callback.
>> + *
>> + * This function must be used in "false timeout" cases only.
>> + */
>> +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
>> + struct drm_sched_job *job)
>> +{
>> + spin_lock(&sched->job_list_lock);
>> + list_add(&job->list, &sched->pending_list);
>> +
>> + /* After reinserting the job, the scheduler enqueues the free-job work
>> + * again if ready. Otherwise, a signaled job could be added to the
>> + * pending list, but never freed.
>> + */
>> + drm_sched_run_free_queue(sched);
>> + spin_unlock(&sched->job_list_lock);
>> +}
>> +
>> static void drm_sched_job_timedout(struct work_struct *work)
>> {
>> struct drm_gpu_scheduler *sched;
>> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
>> job->sched->ops->free_job(job);
>> sched->free_guilty = false;
>> }
>> +
>> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
>> + drm_sched_job_reinsert_on_false_timeout(sched, job);
>> } else {
>> spin_unlock(&sched->job_list_lock);
>> }
>> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
>> * This function is typically used for reset recovery (see the docu of
>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>> * scheduler teardown, i.e., before calling drm_sched_fini().
>> + *
>> + * As it's only used for reset recovery, drivers must not call this function
>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>> */
>> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
>> {
>> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>> * scheduler startup. The scheduler itself is fully operational after
>> * drm_sched_init() succeeded.
>> + *
>> + * As it's only used for reset recovery, drivers must not call this function
>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>> */
>> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
>> {
>> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
>> if (job)
>> sched->ops->free_job(job);
>>
>> - drm_sched_run_free_queue(sched);
>> + drm_sched_run_free_queue_unlocked(sched);
>> drm_sched_run_job_queue(sched);
>> }
>>
>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>> index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
>> --- a/include/drm/gpu_scheduler.h
>> +++ b/include/drm/gpu_scheduler.h
>> @@ -393,11 +393,14 @@ struct drm_sched_job {
>> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
>> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
>> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
>> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
>> + * did not hang and is still running.
>> */
>> enum drm_gpu_sched_stat {
>> DRM_GPU_SCHED_STAT_NONE,
>> DRM_GPU_SCHED_STAT_RESET,
>> DRM_GPU_SCHED_STAT_ENODEV,
>> + DRM_GPU_SCHED_STAT_NO_HANG,
>> };
>>
>> /**
>>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 13:37 ` Philipp Stanner
@ 2025-07-11 15:20 ` Christian König
2025-07-11 17:23 ` Matthew Brost
2025-07-13 19:03 ` Maíra Canal
0 siblings, 2 replies; 27+ messages in thread
From: Christian König @ 2025-07-11 15:20 UTC (permalink / raw)
To: phasta, Maíra Canal, Matthew Brost, Danilo Krummrich,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On 11.07.25 15:37, Philipp Stanner wrote:
> On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>>
>>
>> On 08.07.25 15:25, Maíra Canal wrote:
>>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
>>> instead, a job just took unusually long (longer than the timeout) but is
>>> still running, and there is, thus, no reason to reset the hardware. This
>>> can occur in two scenarios:
>>>
>>> 1. The job is taking longer than the timeout, but the driver determined
>>> through a GPU-specific mechanism that the hardware is still making
>>> progress. Hence, the driver would like the scheduler to skip the
>>> timeout and treat the job as still pending from then onward. This
>>> happens in v3d, Etnaviv, and Xe.
>>> 2. Timeout has fired before the free-job worker. Consequently, the
>>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
>>> timed out.
>>>
>>> These two scenarios are problematic because the job was removed from the
>>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
>>> means that when the job finishes, it won't be freed by the scheduler
>>> though `sched->ops->free_job()` - leading to a memory leak.
>>
>> Yeah, that is unfortunately intentional.
>>
>>> To solve these problems, create a new `drm_gpu_sched_stat`, called
>>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
>>> new status will indicate that the job must be reinserted into
>>> `sched->pending_list`, and the hardware / driver will still complete that
>>> job.
>>
>> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>>
>> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
>
> The scheduler destroys the job, through free_job().
> I think we have agreed that for now the scheduler is the party
> responsible for the job lifetime.
That's what I strongly disagree on. The job is just a state bag between the submission and scheduling state of a submission.
For the scheduler the control starts when it is pushed into the entity and ends when run_job is called.
The real representation of the submission is the scheduler fence and that object has a perfectly defined lifetime, state and error handling.
>>
>> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
>
> I don't see how this series introduces a problem?
>
> The fact is that drivers are abusing the API by just firing jobs back
> into the scheduler's job list. This series legalizes the abuse by
> providing scheduler functionality for that.
>
> IOW, the series improves the situation but does not add a *new*
> problem. Even less so as driver's aren't forced to use the new status
> code, but can continue having job completion race with timeout
> handlers.
Maybe yes, but I'm really not sure about it.
Take a look at the git history or job destruction, we already had exactly that approach, removed it and said that leaking memory is at least better than an use after free issue.
>>
>> Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
>>
>> This HW fence is then given as a parameter to the driver when we run into a timeout.
>>
>> This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
>
> I'd say that centralizing job handling in the scheduler is a
> prerequisite of what you suggest. You can't clean up anything while
> certain drivers (sometimes without even locking!) just willy-nilly re-
> add jobs to the pending_list.
The point is we should get completely rid of the pending list.
Then the whole question of removing or re-adding anything to the pending list doesn't appear in the first place.
The issue with that is that we need to change the timeout callback to take the fence and not the job. And that is a rather big change affecting all drivers using the scheduler.
Regards,
Christian.
>
>
> P.
>
>>
>> Regards,
>> Christian.
>>
>>>
>>> Signed-off-by: Maíra Canal <mcanal@igalia.com>
>>> ---
>>> drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
>>> include/drm/gpu_scheduler.h | 3 +++
>>> 2 files changed, 47 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>>> index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
>>> {
>>> struct drm_sched_job *job;
>>>
>>> - spin_lock(&sched->job_list_lock);
>>> job = list_first_entry_or_null(&sched->pending_list,
>>> struct drm_sched_job, list);
>>> if (job && dma_fence_is_signaled(&job->s_fence->finished))
>>> __drm_sched_run_free_queue(sched);
>>> +}
>>> +
>>> +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
>>> +{
>>> + spin_lock(&sched->job_list_lock);
>>> + drm_sched_run_free_queue(sched);
>>> spin_unlock(&sched->job_list_lock);
>>> }
>>>
>>> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
>>> spin_unlock(&sched->job_list_lock);
>>> }
>>>
>>> +/**
>>> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
>>> + * @sched: scheduler instance
>>> + * @job: job to be reinserted on the pending list
>>> + *
>>> + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
>>> + * hung and is making progress, the scheduler must reinsert the job back into
>>> + * @sched->pending_list. Otherwise, the job and its resources won't be freed
>>> + * through the &struct drm_sched_backend_ops.free_job callback.
>>> + *
>>> + * This function must be used in "false timeout" cases only.
>>> + */
>>> +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
>>> + struct drm_sched_job *job)
>>> +{
>>> + spin_lock(&sched->job_list_lock);
>>> + list_add(&job->list, &sched->pending_list);
>>> +
>>> + /* After reinserting the job, the scheduler enqueues the free-job work
>>> + * again if ready. Otherwise, a signaled job could be added to the
>>> + * pending list, but never freed.
>>> + */
>>> + drm_sched_run_free_queue(sched);
>>> + spin_unlock(&sched->job_list_lock);
>>> +}
>>> +
>>> static void drm_sched_job_timedout(struct work_struct *work)
>>> {
>>> struct drm_gpu_scheduler *sched;
>>> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
>>> job->sched->ops->free_job(job);
>>> sched->free_guilty = false;
>>> }
>>> +
>>> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
>>> + drm_sched_job_reinsert_on_false_timeout(sched, job);
>>> } else {
>>> spin_unlock(&sched->job_list_lock);
>>> }
>>> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
>>> * This function is typically used for reset recovery (see the docu of
>>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>>> * scheduler teardown, i.e., before calling drm_sched_fini().
>>> + *
>>> + * As it's only used for reset recovery, drivers must not call this function
>>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>>> */
>>> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
>>> {
>>> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
>>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>>> * scheduler startup. The scheduler itself is fully operational after
>>> * drm_sched_init() succeeded.
>>> + *
>>> + * As it's only used for reset recovery, drivers must not call this function
>>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>>> */
>>> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
>>> {
>>> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
>>> if (job)
>>> sched->ops->free_job(job);
>>>
>>> - drm_sched_run_free_queue(sched);
>>> + drm_sched_run_free_queue_unlocked(sched);
>>> drm_sched_run_job_queue(sched);
>>> }
>>>
>>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>>> index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
>>> --- a/include/drm/gpu_scheduler.h
>>> +++ b/include/drm/gpu_scheduler.h
>>> @@ -393,11 +393,14 @@ struct drm_sched_job {
>>> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
>>> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
>>> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
>>> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
>>> + * did not hang and is still running.
>>> */
>>> enum drm_gpu_sched_stat {
>>> DRM_GPU_SCHED_STAT_NONE,
>>> DRM_GPU_SCHED_STAT_RESET,
>>> DRM_GPU_SCHED_STAT_ENODEV,
>>> + DRM_GPU_SCHED_STAT_NO_HANG,
>>> };
>>>
>>> /**
>>>
>>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 15:20 ` Christian König
@ 2025-07-11 17:23 ` Matthew Brost
2025-07-14 9:10 ` Christian König
2025-07-13 19:03 ` Maíra Canal
1 sibling, 1 reply; 27+ messages in thread
From: Matthew Brost @ 2025-07-11 17:23 UTC (permalink / raw)
To: Christian König
Cc: phasta, Maíra Canal, Danilo Krummrich, Tvrtko Ursulin,
Simona Vetter, David Airlie, Melissa Wen, Lucas Stach,
Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau, kernel-dev, dri-devel, etnaviv,
intel-xe
On Fri, Jul 11, 2025 at 05:20:49PM +0200, Christian König wrote:
> On 11.07.25 15:37, Philipp Stanner wrote:
> > On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
> >>
> >>
> >> On 08.07.25 15:25, Maíra Canal wrote:
> >>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
> >>> instead, a job just took unusually long (longer than the timeout) but is
> >>> still running, and there is, thus, no reason to reset the hardware. This
> >>> can occur in two scenarios:
> >>>
> >>> 1. The job is taking longer than the timeout, but the driver determined
> >>> through a GPU-specific mechanism that the hardware is still making
> >>> progress. Hence, the driver would like the scheduler to skip the
> >>> timeout and treat the job as still pending from then onward. This
> >>> happens in v3d, Etnaviv, and Xe.
> >>> 2. Timeout has fired before the free-job worker. Consequently, the
> >>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
> >>> timed out.
> >>>
> >>> These two scenarios are problematic because the job was removed from the
> >>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
> >>> means that when the job finishes, it won't be freed by the scheduler
> >>> though `sched->ops->free_job()` - leading to a memory leak.
> >>
> >> Yeah, that is unfortunately intentional.
> >>
> >>> To solve these problems, create a new `drm_gpu_sched_stat`, called
> >>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
> >>> new status will indicate that the job must be reinserted into
> >>> `sched->pending_list`, and the hardware / driver will still complete that
> >>> job.
> >>
> >> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
> >>
> >> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
> >
> > The scheduler destroys the job, through free_job().
> > I think we have agreed that for now the scheduler is the party
> > responsible for the job lifetime.
>
> That's what I strongly disagree on. The job is just a state bag between the submission and scheduling state of a submission.
>
See below. free_job is called after the fence signals, and drivers have
now built assumptions around this, which would be hard to untangle.
Sure, the scheduler could have been designed to free the job immediately
after calling run_job(), but it wasn’t. Honestly, I kind of agree with
freeing the job immediately after running it—but that’s not the world we
live in, and we don’t have a time machine to fix it. I’d rather document
the current rules around job lifetime and look for ways to improve it.
Changing the job lifetime rules would require broad community buy-in,
which I doubt everyone would agree to.
> For the scheduler the control starts when it is pushed into the entity and ends when run_job is called.
>
> The real representation of the submission is the scheduler fence and that object has a perfectly defined lifetime, state and error handling.
>
> >>
> >> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
> >
> > I don't see how this series introduces a problem?
> >
> > The fact is that drivers are abusing the API by just firing jobs back
> > into the scheduler's job list. This series legalizes the abuse by
> > providing scheduler functionality for that.
> >
> > IOW, the series improves the situation but does not add a *new*
> > problem. Even less so as driver's aren't forced to use the new status
> > code, but can continue having job completion race with timeout
> > handlers.
>
> Maybe yes, but I'm really not sure about it.
>
> Take a look at the git history or job destruction, we already had exactly that approach, removed it and said that leaking memory is at least better than an use after free issue.
>
> >>
> >> Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
> >>
> >> This HW fence is then given as a parameter to the driver when we run into a timeout.
> >>
> >> This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
> >
> > I'd say that centralizing job handling in the scheduler is a
> > prerequisite of what you suggest. You can't clean up anything while
> > certain drivers (sometimes without even locking!) just willy-nilly re-
> > add jobs to the pending_list.
>
> The point is we should get completely rid of the pending list.
>
> Then the whole question of removing or re-adding anything to the pending list doesn't appear in the first place.
>
> The issue with that is that we need to change the timeout callback to take the fence and not the job. And that is a rather big change affecting all drivers using the scheduler.
>
I agree with the idea that the pending list should generally be a list
of pending fences, but once you start considering the implications, I'm
not really sure it works—or at least, not easily.
Most drivers these days decouple the fence and the job (i.e., the fence
isn't embedded in the job), so there's no inherent way to go from a
fence → job. In Xe, the job’s fence can be one of a variety of different
fences, depending on the submission type. To handle fence timeouts, we
don’t necessarily need the job itself, but we do need the driver-side
software queue. In Xe, this would be the scheduler, given the 1:1
relationship—so we could likely make it work. For drivers without a 1:1
relationship, it's unclear how this would be resolved, though perhaps
the hardware queue would be sufficient in that case.
It also follows that the job would be freed immediately after run_job()
if we don’t maintain a pending list of jobs, right? That opens a huge
can of worms, especially considering how Xe depends on the job being
freed only after the fence signals. Our job reference counts tie into
power management, hold a reference to the software queue, which in turn
reference-counts the VM, etc. I suspect other drivers do similar things.
It seems far simpler to just keep the job around until its fence
signals.
TL;DR: This seems like quite a lot of trouble.
Matt
> Regards,
> Christian.
>
> >
> >
> > P.
> >
> >>
> >> Regards,
> >> Christian.
> >>
> >>>
> >>> Signed-off-by: Maíra Canal <mcanal@igalia.com>
> >>> ---
> >>> drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
> >>> include/drm/gpu_scheduler.h | 3 +++
> >>> 2 files changed, 47 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> >>> index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
> >>> --- a/drivers/gpu/drm/scheduler/sched_main.c
> >>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> >>> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
> >>> {
> >>> struct drm_sched_job *job;
> >>>
> >>> - spin_lock(&sched->job_list_lock);
> >>> job = list_first_entry_or_null(&sched->pending_list,
> >>> struct drm_sched_job, list);
> >>> if (job && dma_fence_is_signaled(&job->s_fence->finished))
> >>> __drm_sched_run_free_queue(sched);
> >>> +}
> >>> +
> >>> +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
> >>> +{
> >>> + spin_lock(&sched->job_list_lock);
> >>> + drm_sched_run_free_queue(sched);
> >>> spin_unlock(&sched->job_list_lock);
> >>> }
> >>>
> >>> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
> >>> spin_unlock(&sched->job_list_lock);
> >>> }
> >>>
> >>> +/**
> >>> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
> >>> + * @sched: scheduler instance
> >>> + * @job: job to be reinserted on the pending list
> >>> + *
> >>> + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
> >>> + * hung and is making progress, the scheduler must reinsert the job back into
> >>> + * @sched->pending_list. Otherwise, the job and its resources won't be freed
> >>> + * through the &struct drm_sched_backend_ops.free_job callback.
> >>> + *
> >>> + * This function must be used in "false timeout" cases only.
> >>> + */
> >>> +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
> >>> + struct drm_sched_job *job)
> >>> +{
> >>> + spin_lock(&sched->job_list_lock);
> >>> + list_add(&job->list, &sched->pending_list);
> >>> +
> >>> + /* After reinserting the job, the scheduler enqueues the free-job work
> >>> + * again if ready. Otherwise, a signaled job could be added to the
> >>> + * pending list, but never freed.
> >>> + */
> >>> + drm_sched_run_free_queue(sched);
> >>> + spin_unlock(&sched->job_list_lock);
> >>> +}
> >>> +
> >>> static void drm_sched_job_timedout(struct work_struct *work)
> >>> {
> >>> struct drm_gpu_scheduler *sched;
> >>> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
> >>> job->sched->ops->free_job(job);
> >>> sched->free_guilty = false;
> >>> }
> >>> +
> >>> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
> >>> + drm_sched_job_reinsert_on_false_timeout(sched, job);
> >>> } else {
> >>> spin_unlock(&sched->job_list_lock);
> >>> }
> >>> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
> >>> * This function is typically used for reset recovery (see the docu of
> >>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> >>> * scheduler teardown, i.e., before calling drm_sched_fini().
> >>> + *
> >>> + * As it's only used for reset recovery, drivers must not call this function
> >>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> >>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> >>> */
> >>> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
> >>> {
> >>> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
> >>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
> >>> * scheduler startup. The scheduler itself is fully operational after
> >>> * drm_sched_init() succeeded.
> >>> + *
> >>> + * As it's only used for reset recovery, drivers must not call this function
> >>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
> >>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
> >>> */
> >>> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
> >>> {
> >>> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
> >>> if (job)
> >>> sched->ops->free_job(job);
> >>>
> >>> - drm_sched_run_free_queue(sched);
> >>> + drm_sched_run_free_queue_unlocked(sched);
> >>> drm_sched_run_job_queue(sched);
> >>> }
> >>>
> >>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
> >>> index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
> >>> --- a/include/drm/gpu_scheduler.h
> >>> +++ b/include/drm/gpu_scheduler.h
> >>> @@ -393,11 +393,14 @@ struct drm_sched_job {
> >>> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
> >>> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
> >>> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
> >>> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
> >>> + * did not hang and is still running.
> >>> */
> >>> enum drm_gpu_sched_stat {
> >>> DRM_GPU_SCHED_STAT_NONE,
> >>> DRM_GPU_SCHED_STAT_RESET,
> >>> DRM_GPU_SCHED_STAT_ENODEV,
> >>> + DRM_GPU_SCHED_STAT_NO_HANG,
> >>> };
> >>>
> >>> /**
> >>>
> >>
> >
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 15:20 ` Christian König
2025-07-11 17:23 ` Matthew Brost
@ 2025-07-13 19:03 ` Maíra Canal
2025-07-14 9:23 ` Christian König
1 sibling, 1 reply; 27+ messages in thread
From: Maíra Canal @ 2025-07-13 19:03 UTC (permalink / raw)
To: Christian König, phasta, Matthew Brost, Danilo Krummrich,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
Hi Christian,
On 11/07/25 12:20, Christian König wrote:
> On 11.07.25 15:37, Philipp Stanner wrote:
>> On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>>>
>>>
>>> On 08.07.25 15:25, Maíra Canal wrote:
>>>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
>>>> instead, a job just took unusually long (longer than the timeout) but is
>>>> still running, and there is, thus, no reason to reset the hardware. This
>>>> can occur in two scenarios:
>>>>
>>>> 1. The job is taking longer than the timeout, but the driver determined
>>>> through a GPU-specific mechanism that the hardware is still making
>>>> progress. Hence, the driver would like the scheduler to skip the
>>>> timeout and treat the job as still pending from then onward. This
>>>> happens in v3d, Etnaviv, and Xe.
>>>> 2. Timeout has fired before the free-job worker. Consequently, the
>>>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
>>>> timed out.
>>>>
>>>> These two scenarios are problematic because the job was removed from the
>>>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
>>>> means that when the job finishes, it won't be freed by the scheduler
>>>> though `sched->ops->free_job()` - leading to a memory leak.
>>>
>>> Yeah, that is unfortunately intentional.
>>>
>>>> To solve these problems, create a new `drm_gpu_sched_stat`, called
>>>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
>>>> new status will indicate that the job must be reinserted into
>>>> `sched->pending_list`, and the hardware / driver will still complete that
>>>> job.
>>>
>>> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>>>
>>> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
>>
>> The scheduler destroys the job, through free_job().
>> I think we have agreed that for now the scheduler is the party
>> responsible for the job lifetime.
>
> That's what I strongly disagree on. The job is just a state bag between the submission and scheduling state of a submission.
>
> For the scheduler the control starts when it is pushed into the entity and ends when run_job is called.
>
> The real representation of the submission is the scheduler fence and that object has a perfectly defined lifetime, state and error handling.
>
>>>
>>> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
>>
>> I don't see how this series introduces a problem?
>>
>> The fact is that drivers are abusing the API by just firing jobs back
>> into the scheduler's job list. This series legalizes the abuse by
>> providing scheduler functionality for that.
>>
>> IOW, the series improves the situation but does not add a *new*
>> problem. Even less so as driver's aren't forced to use the new status
>> code, but can continue having job completion race with timeout
>> handlers.
>
> Maybe yes, but I'm really not sure about it.
>
> Take a look at the git history or job destruction, we already had exactly that approach, removed it and said that leaking memory is at least better than an use after free issue.
>
If the job was removed from the pending list in the beginning of the
timeout and drm_sched_get_finished_job() fetches jobs from the pending
list, how can we end up with an use-after-free issue?
Best Regards,
- Maíra
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-11 17:23 ` Matthew Brost
@ 2025-07-14 9:10 ` Christian König
0 siblings, 0 replies; 27+ messages in thread
From: Christian König @ 2025-07-14 9:10 UTC (permalink / raw)
To: Matthew Brost
Cc: phasta, Maíra Canal, Danilo Krummrich, Tvrtko Ursulin,
Simona Vetter, David Airlie, Melissa Wen, Lucas Stach,
Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau, kernel-dev, dri-devel, etnaviv,
intel-xe
On 11.07.25 19:23, Matthew Brost wrote:
> On Fri, Jul 11, 2025 at 05:20:49PM +0200, Christian König wrote:
>> On 11.07.25 15:37, Philipp Stanner wrote:
>>> On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>>>>
>>>>
>>>> On 08.07.25 15:25, Maíra Canal wrote:
>>>>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
>>>>> instead, a job just took unusually long (longer than the timeout) but is
>>>>> still running, and there is, thus, no reason to reset the hardware. This
>>>>> can occur in two scenarios:
>>>>>
>>>>> 1. The job is taking longer than the timeout, but the driver determined
>>>>> through a GPU-specific mechanism that the hardware is still making
>>>>> progress. Hence, the driver would like the scheduler to skip the
>>>>> timeout and treat the job as still pending from then onward. This
>>>>> happens in v3d, Etnaviv, and Xe.
>>>>> 2. Timeout has fired before the free-job worker. Consequently, the
>>>>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
>>>>> timed out.
>>>>>
>>>>> These two scenarios are problematic because the job was removed from the
>>>>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
>>>>> means that when the job finishes, it won't be freed by the scheduler
>>>>> though `sched->ops->free_job()` - leading to a memory leak.
>>>>
>>>> Yeah, that is unfortunately intentional.
>>>>
>>>>> To solve these problems, create a new `drm_gpu_sched_stat`, called
>>>>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
>>>>> new status will indicate that the job must be reinserted into
>>>>> `sched->pending_list`, and the hardware / driver will still complete that
>>>>> job.
>>>>
>>>> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>>>>
>>>> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
>>>
>>> The scheduler destroys the job, through free_job().
>>> I think we have agreed that for now the scheduler is the party
>>> responsible for the job lifetime.
>>
>> That's what I strongly disagree on. The job is just a state bag between the submission and scheduling state of a submission.
>>
>
> See below. free_job is called after the fence signals, and drivers have
> now built assumptions around this, which would be hard to untangle.
> Sure, the scheduler could have been designed to free the job immediately
> after calling run_job(), but it wasn’t.
Exactly that's the point! The scheduler *was* designed around the idea of immediately freeing the job when it starts to run.
The original idea was that the scheduler just works with a void* as the job representation and converts that into the HW fence by calling run_job.
This avoids tons of problems, starting from that you can't allocate memory for the HW fence while run_job is called all the way to that you don't have a properly defined job lifetime.
I screamed out quite loud when people started to change this because it was absolutely foreseeable that this goes boom, but I just wasn't the maintainer of that stuff at this point.
> Honestly, I kind of agree with
> freeing the job immediately after running it—but that’s not the world we
> live in, and we don’t have a time machine to fix it.
Yeah, that's unfortunately true.
> I’d rather document
> the current rules around job lifetime and look for ways to improve it.
Exactly that's what I'm trying to do here.
See we have spend the last 8 years iterating over the same problem over and over again, and the current solution just barely works. Take a look at the git history how often we have tried to get this to work properly.
And yes, it's well known that it leaks the job when the driver doesn't do a reset and as Maíra absolutely correctly pointed out as well that re-inserting the job during the reset is just a completely broken design.
It's just that everybody working on that has given up at some point.
> Changing the job lifetime rules would require broad community buy-in,
> which I doubt everyone would agree to.
Well, changing the parameter of the timedout callback from the job to the fence should be relatively easy to do. That should immediately fix the issue Maíra is working on.
Then potentially changing the job lifetime in the scheduler can be a different topic.
>> For the scheduler the control starts when it is pushed into the entity and ends when run_job is called.
>>
>> The real representation of the submission is the scheduler fence and that object has a perfectly defined lifetime, state and error handling.
>>
>>>>
>>>> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
>>>
>>> I don't see how this series introduces a problem?
>>>
>>> The fact is that drivers are abusing the API by just firing jobs back
>>> into the scheduler's job list. This series legalizes the abuse by
>>> providing scheduler functionality for that.
>>>
>>> IOW, the series improves the situation but does not add a *new*
>>> problem. Even less so as driver's aren't forced to use the new status
>>> code, but can continue having job completion race with timeout
>>> handlers.
>>
>> Maybe yes, but I'm really not sure about it.
>>
>> Take a look at the git history or job destruction, we already had exactly that approach, removed it and said that leaking memory is at least better than an use after free issue.
>>
>>>>
>>>> Instead we should track the HW fences (or maybe the scheduler fences which point to the HW fence) the scheduler waits for.
>>>>
>>>> This HW fence is then given as a parameter to the driver when we run into a timeout.
>>>>
>>>> This has the clear advantage that dma_fence objects have a well defined livetime and necessary state transition. E.g. you can check at all times if the fence is signaled or not.
>>>
>>> I'd say that centralizing job handling in the scheduler is a
>>> prerequisite of what you suggest. You can't clean up anything while
>>> certain drivers (sometimes without even locking!) just willy-nilly re-
>>> add jobs to the pending_list.
>>
>> The point is we should get completely rid of the pending list.
>>
>> Then the whole question of removing or re-adding anything to the pending list doesn't appear in the first place.
>>
>> The issue with that is that we need to change the timeout callback to take the fence and not the job. And that is a rather big change affecting all drivers using the scheduler.
>>
>
> I agree with the idea that the pending list should generally be a list
> of pending fences, but once you start considering the implications, I'm
> not really sure it works—or at least, not easily.
>
> Most drivers these days decouple the fence and the job (i.e., the fence
> isn't embedded in the job), so there's no inherent way to go from a
> fence → job. In Xe, the job’s fence can be one of a variety of different
> fences, depending on the submission type. To handle fence timeouts, we
> don’t necessarily need the job itself, but we do need the driver-side
> software queue. In Xe, this would be the scheduler, given the 1:1
> relationship—so we could likely make it work. For drivers without a 1:1
> relationship, it's unclear how this would be resolved, though perhaps
> the hardware queue would be sufficient in that case.
>
> It also follows that the job would be freed immediately after run_job()
> if we don’t maintain a pending list of jobs, right? That opens a huge
> can of worms, especially considering how Xe depends on the job being
> freed only after the fence signals. Our job reference counts tie into
> power management, hold a reference to the software queue, which in turn
> reference-counts the VM, etc. I suspect other drivers do similar things.
> It seems far simpler to just keep the job around until its fence
> signals.
>
> TL;DR: This seems like quite a lot of trouble.
For a start my idea is to have a pointer to the job in the scheduler fence, then track the pending fences instead of the pending jobs.
As a next step give the timedout callback the scheduler fence (which has both HW fence pointer and job at that point) instead of the job and stop messing with the pending list all together during a timeout.
As a next step we could move the job pointer from the scheduler fence into the driver specific HW fence.
Then we add a DMA-buf utility object which starts a work item when a dma_fence signals (I wanted to do that anyway cause that is a rather common pattern).
This utility object would then replace the free_job callback from the scheduler, so that drivers can basically decide themselves when they want their job object freed.
Regards,
Christian.
>
> Matt
>
>> Regards,
>> Christian.
>>
>>>
>>>
>>> P.
>>>
>>>>
>>>> Regards,
>>>> Christian.
>>>>
>>>>>
>>>>> Signed-off-by: Maíra Canal <mcanal@igalia.com>
>>>>> ---
>>>>> drivers/gpu/drm/scheduler/sched_main.c | 46 ++++++++++++++++++++++++++++++++--
>>>>> include/drm/gpu_scheduler.h | 3 +++
>>>>> 2 files changed, 47 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>>>>> index 0f32e2cb43d6af294408968a970990f9f5c47bee..657846d56dacd4f26fffc954fc3d025c1e6bfc9f 100644
>>>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>>>> @@ -374,11 +374,16 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched)
>>>>> {
>>>>> struct drm_sched_job *job;
>>>>>
>>>>> - spin_lock(&sched->job_list_lock);
>>>>> job = list_first_entry_or_null(&sched->pending_list,
>>>>> struct drm_sched_job, list);
>>>>> if (job && dma_fence_is_signaled(&job->s_fence->finished))
>>>>> __drm_sched_run_free_queue(sched);
>>>>> +}
>>>>> +
>>>>> +static void drm_sched_run_free_queue_unlocked(struct drm_gpu_scheduler *sched)
>>>>> +{
>>>>> + spin_lock(&sched->job_list_lock);
>>>>> + drm_sched_run_free_queue(sched);
>>>>> spin_unlock(&sched->job_list_lock);
>>>>> }
>>>>>
>>>>> @@ -531,6 +536,32 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)
>>>>> spin_unlock(&sched->job_list_lock);
>>>>> }
>>>>>
>>>>> +/**
>>>>> + * drm_sched_job_reinsert_on_false_timeout - reinsert the job on a false timeout
>>>>> + * @sched: scheduler instance
>>>>> + * @job: job to be reinserted on the pending list
>>>>> + *
>>>>> + * In the case of a "false timeout" - when a timeout occurs but the GPU isn't
>>>>> + * hung and is making progress, the scheduler must reinsert the job back into
>>>>> + * @sched->pending_list. Otherwise, the job and its resources won't be freed
>>>>> + * through the &struct drm_sched_backend_ops.free_job callback.
>>>>> + *
>>>>> + * This function must be used in "false timeout" cases only.
>>>>> + */
>>>>> +static void drm_sched_job_reinsert_on_false_timeout(struct drm_gpu_scheduler *sched,
>>>>> + struct drm_sched_job *job)
>>>>> +{
>>>>> + spin_lock(&sched->job_list_lock);
>>>>> + list_add(&job->list, &sched->pending_list);
>>>>> +
>>>>> + /* After reinserting the job, the scheduler enqueues the free-job work
>>>>> + * again if ready. Otherwise, a signaled job could be added to the
>>>>> + * pending list, but never freed.
>>>>> + */
>>>>> + drm_sched_run_free_queue(sched);
>>>>> + spin_unlock(&sched->job_list_lock);
>>>>> +}
>>>>> +
>>>>> static void drm_sched_job_timedout(struct work_struct *work)
>>>>> {
>>>>> struct drm_gpu_scheduler *sched;
>>>>> @@ -564,6 +595,9 @@ static void drm_sched_job_timedout(struct work_struct *work)
>>>>> job->sched->ops->free_job(job);
>>>>> sched->free_guilty = false;
>>>>> }
>>>>> +
>>>>> + if (status == DRM_GPU_SCHED_STAT_NO_HANG)
>>>>> + drm_sched_job_reinsert_on_false_timeout(sched, job);
>>>>> } else {
>>>>> spin_unlock(&sched->job_list_lock);
>>>>> }
>>>>> @@ -586,6 +620,10 @@ static void drm_sched_job_timedout(struct work_struct *work)
>>>>> * This function is typically used for reset recovery (see the docu of
>>>>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>>>>> * scheduler teardown, i.e., before calling drm_sched_fini().
>>>>> + *
>>>>> + * As it's only used for reset recovery, drivers must not call this function
>>>>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>>>>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>>>>> */
>>>>> void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
>>>>> {
>>>>> @@ -671,6 +709,10 @@ EXPORT_SYMBOL(drm_sched_stop);
>>>>> * drm_sched_backend_ops.timedout_job() for details). Do not call it for
>>>>> * scheduler startup. The scheduler itself is fully operational after
>>>>> * drm_sched_init() succeeded.
>>>>> + *
>>>>> + * As it's only used for reset recovery, drivers must not call this function
>>>>> + * in their &struct drm_sched_backend_ops.timedout_job callback when they
>>>>> + * skip a reset using &enum drm_gpu_sched_stat.DRM_GPU_SCHED_STAT_NO_HANG.
>>>>> */
>>>>> void drm_sched_start(struct drm_gpu_scheduler *sched, int errno)
>>>>> {
>>>>> @@ -1192,7 +1234,7 @@ static void drm_sched_free_job_work(struct work_struct *w)
>>>>> if (job)
>>>>> sched->ops->free_job(job);
>>>>>
>>>>> - drm_sched_run_free_queue(sched);
>>>>> + drm_sched_run_free_queue_unlocked(sched);
>>>>> drm_sched_run_job_queue(sched);
>>>>> }
>>>>>
>>>>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>>>>> index 83e5c00d8dd9a83ab20547a93d6fc572de97616e..257d21d8d1d2c4f035d6d4882e159de59b263c76 100644
>>>>> --- a/include/drm/gpu_scheduler.h
>>>>> +++ b/include/drm/gpu_scheduler.h
>>>>> @@ -393,11 +393,14 @@ struct drm_sched_job {
>>>>> * @DRM_GPU_SCHED_STAT_NONE: Reserved. Do not use.
>>>>> * @DRM_GPU_SCHED_STAT_RESET: The GPU hung and successfully reset.
>>>>> * @DRM_GPU_SCHED_STAT_ENODEV: Error: Device is not available anymore.
>>>>> + * @DRM_GPU_SCHED_STAT_NO_HANG: Contrary to scheduler's assumption, the GPU
>>>>> + * did not hang and is still running.
>>>>> */
>>>>> enum drm_gpu_sched_stat {
>>>>> DRM_GPU_SCHED_STAT_NONE,
>>>>> DRM_GPU_SCHED_STAT_RESET,
>>>>> DRM_GPU_SCHED_STAT_ENODEV,
>>>>> + DRM_GPU_SCHED_STAT_NO_HANG,
>>>>> };
>>>>>
>>>>> /**
>>>>>
>>>>
>>>
>>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-13 19:03 ` Maíra Canal
@ 2025-07-14 9:23 ` Christian König
2025-07-14 10:16 ` Philipp Stanner
0 siblings, 1 reply; 27+ messages in thread
From: Christian König @ 2025-07-14 9:23 UTC (permalink / raw)
To: Maíra Canal, phasta, Matthew Brost, Danilo Krummrich,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On 13.07.25 21:03, Maíra Canal wrote:
> Hi Christian,
>
> On 11/07/25 12:20, Christian König wrote:
>> On 11.07.25 15:37, Philipp Stanner wrote:
>>> On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>>>>
>>>>
>>>> On 08.07.25 15:25, Maíra Canal wrote:
>>>>> When the DRM scheduler times out, it's possible that the GPU isn't hung;
>>>>> instead, a job just took unusually long (longer than the timeout) but is
>>>>> still running, and there is, thus, no reason to reset the hardware. This
>>>>> can occur in two scenarios:
>>>>>
>>>>> 1. The job is taking longer than the timeout, but the driver determined
>>>>> through a GPU-specific mechanism that the hardware is still making
>>>>> progress. Hence, the driver would like the scheduler to skip the
>>>>> timeout and treat the job as still pending from then onward. This
>>>>> happens in v3d, Etnaviv, and Xe.
>>>>> 2. Timeout has fired before the free-job worker. Consequently, the
>>>>> scheduler calls `sched->ops->timedout_job()` for a job that isn't
>>>>> timed out.
>>>>>
>>>>> These two scenarios are problematic because the job was removed from the
>>>>> `sched->pending_list` before calling `sched->ops->timedout_job()`, which
>>>>> means that when the job finishes, it won't be freed by the scheduler
>>>>> though `sched->ops->free_job()` - leading to a memory leak.
>>>>
>>>> Yeah, that is unfortunately intentional.
>>>>
>>>>> To solve these problems, create a new `drm_gpu_sched_stat`, called
>>>>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip the reset. The
>>>>> new status will indicate that the job must be reinserted into
>>>>> `sched->pending_list`, and the hardware / driver will still complete that
>>>>> job.
>>>>
>>>> Well long story short we have already tried this and the whole approach doesn't work correctly in all cases. See the git history around how we used to destroy the jobs.
>>>>
>>>> The basic problem is that you can always race between timing out and Signaling/destroying the job. This is the long lasting job lifetime issue we already discussed more than once.
>>>
>>> The scheduler destroys the job, through free_job().
>>> I think we have agreed that for now the scheduler is the party
>>> responsible for the job lifetime.
>>
>> That's what I strongly disagree on. The job is just a state bag between the submission and scheduling state of a submission.
>>
>> For the scheduler the control starts when it is pushed into the entity and ends when run_job is called.
>>
>> The real representation of the submission is the scheduler fence and that object has a perfectly defined lifetime, state and error handling.
>>
>>>>
>>>> If you want to fix this I think the correct approach is to completely drop tracking jobs in the scheduler at all.
>>>
>>> I don't see how this series introduces a problem?
>>>
>>> The fact is that drivers are abusing the API by just firing jobs back
>>> into the scheduler's job list. This series legalizes the abuse by
>>> providing scheduler functionality for that.
>>>
>>> IOW, the series improves the situation but does not add a *new*
>>> problem. Even less so as driver's aren't forced to use the new status
>>> code, but can continue having job completion race with timeout
>>> handlers.
>>
>> Maybe yes, but I'm really not sure about it.
>>
>> Take a look at the git history or job destruction, we already had exactly that approach, removed it and said that leaking memory is at least better than an use after free issue.
>>
>
> If the job was removed from the pending list in the beginning of the
> timeout and drm_sched_get_finished_job() fetches jobs from the pending
> list, how can we end up with an use-after-free issue?
By adding it back into the list after the timeout handling completed.
We had exactly that before we came up with the horrible design to add it back to the pending list in drm_sched_stop() and the free_guilty flag.
Could be that your approach now works better, but I'm really not sure about that.
Regards,
Christian.
>
> Best Regards,
> - Maíra
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-14 9:23 ` Christian König
@ 2025-07-14 10:16 ` Philipp Stanner
2025-07-14 11:46 ` Christian König
0 siblings, 1 reply; 27+ messages in thread
From: Philipp Stanner @ 2025-07-14 10:16 UTC (permalink / raw)
To: Christian König, Maíra Canal, phasta, Matthew Brost,
Danilo Krummrich, Tvrtko Ursulin, Simona Vetter, David Airlie,
Melissa Wen, Lucas Stach, Russell King, Christian Gmeiner,
Lucas De Marchi, Thomas Hellström, Rodrigo Vivi,
Boris Brezillon, Rob Herring, Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On Mon, 2025-07-14 at 11:23 +0200, Christian König wrote:
> On 13.07.25 21:03, Maíra Canal wrote:
> > Hi Christian,
> >
> > On 11/07/25 12:20, Christian König wrote:
> > > On 11.07.25 15:37, Philipp Stanner wrote:
> > > > On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
> > > > >
> > > > >
> > > > > On 08.07.25 15:25, Maíra Canal wrote:
> > > > > > When the DRM scheduler times out, it's possible that the
> > > > > > GPU isn't hung;
> > > > > > instead, a job just took unusually long (longer than the
> > > > > > timeout) but is
> > > > > > still running, and there is, thus, no reason to reset the
> > > > > > hardware. This
> > > > > > can occur in two scenarios:
> > > > > >
> > > > > > 1. The job is taking longer than the timeout, but the
> > > > > > driver determined
> > > > > > through a GPU-specific mechanism that the hardware is
> > > > > > still making
> > > > > > progress. Hence, the driver would like the scheduler
> > > > > > to skip the
> > > > > > timeout and treat the job as still pending from then
> > > > > > onward. This
> > > > > > happens in v3d, Etnaviv, and Xe.
> > > > > > 2. Timeout has fired before the free-job worker.
> > > > > > Consequently, the
> > > > > > scheduler calls `sched->ops->timedout_job()` for a
> > > > > > job that isn't
> > > > > > timed out.
> > > > > >
> > > > > > These two scenarios are problematic because the job was
> > > > > > removed from the
> > > > > > `sched->pending_list` before calling `sched->ops-
> > > > > > >timedout_job()`, which
> > > > > > means that when the job finishes, it won't be freed by the
> > > > > > scheduler
> > > > > > though `sched->ops->free_job()` - leading to a memory leak.
> > > > >
> > > > > Yeah, that is unfortunately intentional.
> > > > >
> > > > > > To solve these problems, create a new `drm_gpu_sched_stat`,
> > > > > > called
> > > > > > DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip
> > > > > > the reset. The
> > > > > > new status will indicate that the job must be reinserted
> > > > > > into
> > > > > > `sched->pending_list`, and the hardware / driver will still
> > > > > > complete that
> > > > > > job.
> > > > >
> > > > > Well long story short we have already tried this and the
> > > > > whole approach doesn't work correctly in all cases. See the
> > > > > git history around how we used to destroy the jobs.
> > > > >
> > > > > The basic problem is that you can always race between timing
> > > > > out and Signaling/destroying the job. This is the long
> > > > > lasting job lifetime issue we already discussed more than
> > > > > once.
> > > >
> > > > The scheduler destroys the job, through free_job().
> > > > I think we have agreed that for now the scheduler is the party
> > > > responsible for the job lifetime.
> > >
> > > That's what I strongly disagree on. The job is just a state bag
> > > between the submission and scheduling state of a submission.
> > >
> > > For the scheduler the control starts when it is pushed into the
> > > entity and ends when run_job is called.
> > >
> > > The real representation of the submission is the scheduler fence
> > > and that object has a perfectly defined lifetime, state and error
> > > handling.
> > >
> > > > >
> > > > > If you want to fix this I think the correct approach is to
> > > > > completely drop tracking jobs in the scheduler at all.
> > > >
> > > > I don't see how this series introduces a problem?
> > > >
> > > > The fact is that drivers are abusing the API by just firing
> > > > jobs back
> > > > into the scheduler's job list. This series legalizes the abuse
> > > > by
> > > > providing scheduler functionality for that.
> > > >
> > > > IOW, the series improves the situation but does not add a *new*
> > > > problem. Even less so as driver's aren't forced to use the new
> > > > status
> > > > code, but can continue having job completion race with timeout
> > > > handlers.
> > >
> > > Maybe yes, but I'm really not sure about it.
> > >
> > > Take a look at the git history or job destruction, we already had
> > > exactly that approach, removed it and said that leaking memory is
> > > at least better than an use after free issue.
> > >
> >
> > If the job was removed from the pending list in the beginning of
> > the
> > timeout and drm_sched_get_finished_job() fetches jobs from the
> > pending
> > list, how can we end up with an use-after-free issue?
>
> By adding it back into the list after the timeout handling completed.
>
> We had exactly that before we came up with the horrible design to add
> it back to the pending list in drm_sched_stop() and the free_guilty
> flag.
>
> Could be that your approach now works better, but I'm really not sure
> about that.
This isn't Maíra's approach; this is an approach that is already
established practice in DRM. Have you looked at the code? There isn't
that much magic happening there.
The job gets added back to pending_list. For the scheduler, this is
like a completely new job, with the timeout handler running again and
the other work items picking the job up when appropriate.
Maíra ports several drivers which have been (illegally, outside our
API) doing that and it worked for them.
Now there's a centralized solution; one which is only active for the
drivers which choose to use it. Other driver's aren't affected.
IOW, my main argument still stands: this series doesn't add a new bug,
but improves the overall situation in DRM.
P.
>
> Regards,
> Christian.
>
> >
> > Best Regards,
> > - Maíra
> >
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running
2025-07-14 10:16 ` Philipp Stanner
@ 2025-07-14 11:46 ` Christian König
0 siblings, 0 replies; 27+ messages in thread
From: Christian König @ 2025-07-14 11:46 UTC (permalink / raw)
To: phasta, Maíra Canal, Matthew Brost, Danilo Krummrich,
Tvrtko Ursulin, Simona Vetter, David Airlie, Melissa Wen,
Lucas Stach, Russell King, Christian Gmeiner, Lucas De Marchi,
Thomas Hellström, Rodrigo Vivi, Boris Brezillon, Rob Herring,
Steven Price, Liviu Dudau
Cc: kernel-dev, dri-devel, etnaviv, intel-xe
On 14.07.25 12:16, Philipp Stanner wrote:
> On Mon, 2025-07-14 at 11:23 +0200, Christian König wrote:
>> On 13.07.25 21:03, Maíra Canal wrote:
>>> Hi Christian,
>>>
>>> On 11/07/25 12:20, Christian König wrote:
>>>> On 11.07.25 15:37, Philipp Stanner wrote:
>>>>> On Fri, 2025-07-11 at 15:22 +0200, Christian König wrote:
>>>>>>
>>>>>>
>>>>>> On 08.07.25 15:25, Maíra Canal wrote:
>>>>>>> When the DRM scheduler times out, it's possible that the
>>>>>>> GPU isn't hung;
>>>>>>> instead, a job just took unusually long (longer than the
>>>>>>> timeout) but is
>>>>>>> still running, and there is, thus, no reason to reset the
>>>>>>> hardware. This
>>>>>>> can occur in two scenarios:
>>>>>>>
>>>>>>> 1. The job is taking longer than the timeout, but the
>>>>>>> driver determined
>>>>>>> through a GPU-specific mechanism that the hardware is
>>>>>>> still making
>>>>>>> progress. Hence, the driver would like the scheduler
>>>>>>> to skip the
>>>>>>> timeout and treat the job as still pending from then
>>>>>>> onward. This
>>>>>>> happens in v3d, Etnaviv, and Xe.
>>>>>>> 2. Timeout has fired before the free-job worker.
>>>>>>> Consequently, the
>>>>>>> scheduler calls `sched->ops->timedout_job()` for a
>>>>>>> job that isn't
>>>>>>> timed out.
>>>>>>>
>>>>>>> These two scenarios are problematic because the job was
>>>>>>> removed from the
>>>>>>> `sched->pending_list` before calling `sched->ops-
>>>>>>>> timedout_job()`, which
>>>>>>> means that when the job finishes, it won't be freed by the
>>>>>>> scheduler
>>>>>>> though `sched->ops->free_job()` - leading to a memory leak.
>>>>>>
>>>>>> Yeah, that is unfortunately intentional.
>>>>>>
>>>>>>> To solve these problems, create a new `drm_gpu_sched_stat`,
>>>>>>> called
>>>>>>> DRM_GPU_SCHED_STAT_NO_HANG, which allows a driver to skip
>>>>>>> the reset. The
>>>>>>> new status will indicate that the job must be reinserted
>>>>>>> into
>>>>>>> `sched->pending_list`, and the hardware / driver will still
>>>>>>> complete that
>>>>>>> job.
>>>>>>
>>>>>> Well long story short we have already tried this and the
>>>>>> whole approach doesn't work correctly in all cases. See the
>>>>>> git history around how we used to destroy the jobs.
>>>>>>
>>>>>> The basic problem is that you can always race between timing
>>>>>> out and Signaling/destroying the job. This is the long
>>>>>> lasting job lifetime issue we already discussed more than
>>>>>> once.
>>>>>
>>>>> The scheduler destroys the job, through free_job().
>>>>> I think we have agreed that for now the scheduler is the party
>>>>> responsible for the job lifetime.
>>>>
>>>> That's what I strongly disagree on. The job is just a state bag
>>>> between the submission and scheduling state of a submission.
>>>>
>>>> For the scheduler the control starts when it is pushed into the
>>>> entity and ends when run_job is called.
>>>>
>>>> The real representation of the submission is the scheduler fence
>>>> and that object has a perfectly defined lifetime, state and error
>>>> handling.
>>>>
>>>>>>
>>>>>> If you want to fix this I think the correct approach is to
>>>>>> completely drop tracking jobs in the scheduler at all.
>>>>>
>>>>> I don't see how this series introduces a problem?
>>>>>
>>>>> The fact is that drivers are abusing the API by just firing
>>>>> jobs back
>>>>> into the scheduler's job list. This series legalizes the abuse
>>>>> by
>>>>> providing scheduler functionality for that.
>>>>>
>>>>> IOW, the series improves the situation but does not add a *new*
>>>>> problem. Even less so as driver's aren't forced to use the new
>>>>> status
>>>>> code, but can continue having job completion race with timeout
>>>>> handlers.
>>>>
>>>> Maybe yes, but I'm really not sure about it.
>>>>
>>>> Take a look at the git history or job destruction, we already had
>>>> exactly that approach, removed it and said that leaking memory is
>>>> at least better than an use after free issue.
>>>>
>>>
>>> If the job was removed from the pending list in the beginning of
>>> the
>>> timeout and drm_sched_get_finished_job() fetches jobs from the
>>> pending
>>> list, how can we end up with an use-after-free issue?
>>
>> By adding it back into the list after the timeout handling completed.
>>
>> We had exactly that before we came up with the horrible design to add
>> it back to the pending list in drm_sched_stop() and the free_guilty
>> flag.
>>
>> Could be that your approach now works better, but I'm really not sure
>> about that.
>
> This isn't Maíra's approach; this is an approach that is already
> established practice in DRM. Have you looked at the code? There isn't
> that much magic happening there.
>
> The job gets added back to pending_list. For the scheduler, this is
> like a completely new job, with the timeout handler running again and
> the other work items picking the job up when appropriate.
>
> Maíra ports several drivers which have been (illegally, outside our
> API) doing that and it worked for them.
Oh, good point! I completely missed that.
> Now there's a centralized solution; one which is only active for the
> drivers which choose to use it. Other driver's aren't affected.
>
> IOW, my main argument still stands: this series doesn't add a new bug,
> but improves the overall situation in DRM.
Yeah, if it's just a cleanup then please go ahead with it. Certainly better to have it centralized in the scheduler then every driver doing it's own thing.
Regards,
Christian.
>
>
> P.
>
>>
>> Regards,
>> Christian.
>>
>>>
>>> Best Regards,
>>> - Maíra
>>>
>>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2025-07-14 16:15 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-08 13:25 [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
2025-07-08 13:25 ` [PATCH v5 1/8] drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET Maíra Canal
2025-07-08 13:25 ` [PATCH v5 2/8] drm/sched: Allow drivers to skip the reset and keep on running Maíra Canal
2025-07-09 13:08 ` Philipp Stanner
2025-07-11 13:22 ` Christian König
2025-07-11 13:37 ` Philipp Stanner
2025-07-11 15:20 ` Christian König
2025-07-11 17:23 ` Matthew Brost
2025-07-14 9:10 ` Christian König
2025-07-13 19:03 ` Maíra Canal
2025-07-14 9:23 ` Christian König
2025-07-14 10:16 ` Philipp Stanner
2025-07-14 11:46 ` Christian König
2025-07-11 14:35 ` Maíra Canal
2025-07-08 13:25 ` [PATCH v5 3/8] drm/sched: Make timeout KUnit tests faster Maíra Canal
2025-07-08 13:25 ` [PATCH v5 4/8] drm/sched: Add new test for DRM_GPU_SCHED_STAT_NO_HANG Maíra Canal
2025-07-08 13:25 ` [PATCH v5 5/8] drm/v3d: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset Maíra Canal
2025-07-08 13:25 ` [PATCH v5 6/8] drm/etnaviv: " Maíra Canal
2025-07-08 13:25 ` [PATCH v5 7/8] drm/xe: " Maíra Canal
2025-07-08 18:35 ` Matthew Brost
2025-07-08 13:25 ` [PATCH v5 8/8] drm/panfrost: " Maíra Canal
2025-07-08 15:33 ` ✗ CI.checkpatch: warning for drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG (rev4) Patchwork
2025-07-08 15:34 ` ✓ CI.KUnit: success " Patchwork
2025-07-08 16:22 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-08 18:14 ` ✓ Xe.CI.Full: " Patchwork
2025-07-09 13:14 ` [PATCH v5 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_NO_HANG Philipp Stanner
2025-07-10 11:27 ` Maíra Canal
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