From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, kw@linux.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v5 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie
Date: Fri, 18 Jul 2025 12:02:27 +0200 [thread overview]
Message-ID: <aHobs30ZI-I8xLAD@hovoldconsulting.com> (raw)
In-Reply-To: <20250718081718.390790-5-ziyue.zhang@oss.qualcomm.com>
On Fri, Jul 18, 2025 at 04:17:18PM +0800, Ziyue Zhang wrote:
> SA8775p supports 'link_down' reset on hardware, so add it for both pcie0
> and pcie1, which can provide a better user experience.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, kw@linux.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v5 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie
Date: Fri, 18 Jul 2025 12:02:27 +0200 [thread overview]
Message-ID: <aHobs30ZI-I8xLAD@hovoldconsulting.com> (raw)
In-Reply-To: <20250718081718.390790-5-ziyue.zhang@oss.qualcomm.com>
On Fri, Jul 18, 2025 at 04:17:18PM +0800, Ziyue Zhang wrote:
> SA8775p supports 'link_down' reset on hardware, so add it for both pcie0
> and pcie1, which can provide a better user experience.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-07-18 10:02 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-18 8:17 [PATCH v5 0/4] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Ziyue Zhang
2025-07-18 8:17 ` Ziyue Zhang
2025-07-18 8:17 ` [PATCH v5 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings Ziyue Zhang
2025-07-18 8:17 ` Ziyue Zhang
2025-07-18 9:58 ` Johan Hovold
2025-07-18 9:58 ` Johan Hovold
2025-07-20 2:07 ` Rob Herring (Arm)
2025-07-20 2:07 ` Rob Herring (Arm)
2025-07-18 8:17 ` [PATCH v5 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset Ziyue Zhang
2025-07-18 8:17 ` Ziyue Zhang
2025-07-18 9:59 ` Johan Hovold
2025-07-18 9:59 ` Johan Hovold
2025-07-20 23:43 ` Rob Herring (Arm)
2025-07-20 23:43 ` Rob Herring (Arm)
2025-07-18 8:17 ` [PATCH v5 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Ziyue Zhang
2025-07-18 8:17 ` Ziyue Zhang
2025-07-18 10:02 ` Johan Hovold
2025-07-18 10:02 ` Johan Hovold
2025-07-18 10:53 ` Konrad Dybcio
2025-07-18 10:53 ` Konrad Dybcio
2025-07-22 4:40 ` Ziyue Zhang
2025-07-22 4:40 ` Ziyue Zhang
2025-07-22 5:13 ` Ziyue Zhang
2025-07-22 5:13 ` Ziyue Zhang
2025-07-22 12:22 ` Johan Hovold
2025-07-22 12:22 ` Johan Hovold
2025-07-18 8:17 ` [PATCH v5 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie Ziyue Zhang
2025-07-18 8:17 ` Ziyue Zhang
2025-07-18 10:02 ` Johan Hovold [this message]
2025-07-18 10:02 ` Johan Hovold
2025-07-23 16:04 ` (subset) [PATCH v5 0/4] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Manivannan Sadhasivam
2025-07-23 16:04 ` Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aHobs30ZI-I8xLAD@hovoldconsulting.com \
--to=johan@kernel.org \
--cc=abel.vesa@linaro.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jingoohan1@gmail.com \
--cc=johan+linaro@kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kw@linux.com \
--cc=kwilczynski@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=neil.armstrong@linaro.org \
--cc=qiang.yu@oss.qualcomm.com \
--cc=quic_krichai@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
--cc=ziyue.zhang@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.