* [PATCH v3] x86/oprofile: switch to xv[mz]alloc_array()
@ 2025-07-28 11:27 Jan Beulich
2025-07-28 12:05 ` Roger Pau Monné
0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2025-07-28 11:27 UTC (permalink / raw)
To: xen-devel@lists.xenproject.org; +Cc: Andrew Cooper, Roger Pau Monné
Use the more "modern" forms, thus doing away with effectively open-
coding xmalloc_array() at the same time. While there is a difference in
generated code, as xmalloc_bytes() forces SMP_CACHE_BYTES alignment, if
code really cared about such higher than default alignment, it should
request so explicitly.
While at it also use XVFREE() instead of open-coding it, or instead of
leaving a dangling pointer, and change loop induction variable types.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v3: Use xvmalloc*(), extending to op_model_ppro.c as well.
--- a/xen/arch/x86/oprofile/nmi_int.c
+++ b/xen/arch/x86/oprofile/nmi_int.c
@@ -19,7 +19,10 @@
#include <xen/string.h>
#include <xen/delay.h>
#include <xen/xenoprof.h>
+#include <xen/xvmalloc.h>
+
#include <public/xenoprof.h>
+
#include <asm/msr.h>
#include <asm/apic.h>
#include <asm/regs.h>
@@ -142,30 +145,29 @@ static void cf_check nmi_save_registers(
static void free_msrs(void)
{
- int i;
+ unsigned int i;
+
for (i = 0; i < nr_cpu_ids; ++i) {
- xfree(cpu_msrs[i].counters);
- cpu_msrs[i].counters = NULL;
- xfree(cpu_msrs[i].controls);
- cpu_msrs[i].controls = NULL;
+ XVFREE(cpu_msrs[i].counters);
+ XVFREE(cpu_msrs[i].controls);
}
}
static int allocate_msrs(void)
{
+ unsigned int i;
int success = 1;
- size_t controls_size = sizeof(struct op_msr) * model->num_controls;
- size_t counters_size = sizeof(struct op_msr) * model->num_counters;
- int i;
for_each_online_cpu (i) {
- cpu_msrs[i].counters = xmalloc_bytes(counters_size);
+ cpu_msrs[i].counters = xvmalloc_array(struct op_msr,
+ model->num_counters);
if (!cpu_msrs[i].counters) {
success = 0;
break;
}
- cpu_msrs[i].controls = xmalloc_bytes(controls_size);
+ cpu_msrs[i].controls = xvmalloc_array(struct op_msr,
+ model->num_controls);
if (!cpu_msrs[i].controls) {
success = 0;
break;
--- a/xen/arch/x86/oprofile/op_model_ppro.c
+++ b/xen/arch/x86/oprofile/op_model_ppro.c
@@ -10,9 +10,11 @@
* @author Graydon Hoare
*/
+#include <xen/sched.h>
#include <xen/types.h>
#include <xen/xenoprof.h>
-#include <xen/sched.h>
+#include <xen/xvmalloc.h>
+
#include <asm/msr.h>
#include <asm/io.h>
#include <asm/apic.h>
@@ -231,7 +233,7 @@ static int cf_check ppro_allocate_msr(st
struct vpmu_struct *vpmu = vcpu_vpmu(v);
struct arch_msr_pair *msr_content;
- msr_content = xzalloc_array(struct arch_msr_pair, num_counters);
+ msr_content = xvzalloc_array(struct arch_msr_pair, num_counters);
if ( !msr_content )
goto out;
vpmu->context = (void *)msr_content;
@@ -251,7 +253,7 @@ static void cf_check ppro_free_msr(struc
if ( !vpmu_is_set(vpmu, VPMU_PASSIVE_DOMAIN_ALLOCATED) )
return;
- xfree(vpmu->context);
+ XVFREE(vpmu->context);
vpmu_reset(vpmu, VPMU_PASSIVE_DOMAIN_ALLOCATED);
}
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v3] x86/oprofile: switch to xv[mz]alloc_array()
2025-07-28 11:27 [PATCH v3] x86/oprofile: switch to xv[mz]alloc_array() Jan Beulich
@ 2025-07-28 12:05 ` Roger Pau Monné
0 siblings, 0 replies; 2+ messages in thread
From: Roger Pau Monné @ 2025-07-28 12:05 UTC (permalink / raw)
To: Jan Beulich; +Cc: xen-devel@lists.xenproject.org, Andrew Cooper
On Mon, Jul 28, 2025 at 01:27:48PM +0200, Jan Beulich wrote:
> Use the more "modern" forms, thus doing away with effectively open-
> coding xmalloc_array() at the same time. While there is a difference in
> generated code, as xmalloc_bytes() forces SMP_CACHE_BYTES alignment, if
> code really cared about such higher than default alignment, it should
> request so explicitly.
>
> While at it also use XVFREE() instead of open-coding it, or instead of
> leaving a dangling pointer, and change loop induction variable types.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Roger Pau Monné <roger.pau@cloud.com>
Thanks, Roger.
^ permalink raw reply [flat|nested] 2+ messages in thread
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